From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by mx.groups.io with SMTP id smtpd.web11.108495.1597923307445946148 for ; Thu, 20 Aug 2020 04:35:08 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=gqFRmgSt; spf=pass (domain: nuviainc.com, ip: 209.85.128.68, mailfrom: leif@nuviainc.com) Received: by mail-wm1-f68.google.com with SMTP id 9so1271640wmj.5 for ; Thu, 20 Aug 2020 04:35:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=b4ou6IFPoOdjr0CttIndL0l3SPF4S8iXomxEqLS7f8g=; b=gqFRmgStd/r/eyGiMBRFVwJZX1hGIqDPfF09acUVtOQZsoudsWAj3DEq9gkzJEnbQK n/OKI0bv98nNzhzs3SxMTUsa6zH15UVO54NFJduPhgHrr8yRpSk2RI9jx8ZK1P0uUXpy a12stttnBSfn6RNj9E+ehMB1nDg+4Ish0pzODrw5E0gWeRJy1SGYTpJAWXolO34gyerQ svOnj4Hi9CePTkX0VKM8UtkeJQBTifFw62Z3HltNUeZhe6qnTK/GHjm1aLseXTC5blYD +nZym0Fzw1Bur3eocyffPRMaZ4iU2bsbXseva6usq0/ATij6N9xWBIWAQDcYYMx7vWKx mGwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=b4ou6IFPoOdjr0CttIndL0l3SPF4S8iXomxEqLS7f8g=; b=cZNZIaigupp3AxgFOMKiqlhAWzD07+SNZmQJiUo8vrPvoVcjdgARGIRrnyddtp8B1F 34wVV/krh0gx3mYPwj0L0ALHN7h/4pAxOA9vs6v/nodwfOIu/3aHHkmMbyLp26VIUoZY fuhtkAbVy3w5qJNs/0fdFvKxkVH8S5h6GGDu7GF2i8Rj2UWG5LP0hZvTaf2VfLD/pmHn QM/flzKWzpgu94nWsl+iM+Zk5CMUv8bzr3c6TO0VpJ8CscXXa2vwHQ6l0lT9ij0wWHkF xMP8AV5KkqGr2nn1mPe41WaS67KXUgKrCrlVh7oafvC3Hl4ThhRa0LK/z28nYXn7CIcX rKmg== X-Gm-Message-State: AOAM53227Hy+bkgVEX8du00WPx9XPySwlIFGyuvVpkLnqkR1hCYlNSPE hM1n7Tgmcxazl4MMvCklai1zoA== X-Google-Smtp-Source: ABdhPJxHNyhx2QTKUKLrDPziaCsgto1GcoqaUJ1hd/PJ485U3sZ1pKIQaPHJn4Ut636/RPjHtNuENg== X-Received: by 2002:a1c:1bce:: with SMTP id b197mr3128481wmb.32.1597923305590; Thu, 20 Aug 2020 04:35:05 -0700 (PDT) Return-Path: Received: from vanye ([2001:470:1f09:12f0:b26e:bfff:fea9:f1b8]) by smtp.gmail.com with ESMTPSA id h14sm3910352wml.30.2020.08.20.04.35.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Aug 2020 04:35:05 -0700 (PDT) Date: Thu, 20 Aug 2020 12:35:02 +0100 From: "Leif Lindholm" To: Tanmay Jagdale Cc: graeme@nuviainc.com, shashi.mallela@linaro.org, devel@edk2.groups.io, paul.isaacs@linaro.org, tanmay@marvell.com, Graeme Gregory , Jonathan Cameron Subject: Re: [PATCH edk2-platforms 1/7] SbsaQemu: Initial support for static ACPI tables Message-ID: <20200820113502.GB1191@vanye> References: <20200819143005.13999-1-tanmay.jagdale@linaro.org> <20200819143005.13999-2-tanmay.jagdale@linaro.org> MIME-Version: 1.0 In-Reply-To: <20200819143005.13999-2-tanmay.jagdale@linaro.org> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Aug 19, 2020 at 19:59:59 +0530, Tanmay Jagdale wrote: > - Add the following ACPI tables for SbsaQemu platform > DSDT, FADT, GTDT, SPCR > - Created an Include directory to hold common header files. > - Also included the Acpiview shell utility. > > Co-authored-by: Graeme Gregory > Co-authored-by: Jonathan Cameron > Signed-off-by: Tanmay Jagdale > --- > Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 + > Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 8 ++ > Silicon/Qemu/SbsaQemu/Acpi.dsc.inc | 35 +++++ > .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 45 ++++++ > Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 133 ++++++++++++++++++ > Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc | 80 +++++++++++ > Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 67 +++++++++ > Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc | 53 +++++++ > .../Include/IndustryStandard/SbsaQemuAcpi.h | 31 ++++ > Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 +- I am mostly happy with this patch, but the above does not follow the guidelines in https://github.com/tianocore/tianocore.github.io/wiki/Laszlo%27s-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-23 Two key points: - need to add "--stat=1000 --stat-graph-width=20" to git format-patch command line - need to run /BaseTools/Scripts/SetupGit.py in your edk2-platforms repository - There *was* a bug that meant the diff.OrderFile setting had no effect, but that is fixed in upstream edk2, so make sure you're staying current. (No need to re-run script if you already have, updating edk2 solves the issue.) I have some minor comments on remaining patches, so please do send out a v2 once I've finished, following the above. If v2 of this patch has no "..." in diffstat paths, and the .dec is the first file listed: Reviewed-by: Leif Lindholm > 10 files changed, 460 insertions(+), 2 deletions(-) > create mode 100644 Silicon/Qemu/SbsaQemu/Acpi.dsc.inc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h > > diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc > index 4db3ab465163..4739443cae93 100644 > --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc > +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc > @@ -516,6 +516,7 @@ [Components.common] > ShellPkg/Application/Shell/Shell.inf { > > ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf > + NULL|ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf > NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf > NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf > NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf > @@ -675,3 +676,8 @@ [Components.common] > MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf > MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf > MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf > + > + # > + # ACPI Support > +!include Silicon/Qemu/SbsaQemu/Acpi.dsc.inc > + MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf > diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf > index be7c78acebfd..4526eaaa02c5 100644 > --- a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf > +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf > @@ -227,6 +227,14 @@ [FV.FvMain] > INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf > INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf > > + # > + # ACPI support > + # > + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf > + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf > + INF RuleOverride = ACPITABLE Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > + INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf > + > # > # PCI support > # > diff --git a/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc b/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc > new file mode 100644 > index 000000000000..c4a8d7a27b78 > --- /dev/null > +++ b/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc > @@ -0,0 +1,35 @@ > +# > +# Copyright (c) 2020, Linaro Limited. All rights reserved. > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > + > +################################################################################ > +# > +# Pcd Section - list of all EDK II PCD Entries defined by this Platform > +# > +################################################################################ > + > +[PcdsFeatureFlag] > + gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE > + > +[PcdsFixedAtBuild.common] > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"LINARO" > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x554D455141534253 #SBSAQEMU > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x20200810 > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c #LNRO > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1 > + > +################################################################################ > +# > +# Components Section - list of all EDK II Modules needed by this Platform > +# > +################################################################################ > + > +[Components.common] > + # > + # ACPI support > + # > + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf > + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf > + Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > new file mode 100644 > index 000000000000..ee524895524e > --- /dev/null > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > @@ -0,0 +1,45 @@ > +## @file > +# > +# ACPI table data and ASL sources required to boot the platform. > +# > +# Copyright (c) 2020, Linaro Ltd. All rights reserved. > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + INF_VERSION = 0x0001001A > + BASE_NAME = SbsaAcpiTables > + FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD > + MODULE_TYPE = USER_DEFINED > + VERSION_STRING = 1.0 > + > +[Sources] > + Dsdt.asl > + Fadt.aslc > + Gtdt.aslc > + Spcr.aslc > + > +[Packages] > + ArmPlatformPkg/ArmPlatformPkg.dec > + ArmPkg/ArmPkg.dec > + EmbeddedPkg/EmbeddedPkg.dec > + MdePkg/MdePkg.dec > + MdeModulePkg/MdeModulePkg.dec > + Silicon/Qemu/SbsaQemu/SbsaQemu.dec > + > +[FixedPcd] > + gArmTokenSpaceGuid.PcdGicDistributorBase > + gArmTokenSpaceGuid.PcdGicRedistributorsBase > + > + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum > + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum > + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum > + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum > + > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl > new file mode 100644 > index 000000000000..85339d4559d3 > --- /dev/null > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl > @@ -0,0 +1,133 @@ > +/** @file > +* Differentiated System Description Table Fields (DSDT). > +* > +* Copyright (c) 2020, Linaro Ltd. All rights reserved. > +* > +* SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include > + > +DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "LINARO", "SBSAQEMU", > + FixedPcdGet32 (PcdAcpiDefaultOemRevision)) { > + Scope (_SB) { > + // UART PL011 > + Device (COM0) { > + Name (_HID, "ARMH0011") > + Name (_UID, Zero) > + Name (_CRS, ResourceTemplate () { > + Memory32Fixed (ReadWrite, 0x60000000, 0x00001000) > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 33 } > + }) > + } > + > + // AHCI Host Controller > + Device (AHC0) { > + Name (_HID, "LNRO001E") > + Name (_CLS, Package (3) { > + 0x01, > + 0x06, > + 0x01, > + }) > + Name (_CCA, 1) > + Name (_CRS, ResourceTemplate() { > + Memory32Fixed (ReadWrite, 0x60100000, 0x1000) > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 42 } > + }) > + } > + > + // USB EHCI Host Controller > + Device (USB0) { > + Name (_HID, "LNRO0D20") > + Name (_CID, "PNP0D20") > + > + Method (_CRS, 0x0, Serialized) { > + Name (RBUF, ResourceTemplate() { > + Memory32Fixed (ReadWrite, 0x60110000, 0x00010000) > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 } > + }) > + Return (RBUF) > + } > + > + // Root Hub > + Device (RHUB) { > + Name (_ADR, 0x00000000) // Address of Root Hub should be 0 as per ACPI 5.0 spec > + > + // Ports connected to Root Hub > + Device (HUB1) { > + Name (_ADR, 0x00000001) > + Name (_UPC, Package() { > + 0x00, // Port is NOT connectable > + 0xFF, // Don't care > + 0x00000000, // Reserved 0 must be zero > + 0x00000000 // Reserved 1 must be zero > + }) > + > + Device (PRT1) { > + Name (_ADR, 0x00000001) > + Name (_UPC, Package() { > + 0xFF, // Port is connectable > + 0x00, // Port connector is A > + 0x00000000, > + 0x00000000 > + }) > + Name (_PLD, Package() { > + Buffer(0x10) { > + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 > + } > + }) > + } // USB0_RHUB_HUB1_PRT1 > + Device (PRT2) { > + Name (_ADR, 0x00000002) > + Name (_UPC, Package() { > + 0xFF, // Port is connectable > + 0x00, // Port connector is A > + 0x00000000, > + 0x00000000 > + }) > + Name (_PLD, Package() { > + Buffer(0x10) { > + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 > + } > + }) > + } // USB0_RHUB_HUB1_PRT2 > + > + Device (PRT3) { > + Name (_ADR, 0x00000003) > + Name (_UPC, Package() { > + 0xFF, // Port is connectable > + 0x00, // Port connector is A > + 0x00000000, > + 0x00000000 > + }) > + Name (_PLD, Package() { > + Buffer (0x10) { > + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 > + } > + }) > + } // USB0_RHUB_HUB1_PRT3 > + > + Device (PRT4) { > + Name (_ADR, 0x00000004) > + Name (_UPC, Package() { > + 0xFF, // Port is connectable > + 0x00, // Port connector is A > + 0x00000000, > + 0x00000000 > + }) > + Name (_PLD, Package() { > + Buffer (0x10){ > + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 > + } > + }) > + } // USB0_RHUB_HUB1_PRT4 > + } // USB0_RHUB_HUB1 > + } // USB0_RHUB > + } // USB0 > + > + } // Scope (_SB) > +} > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc > new file mode 100644 > index 000000000000..894b848db8bb > --- /dev/null > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc > @@ -0,0 +1,80 @@ > +/** @file > +* Fixed ACPI Description Table (FADT) > +* > +* Copyright (c) 2020, Linaro Limited. All rights reserved. > +* > +* SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include > +#include > +#include > + > +EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = { > + SBSAQEMU_ACPI_HEADER ( > + EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, > + EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE, > + EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION > + ), > + 0, // UINT32 FirmwareCtrl > + 0, // UINT32 Dsdt > + EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0 > + EFI_ACPI_6_0_PM_PROFILE_ENTERPRISE_SERVER, // UINT8 PreferredPmProfile > + 0, // UINT16 SciInt > + 0, // UINT32 SmiCmd > + 0, // UINT8 AcpiEnable > + 0, // UINT8 AcpiDisable > + 0, // UINT8 S4BiosReq > + 0, // UINT8 PstateCnt > + 0, // UINT32 Pm1aEvtBlk > + 0, // UINT32 Pm1bEvtBlk > + 0, // UINT32 Pm1aCntBlk > + 0, // UINT32 Pm1bCntBlk > + 0, // UINT32 Pm2CntBlk > + 0, // UINT32 PmTmrBlk > + 0, // UINT32 Gpe0Blk > + 0, // UINT32 Gpe1Blk > + 0, // UINT8 Pm1EvtLen > + 0, // UINT8 Pm1CntLen > + 0, // UINT8 Pm2CntLen > + 0, // UINT8 PmTmrLen > + 0, // UINT8 Gpe0BlkLen > + 0, // UINT8 Gpe1BlkLen > + 0, // UINT8 Gpe1Base > + 0, // UINT8 CstCnt > + 0, // UINT16 PLvl2Lat > + 0, // UINT16 PLvl3Lat > + 0, // UINT16 FlushSize > + 0, // UINT16 FlushStride > + 0, // UINT8 DutyOffset > + 0, // UINT8 DutyWidth > + 0, // UINT8 DayAlrm > + 0, // UINT8 MonAlrm > + 0, // UINT8 Century > + 0, // UINT16 IaPcBootArch > + 0, // UINT8 Reserved1 > + EFI_ACPI_6_0_HW_REDUCED_ACPI | > + EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE, // UINT32 Flags > + NULL_GAS, // GAS ResetReg > + 0, // UINT8 ResetValue > + EFI_ACPI_6_0_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags > + EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, > + // UINT8 MinorRevision > + 0, // UINT64 XFirmwareCtrl > + 0, // UINT64 XDsdt > + NULL_GAS, // GAS XPm1aEvtBlk > + NULL_GAS, // GAS XPm1bEvtBlk > + NULL_GAS, // GAS XPm1aCntBlk > + NULL_GAS, // GAS XPm1bCntBlk > + NULL_GAS, // GAS XPm2CntBlk > + NULL_GAS, // GAS XPmTmrBlk > + NULL_GAS, // GAS XGpe0Blk > + NULL_GAS, // GAS XGpe1Blk > + NULL_GAS, // GAS SleepControlReg > + NULL_GAS, // GAS SleepStatusReg > + 0 // UINT64 HypervisorVendorId > +}; > + > +// Reference the table being generated to prevent the optimizer > +// from removing the data structure from the executable > +VOID* CONST ReferenceAcpiTable = &Fadt; > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > new file mode 100644 > index 000000000000..52496acc449b > --- /dev/null > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > @@ -0,0 +1,67 @@ > +/** @file > +* Generic Timer Description Table (GTDT) > +* > +* Copyrignt (c) 2020, Linaro Limited. All rights reserved. > +* > +* SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include > +#include > +#include > +#include > + > +#define GTDT_GLOBAL_FLAGS_MAPPED EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT > +#define GTDT_GLOBAL_FLAGS_NOT_MAPPED 0 > +#define GTDT_GLOBAL_FLAGS_EDGE EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE > +#define GTDT_GLOBAL_FLAGS_LEVEL 0 > + > +// Note: We could have a build flag that switches between memory mapped/non-memory mapped timer > +#ifdef SYSTEM_TIMER_BASE_ADDRESS > + #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL) > +#else > + #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_NOT_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL) > + #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF > +#endif > + > +#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE > +#define GTDT_TIMER_LEVEL_TRIGGERED 0 > +#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY > +#define GTDT_TIMER_ACTIVE_HIGH 0 > + > +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) > + > + #pragma pack (1) > + > + typedef struct { > + EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; > + } GENERIC_TIMER_DESCRIPTION_TABLE; > + > + #pragma pack () > + > + GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = { > + { > + SBSAQEMU_ACPI_HEADER( > + EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, > + GENERIC_TIMER_DESCRIPTION_TABLE, > + EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION > + ), > + SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress > + 0, // UINT32 Reserved > + FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV > + GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags > + FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV > + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags > + FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV > + GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags > + FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV > + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags > + 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress > + 0, // UINT32 PlatformTimerCount > + 0 > + }, > + }; > + > +// Reference the table being generated to prevent the optimizer from removing the > +// data structure from the executable > +VOID* CONST ReferenceAcpiTable = &Gtdt; > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc > new file mode 100644 > index 000000000000..7b8ab7b6942f > --- /dev/null > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc > @@ -0,0 +1,53 @@ > +/** @file > +* Serial Port Console Redirection Table (SPCR). > +* > +* Copyright (c) 2020 Linaro Ltd. All rights reserved. > +* > +* SPDX-License-Identifier: BSD-2-Clause-Patent > +* > +**/ > + > +#include > +#include > +#include > + > +#pragma pack(push, 1) > + > +STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = { > + SBSAQEMU_ACPI_HEADER ( > + EFI_ACPI_6_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE, > + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE, > + 2), /* New MS definition for PL011 support */ > + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART, > + { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 32, > + 0, > + EFI_ACPI_6_0_DWORD, > + SBSAQEMU_UART0_BASE > + }, > + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC, > + 0, /* Irq */ > + 33, /* GlobalSystemInterrupt */ > + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200, > + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY, > + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1, > + 0, /* Flow Control */ > + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI, > + EFI_ACPI_RESERVED_BYTE, /* Language */ > + 0xFFFF, /* PciDeviceId */ > + 0xFFFF, /* PciVendorId */ > + 0x00, /* PciBusNumber */ > + 0x00, /* PciDeviceNumber */ > + 0x00, /* PciFunctionNumber */ > + 0, /* PciFlags */ > + 0, /* PciSegment */ > + EFI_ACPI_RESERVED_DWORD > +}; > + > +#pragma pack(pop) > + > +// Reference the table being generated to prevent the optimizer from removing > +// the data structure from the executable > +VOID* CONST ReferenceAcpiTable = &Spcr; > diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h > new file mode 100644 > index 000000000000..eac195b0585c > --- /dev/null > +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h > @@ -0,0 +1,31 @@ > +/** @file > +* > +* Copyright (c) 2020, Linaro Limited. All rights reserved. > +* > +* SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#ifndef SBSAQEMUACPI_H > +#define SBSAQEMUACPI_H > + > +// A macro to initialise the common header part of EFI ACPI tables as defined by > +// EFI_ACPI_DESCRIPTION_HEADER structure. > +#define SBSAQEMU_ACPI_HEADER(Signature, Type, Revision) { \ > + Signature, /* UINT32 Signature */ \ > + sizeof (Type), /* UINT32 Length */ \ > + Revision, /* UINT8 Revision */ \ > + 0, /* UINT8 Checksum */ \ > + { 'L', 'I', 'N', 'A', 'R', 'O' }, /* UINT8 OemId[6] */ \ > + FixedPcdGet64 (PcdAcpiDefaultOemTableId), /* UINT64 OemTableId */ \ > + FixedPcdGet32 (PcdAcpiDefaultOemRevision), /* UINT32 OemRevision */ \ > + FixedPcdGet32 (PcdAcpiDefaultCreatorId), /* UINT32 CreatorId */ \ > + FixedPcdGet32 (PcdAcpiDefaultCreatorRevision)/* UINT32 CreatorRevision */ \ > + } > + > +#define SBSAQEMU_UART0_BASE 0x60000000 > + > +#define SBSAQEMU_PCI_SEG0_CONFIG_BASE 0xf0000000 > +#define SBSAQEMU_PCI_SEG0_BUSNUM_MIN 0x00 > +#define SBSAQEMU_PCI_SEG0_BUSNUM_MAX 0xFF > + > +#endif > diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec > index cd879f4dbd96..71ba55a082e2 100644 > --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec > +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec > @@ -21,8 +21,8 @@ [Defines] > # BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION > # > ################################################################################ > -#[Includes.common] > -# Include # Root include for the package > +[Includes] > + Include # Root include for the package > > [Guids.common] > gArmVirtSbsaQemuPlatformTokenSpaceGuid = { 0xaab3bea9, 0xa8e8, 0x4e76, { 0xb5, 0x3a, 0x35, 0x22, 0x11, 0xce, 0xf7, 0xf7 } } > -- > 2.28.0 >