From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by mx.groups.io with SMTP id smtpd.web11.109031.1597925727426386747 for ; Thu, 20 Aug 2020 05:15:27 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=K5Khp/MI; spf=pass (domain: nuviainc.com, ip: 209.85.128.68, mailfrom: leif@nuviainc.com) Received: by mail-wm1-f68.google.com with SMTP id d190so1378317wmd.4 for ; Thu, 20 Aug 2020 05:15:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=4xCbbU6EXcNNlyE0+QH/NO9XCpulsb6bPFGJUmR93n0=; b=K5Khp/MImjVRCbQRMB108I2Moh6S440MSMHiGBAzbAks/wGBEv/02yw3Y3DN937VOE II1/XJE7ke/+9Q6vTNRQ7NrLocOEMxuRszBYihPyf9rhDLNtsocPDbKAELHULrBikxNc 6ixkIyjqXEZqdlKM35oYEJLxT+KRVuR4RAWpcDeSlIsA1QpcxcAHkbrAPipVi0vmjwjX 1JqSX8u+wZAs5III1tRnp5nStae+9Cexvx3McAOQOHVGL6tGZ7RnS+zRSv3LmMXT46PB qLynxcjOsg0lYWwfgPYq5u0uAmL7SF++uJJd1Nx4YS+9XLRameb8KEECUUSyoDWJ27TQ IM6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=4xCbbU6EXcNNlyE0+QH/NO9XCpulsb6bPFGJUmR93n0=; b=k/Eti57els25z+Mak83pzPnqyUMl/2+JrR4MQtiSW2YvbXdesKIuRAVFXpDrvb/ezF 8YNU5FoOUcszObH+i9/MmxG5Q/SFteg5E04E6CxZywYJs/pbYoSe95/4eX092CZ7q/wI QRVe61X6kZdNv7RvsolwVEN38t1ZoAcYSALaypP9KPJIE8uHnSO2tjFYQ2lyIpi/N7g9 0MsppuXa8huJ0bIy57o57K7X7l8PUbrJYDgeJEacjt+59zpW3FB9LhZndv+kPT8umEk8 ZM2ip8YN34IGpOdBDqPn+fF043TqiP7AEXNEv69qcXft5bED3InNqQuadDgenjq7aw32 SYLw== X-Gm-Message-State: AOAM532WHCNRYb4eoc7w8kK0F/ZOSwh3UE6BrlCiCRmY3hez6NAhQxon lD8XqWVscYY2hvpFEAY2yhE+pldWsCCNmx8q X-Google-Smtp-Source: ABdhPJzkrwId77fT/B+UZz5Bzwb9k3Pj+PN++um/QoftuX82H6I6/LEMvr/hbo/s6CteIhfdhkGA7A== X-Received: by 2002:a1c:964b:: with SMTP id y72mr3267637wmd.69.1597925725926; Thu, 20 Aug 2020 05:15:25 -0700 (PDT) Return-Path: Received: from vanye ([2001:470:1f09:12f0:b26e:bfff:fea9:f1b8]) by smtp.gmail.com with ESMTPSA id v20sm4026148wrd.6.2020.08.20.05.15.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Aug 2020 05:15:24 -0700 (PDT) Date: Thu, 20 Aug 2020 13:15:22 +0100 From: "Leif Lindholm" To: Tanmay Jagdale Cc: graeme@nuviainc.com, shashi.mallela@linaro.org, devel@edk2.groups.io, paul.isaacs@linaro.org, tanmay@marvell.com Subject: Re: [PATCH edk2-platforms 0/7] Add ACPI tables support for SbsaQemu Message-ID: <20200820121522.GI1191@vanye> References: <20200819143005.13999-1-tanmay.jagdale@linaro.org> MIME-Version: 1.0 In-Reply-To: <20200819143005.13999-1-tanmay.jagdale@linaro.org> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Thanks. All done reviewing. On the whole, it looks good, but there are some minor things left to clean up. So please send out a v2 based on the comments I made. Best Regards, Leif On Wed, Aug 19, 2020 at 19:59:58 +0530, Tanmay Jagdale wrote: > This patch series adds ACPI tables support for the SbsaQemu platform. > We are using a pseudo static approach to create the ACPI tables. > > The ACPI tables namely DBG2, DSDT, MCFG, SPCR, GTDT are created in a > static way at compile time because they hold a fixed configuration > and there are no changes at runtime. > > The MADT, SSDT and PPTT tables are dependant on the number of CPUs and > hence they are created at runtime based on the number of CPUs the user > has requested. > > Tanmay Jagdale (7): > SbsaQemu: Initial support for static ACPI tables > SbsaQemu: AcpiTables: Add PCI support and MCFG Table > SbsaQemu: Add new ACPI driver and FDT parser to count CPUs > SbsaQemu: AcpiDxe: Create MADT table at runtime > SbsaQemu: AcpiDxe: Create SSDT table at runtime > SbsaQemu: AcpiDxe: Create PPTT table at runtime > SbsaQemu: AcpiTables: Add DBG2 Table > > Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 12 +- > Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 9 + > Silicon/Qemu/SbsaQemu/Acpi.dsc.inc | 36 ++ > .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 47 ++ > Silicon/Qemu/SbsaQemu/AcpiTables/Dbg2.aslc | 68 +++ > Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 449 ++++++++++++++++ > Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc | 80 +++ > Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 67 +++ > Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc | 43 ++ > Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc | 53 ++ > .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 490 ++++++++++++++++++ > .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 67 +++ > .../Include/IndustryStandard/SbsaQemuAcpi.h | 199 +++++++ > Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 8 +- > 14 files changed, 1624 insertions(+), 4 deletions(-) > create mode 100644 Silicon/Qemu/SbsaQemu/Acpi.dsc.inc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Dbg2.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf > create mode 100644 Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h > > -- > 2.28.0 >