From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f193.google.com (mail-pg1-f193.google.com [209.85.215.193]) by mx.groups.io with SMTP id smtpd.web10.9002.1598340270716523489 for ; Tue, 25 Aug 2020 00:24:30 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=lVIpRO48; spf=pass (domain: linaro.org, ip: 209.85.215.193, mailfrom: tanmay.jagdale@linaro.org) Received: by mail-pg1-f193.google.com with SMTP id d19so6194679pgl.10 for ; Tue, 25 Aug 2020 00:24:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2FfmJCYYgJyHLnZzv66XormjAnxyAPcfV38QWEcRD1A=; b=lVIpRO48+ViNLBpcvMCZsWpXMPjJS8NsYZGq21o5v3O+QZvL1tIwHt7pUsTx5MjcfV V19hoLOqZnJMKdRp/IPJL7lzCJOX2SPXP4TymW98RGNbJGmIinKGiIdZpure7U4M495K /auP2bFpFYZ9lvB9NRnbRCwTB/phwLKOrwEGcMqLpu9xOSxMHsp8piaLrL40qIqJ+Abw bcLnejw1xVG7jVMMo+a9T6viAsD7sTUdYDzw8V9BaPyR9Fj7BYzGr44opVS+V/Vmq1Ru 9Ki72BwlubMzcPS9GIetZgTyUY0t/SIk/yFREnoQHuC5OBqJKDMt0cOZ6vxX1/5bq+e2 7S9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2FfmJCYYgJyHLnZzv66XormjAnxyAPcfV38QWEcRD1A=; b=qS6u2ECJNLKhUV261SzXgtUtcN/fMGu/rwexMlAsg2jgetd8b0+abr9rMoAyHzr1O8 Grs7SdENQwB1lGAevm11OgMCeACByp9+LW6AlWUqXCyie6l70WRJf5kDDiVXMReBtczo z6wsfKFnpaMjqun6DlKMynjT5PZ9Y0rx0ueYXY189nD9Mt2ILhTKN08yE2yF9mlkOCHb XWBfDUPV02PUYRlq8aS4gfiMuft6zDsRJcDEscGV6otMwcwdejA3VKq1QVvfErLy7CUe QTXynkc8jvwy/0+K4tppxrLr2UpM8LvUDTZwOGbG3ltWEaFgEnlR2Gd+E6oFUu7uNHrF 3OKA== X-Gm-Message-State: AOAM533OfzWiJZdAN2rSesO2BHWH15EkH5nF7+a8zu0oNogEf9ED3NqM t5UKCJ3F+5DFNN8B8qsvenI4+Q== X-Google-Smtp-Source: ABdhPJxouRe8fB9dYK8jxeHE9WQjrFckF9/wpLjWtJIQXFYdD/B9/rRPSVdQ1quNNIQP9DD+jK76Og== X-Received: by 2002:a17:902:d341:: with SMTP id l1mr5534176plk.36.1598340270231; Tue, 25 Aug 2020 00:24:30 -0700 (PDT) Return-Path: Received: from bean-canyon.localdomain ([106.51.140.68]) by smtp.googlemail.com with ESMTPSA id d5sm1722417pjw.18.2020.08.25.00.24.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Aug 2020 00:24:29 -0700 (PDT) From: "Tanmay Jagdale" To: leif@nuviainc.com, graeme@nuviainc.com, shashi.mallela@linaro.org, devel@edk2.groups.io Cc: paul.isaacs@linaro.org, tanmay@marvell.com, Tanmay Jagdale Subject: [PATCH v2 edk2-platforms 7/8] SbsaQemu: AcpiDxe: Create PPTT table at runtime Date: Tue, 25 Aug 2020 12:53:21 +0530 Message-Id: <20200825072322.10848-8-tanmay.jagdale@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200825072322.10848-1-tanmay.jagdale@linaro.org> References: <20200825072322.10848-1-tanmay.jagdale@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add support to create Processor Properties Topology Table at runtime. The cache topology of each CPU is as follows: CPU N ------------------------ | -------- -------- | | | L1-I | | L1-D | | | | 32KB | | 32KB | | | -------- -------- | | ------------------ | | | L2 512KB | | | ------------------ | ------------------------ Signed-off-by: Tanmay Jagdale --- Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h | 124 ++++++++++++++++++++ Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 110 +++++++++++++++++ 2 files changed, 234 insertions(+) diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h index 00c7c68256fd..de6b51ccd034 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -72,4 +72,128 @@ typedef struct { UINT8 uid[8]; } SBSAQEMU_ACPI_CPU_DEVICE; +#define SBSAQEMU_L1_D_CACHE_SIZE SIZE_32KB +#define SBSAQEMU_L1_D_CACHE_SETS 256 +#define SBSAQEMU_L1_D_CACHE_ASSC 2 + +#define SBSAQEMU_L1_I_CACHE_SIZE SIZE_32KB +#define SBSAQEMU_L1_I_CACHE_SETS 256 +#define SBSAQEMU_L1_I_CACHE_ASSC 2 + +#define SBSAQEMU_L2_CACHE_SIZE SIZE_512KB +#define SBSAQEMU_L2_CACHE_SETS 1024 +#define SBSAQEMU_L2_CACHE_ASSC 8 + +#define CLUSTER_INDEX (sizeof (EFI_ACPI_DESCRIPTION_HEADER)) +#define L1_D_CACHE_INDEX (CLUSTER_INDEX + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)) +#define L1_I_CACHE_INDEX (L1_D_CACHE_INDEX + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)) +#define L2_CACHE_INDEX (L1_I_CACHE_INDEX + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)) + +#define SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT { \ + EFI_ACPI_6_3_PPTT_TYPE_CACHE, \ + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), \ + { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \ + { \ + 1, /* SizePropertyValid */ \ + 1, /* NumberOfSetsValid */ \ + 1, /* AssociativityValid */ \ + 1, /* AllocationTypeValid */ \ + 1, /* CacheTypeValid */ \ + 1, /* WritePolicyValid */ \ + 1, /* LineSizeValid */ \ + }, \ + 0, /* NextLevelOfCache */ \ + SBSAQEMU_L1_D_CACHE_SIZE, /* Size */ \ + SBSAQEMU_L1_D_CACHE_SETS, /* NumberOfSets */ \ + SBSAQEMU_L1_D_CACHE_ASSC, /* Associativity */ \ + { \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, \ + }, \ + 64 /* LineSize */ \ + } + +#define SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT { \ + EFI_ACPI_6_3_PPTT_TYPE_CACHE, \ + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), \ + { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \ + { \ + 1, /* SizePropertyValid */ \ + 1, /* NumberOfSetsValid */ \ + 1, /* AssociativityValid */ \ + 1, /* AllocationTypeValid */ \ + 1, /* CacheTypeValid */ \ + 0, /* WritePolicyValid */ \ + 1, /* LineSizeValid */ \ + }, \ + 0, /* NextLevelOfCache */ \ + SBSAQEMU_L1_I_CACHE_SIZE, /* Size */ \ + SBSAQEMU_L1_I_CACHE_SETS, /* NumberOfSets */ \ + SBSAQEMU_L1_I_CACHE_ASSC, /* Associativity */ \ + { \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ, \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, \ + 0, \ + }, \ + 64 /* LineSize */ \ + } + +#define SBSAQEMU_ACPI_PPTT_L2_CACHE_STRUCT { \ + EFI_ACPI_6_3_PPTT_TYPE_CACHE, \ + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), \ + { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \ + { \ + 1, /* SizePropertyValid */ \ + 1, /* NumberOfSetsValid */ \ + 1, /* AssociativityValid */ \ + 1, /* AllocationTypeValid */ \ + 1, /* CacheTypeValid */ \ + 1, /* WritePolicyValid */ \ + 1, /* LineSizeValid */ \ + }, \ + 0, /* NextLevelOfCache */ \ + SBSAQEMU_L2_CACHE_SIZE, /* Size */ \ + SBSAQEMU_L2_CACHE_SETS, /* NumberOfSets */ \ + SBSAQEMU_L2_CACHE_ASSC, /* Associativity */ \ + { \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, \ + }, \ + 64 /* LineSize */ \ + } + +#define SBSAQEMU_ACPI_PPTT_CLUSTER_STRUCT { \ + EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, \ + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR), \ + { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \ + { \ + EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, /* PhysicalPackage */ \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, /* AcpiProcessorIdValid */ \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, /* Is not a Thread */ \ + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, /* Not Leaf */ \ + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, /* Identical Cores */ \ + }, \ + 0, /* Parent */ \ + 0, /* AcpiProcessorId */ \ + 0, /* NumberOfPrivateResources */ \ + } + +#define SBSAQEMU_ACPI_PPTT_CORE_STRUCT { \ + EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, \ + (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + (2 * sizeof (UINT32))), \ + { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \ + { \ + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, /* PhysicalPackage */ \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, /* AcpiProcessorValid */ \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, /* Is not a Thread */ \ + EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, /* Leaf */ \ + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, /* Identical Cores */ \ + }, \ + 0, /* Parent */ \ + 0, /* AcpiProcessorId */ \ + 2, /* NumberOfPrivateResources */ \ + } + #endif diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index ebffa1db4734..e27489cd7123 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -338,6 +338,111 @@ AddSsdtTable ( return Status; } +/* + * A function that adds the SSDT ACPI table. + */ +EFI_STATUS +AddPpttTable ( + IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable + ) +{ + EFI_STATUS Status; + UINTN TableHandle; + UINT32 TableSize; + EFI_PHYSICAL_ADDRESS PageAddress; + UINT8 *New; + UINT32 CpuId; + UINT32 NumCores = PcdGet32 (PcdCoreCount); + + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1DCache = SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1ICache = SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache = SBSAQEMU_ACPI_PPTT_L2_CACHE_STRUCT; + + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster = SBSAQEMU_ACPI_PPTT_CLUSTER_STRUCT; + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core = SBSAQEMU_ACPI_PPTT_CORE_STRUCT; + + EFI_ACPI_DESCRIPTION_HEADER Header = + SBSAQEMU_ACPI_HEADER ( + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, + EFI_ACPI_DESCRIPTION_HEADER, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION); + + TableSize = sizeof (EFI_ACPI_DESCRIPTION_HEADER) + + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + + (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE) * 3) + + (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) * NumCores) + + (sizeof (UINT32) * 2 * NumCores); + + Status = gBS->AllocatePages ( + AllocateAnyPages, + EfiACPIReclaimMemory, + EFI_SIZE_TO_PAGES (TableSize), + &PageAddress + ); + if (EFI_ERROR(Status)) { + DEBUG((EFI_D_ERROR, "Failed to allocate pages for PPTT table\n")); + return EFI_OUT_OF_RESOURCES; + } + + New = (UINT8 *)(UINTN) PageAddress; + ZeroMem (New, TableSize); + + // Add the ACPI Description table header + CopyMem (New, &Header, sizeof (EFI_ACPI_DESCRIPTION_HEADER)); + ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length = TableSize; + New += sizeof (EFI_ACPI_DESCRIPTION_HEADER); + + // Add the Cluster PPTT structure + CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + + // Add L1 D Cache structure + CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); + ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE*) New)->NextLevelOfCache = L2_CACHE_INDEX; + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + + // Add L1 I Cache structure + CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); + ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE*) New)->NextLevelOfCache = L2_CACHE_INDEX; + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + + // Add L2 Cache structure + CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); + ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE*) New)->NextLevelOfCache = 0; /* L2 is LLC */ + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + + for (CpuId = 0; CpuId < NumCores; CpuId++) { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *CorePtr; + UINT32 *PrivateResourcePtr; + + CopyMem (New, &Core, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); + CorePtr = (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *) New; + CorePtr->Parent = CLUSTER_INDEX; + CorePtr->AcpiProcessorId = CpuId; + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + + PrivateResourcePtr = (UINT32 *) New; + PrivateResourcePtr[0] = L1_D_CACHE_INDEX; + PrivateResourcePtr[1] = L1_I_CACHE_INDEX; + New += (2 * sizeof (UINT32)); + } + + // Perform Checksum + AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); + + Status = AcpiTable->InstallAcpiTable ( + AcpiTable, + (EFI_ACPI_COMMON_HEADER *)PageAddress, + TableSize, + &TableHandle + ); + if (EFI_ERROR(Status)) { + DEBUG((EFI_D_ERROR, "Failed to install PPTT table\n")); + } + + return Status; +} + EFI_STATUS EFIAPI InitializeSbsaQemuAcpiDxe ( @@ -372,5 +477,10 @@ InitializeSbsaQemuAcpiDxe ( DEBUG((EFI_D_ERROR, "Failed to add SSDT table\n")); } + Status = AddPpttTable (AcpiTable); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "Failed to add PPTT table\n")); + } + return EFI_SUCCESS; } -- 2.28.0