From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f196.google.com (mail-pg1-f196.google.com [209.85.215.196]) by mx.groups.io with SMTP id smtpd.web12.13660.1598362806260873955 for ; Tue, 25 Aug 2020 06:40:06 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=bcNQTq4u; spf=pass (domain: linaro.org, ip: 209.85.215.196, mailfrom: tanmay.jagdale@linaro.org) Received: by mail-pg1-f196.google.com with SMTP id h12so6846636pgm.7 for ; Tue, 25 Aug 2020 06:40:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ZHi7j7Y6UliXa4sqtZtW+W631DcBWEo0XeuRXFJguCc=; b=bcNQTq4uA3tMSZUo+xOls6zQNcrFpWEMPId6b9i+uQcfbBspHilmy6cQMTB7J6FumV U9ls4Z7lOO9eCrTuyzFakQswtM/EEVNiRWqCiFImD3uYJlOKuBXD5C07NkV9JvvYFjyN 2aDGjTb80lEK8HbngmUTyx8lpPT6qoUXjmHaq6cIR87LR6VU1HSoLPc5b6x53jWhRKkb ndK2ioZ5Gi/G6a9VSn5LikdowqiO03muNGT1naVsyctNngcSx44GninRMnv+m5imPqCL GnTx/28Oipk+ZP9qZRdeB5qetLTCKzxkGmc5e40OComYKEfQgjvr4YqTe0hbouQSYOHM eu5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ZHi7j7Y6UliXa4sqtZtW+W631DcBWEo0XeuRXFJguCc=; b=Zmoe9CgmdzWzMe6yqcrEQnEwwLc0MdnWiAivEl3PrPulViWywthwv8a7G7ojcqNd+a 2CPKfUBFnVqoJ+mSdlWD5HwOErb/mN7InpDJEgAhBNDOOSDT9LtT+GR+tNoSa4H4GbGq zs99Bw70cUjrfhm8Z9yGxfpN8KGIv2Gp/G3ZqpNX80gyXHLDTDvv3kDqIj9w6C54+hwV ccHGCkFa0QejvxBVFpdQxUpGTTOox7weXzA3oM7iz4FP22zFYD8H3GrHz272UEFI1sji 0tTJK16LuVyzWqEpiuDC7pF641p+HpSI8uYE7V6xTBQaaV1wl+O9rj4I+wb2ReyXRoTK x08Q== X-Gm-Message-State: AOAM533K/IQnZnd+iJ6s/5zhyBUxpnS4K4e4pFPDIm4ZC2Fg3CCB0C0i Z789jlTIVGFCCS4CC0Mgz9kueA== X-Google-Smtp-Source: ABdhPJxOfsl5A9viLOmlSJH/Xim1odZ2RkHGU1Q1ftpuHRSmY/DQIBw5qEXaQ3FblXQ3U1J55Znu6w== X-Received: by 2002:aa7:9ec4:: with SMTP id r4mr8085904pfq.48.1598362805699; Tue, 25 Aug 2020 06:40:05 -0700 (PDT) Return-Path: Received: from bean-canyon.localdomain ([106.51.140.68]) by smtp.googlemail.com with ESMTPSA id z186sm3913768pfb.199.2020.08.25.06.40.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Aug 2020 06:40:05 -0700 (PDT) From: "Tanmay Jagdale" To: leif@nuviainc.com, graeme@nuviainc.com, devel@edk2.groups.io Cc: shashi.mallela@linaro.org, Tanmay Jagdale Subject: [PATCH v3 edk2-platforms 0/8] Add ACPI tables support for SbsaQemu Date: Tue, 25 Aug 2020 19:09:50 +0530 Message-Id: <20200825133958.17372-1-tanmay.jagdale@linaro.org> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patch series adds ACPI tables support for the SbsaQemu platform. We are using a pseudo static approach to create the ACPI tables. The ACPI tables namely DBG2, DSDT, MCFG, SPCR, GTDT are created in a static way at compile time because they hold a fixed configuration and there are no changes at runtime. The MADT, SSDT and PPTT tables are dependant on the number of CPUs and hence they are created at runtime based on the number of CPUs the user has requested Changes in v3: - Dropped ASSERT() in CountCpusFromFdt() function in patch 4. - Changed EFI_D_ERROR to DEBUG_ERROR Changes in v2: - Moved PcdCoreCount and Fdtlib related changes in SbsaQemu.dsc to a separate patch (Patch 3). - Removed Acpi6x.h header file includes and used IndustryStandard/Acpi.h - Whitespace cleanups - Added proper code comments Tanmay Jagdale (8): SbsaQemu: Initial support for static ACPI tables SbsaQemu: AcpiTables: Add PCI support and MCFG Table SbsaQemu: SbsaQemu.dsc: Move CoreCount and Fdtlib SbsaQemu: Add new ACPI driver and FDT parser to count CPUs SbsaQemu: AcpiDxe: Create MADT table at runtime SbsaQemu: AcpiDxe: Create SSDT table at runtime SbsaQemu: AcpiDxe: Create PPTT table at runtime SbsaQemu: AcpiTables: Add DBG2 Table Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 8 +- Silicon/Qemu/SbsaQemu/Acpi.dsc.inc | 36 ++ Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 12 +- Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 9 + Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 47 ++ Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 67 +++ Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h | 199 ++++++++ Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 485 ++++++++++++++++++++ Silicon/Qemu/SbsaQemu/AcpiTables/Dbg2.aslc | 67 +++ Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 449 ++++++++++++++++++ Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc | 80 ++++ Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 67 +++ Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc | 43 ++ Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc | 53 +++ 14 files changed, 1618 insertions(+), 4 deletions(-) create mode 100644 Silicon/Qemu/SbsaQemu/Acpi.dsc.inc create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf create mode 100644 Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Dbg2.aslc create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc -- 2.28.0