From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by mx.groups.io with SMTP id smtpd.web12.14045.1598363869312986976 for ; Tue, 25 Aug 2020 06:57:49 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=gKxkU6EY; spf=pass (domain: nuviainc.com, ip: 209.85.221.65, mailfrom: leif@nuviainc.com) Received: by mail-wr1-f65.google.com with SMTP id b18so2148741wrs.7 for ; Tue, 25 Aug 2020 06:57:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=Mwp0M3hKDNjwkCYn5+0BVrJotYYBXiOvIurOpbV6C8w=; b=gKxkU6EYV/tQb9io/n87OAa0I2RaTlNn4nA62qZcF9ivIlSe7WxJC8Ak1pehsHWi6L pzOG3wS/yCKNCYRhQDtDjHA1tanPQCTSxEKDPHyNoGwSibPJrGJc8IZNB4C7yI1yslBz Jx19dDGN0fNWZCDBM4ZKchAAwLed8I1D5R2LEKHSsmKBs+xN18nXfZJv45BHZTyC5z6a +c1Uf3lh3wtfi6qbqt9Rn/ditQlbF375iPOyBLZluq6e7fzrMZeT8ug9fpE+ECTiBpUh WwVPzacHLI4XPw+ccSsFydFYUg+R5JRvnAMEJWG3QWj0USpsyzcaoTxUfryNTz3ihnLE 01JA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=Mwp0M3hKDNjwkCYn5+0BVrJotYYBXiOvIurOpbV6C8w=; b=IVI7re1WZPmoYRkKnTIi1wdQ7W97Vck0z4hnkM3lwTv42g+/ZHxbIdmnZ+iPQnqPwF jMVmlyx7Gzk6B2EmgGOdAwd9L5vaTtszz0abRMoZ8EBxp8kvOkya2CPG5HlCwqqNkd6J wLoh1rQMJE7+8vQOFEUVuNWERz66tAGO0RllsypgP5RiHn45fQJ47rGdjW0fMCQwk+Dr 2k97pF1rEsB+D5k9h3QCaTQnAMpvGixgoE/89/RBgKBrK3pC2WIYbIayl8LGXaYco5SK yjFM+Pw9lXEWm1+RV8k0U9/IvyR7tb7Na+9seaTz5mFTVpVyl3/zot6189OWvo1DZojR pD2Q== X-Gm-Message-State: AOAM531fiUZkoY3Z8cZ3+w4RaynDVo1J5i3YaV/9kPDXHI4bnIjW8Tf7 ZJZjS6bzEnGjAkXtnUuEmc/NHg== X-Google-Smtp-Source: ABdhPJxJOUBj4wdvPKNa91/TKwy5nh1v5cN4eKK8iPyHDSrVM3Xe+gg41VTxA6SAv6/rTj+7hcizgw== X-Received: by 2002:adf:eec4:: with SMTP id a4mr10647439wrp.325.1598363867702; Tue, 25 Aug 2020 06:57:47 -0700 (PDT) Return-Path: Received: from vanye ([2001:470:1f09:12f0:b26e:bfff:fea9:f1b8]) by smtp.gmail.com with ESMTPSA id x133sm6271614wmg.39.2020.08.25.06.57.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Aug 2020 06:57:46 -0700 (PDT) Date: Tue, 25 Aug 2020 14:57:44 +0100 From: "Leif Lindholm" To: Tanmay Jagdale Cc: graeme@nuviainc.com, devel@edk2.groups.io, shashi.mallela@linaro.org Subject: Re: [PATCH v3 edk2-platforms 0/8] Add ACPI tables support for SbsaQemu Message-ID: <20200825135744.GQ1191@vanye> References: <20200825133958.17372-1-tanmay.jagdale@linaro.org> MIME-Version: 1.0 In-Reply-To: <20200825133958.17372-1-tanmay.jagdale@linaro.org> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Aug 25, 2020 at 19:09:50 +0530, Tanmay Jagdale wrote: > This patch series adds ACPI tables support for the SbsaQemu platform. > We are using a pseudo static approach to create the ACPI tables. > > The ACPI tables namely DBG2, DSDT, MCFG, SPCR, GTDT are created in a > static way at compile time because they hold a fixed configuration > and there are no changes at runtime. > > The MADT, SSDT and PPTT tables are dependant on the number of CPUs and > hence they are created at runtime based on the number of CPUs the user > has requested > > Changes in v3: > - Dropped ASSERT() in CountCpusFromFdt() function in patch 4. > - Changed EFI_D_ERROR to DEBUG_ERROR > > Changes in v2: > - Moved PcdCoreCount and Fdtlib related changes in SbsaQemu.dsc to a > separate patch (Patch 3). > - Removed Acpi6x.h header file includes and used IndustryStandard/Acpi.h > - Whitespace cleanups > - Added proper code comments Thanks for quick respin. For the series: Reviewed-by: Leif Lindholm Pushed as 23863e9e9d40..90c3b3bc0c3e. > Tanmay Jagdale (8): > SbsaQemu: Initial support for static ACPI tables > SbsaQemu: AcpiTables: Add PCI support and MCFG Table > SbsaQemu: SbsaQemu.dsc: Move CoreCount and Fdtlib > SbsaQemu: Add new ACPI driver and FDT parser to count CPUs > SbsaQemu: AcpiDxe: Create MADT table at runtime > SbsaQemu: AcpiDxe: Create SSDT table at runtime > SbsaQemu: AcpiDxe: Create PPTT table at runtime > SbsaQemu: AcpiTables: Add DBG2 Table > > Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 8 +- > Silicon/Qemu/SbsaQemu/Acpi.dsc.inc | 36 ++ > Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 12 +- > Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 9 + > Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 47 ++ > Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 67 +++ > Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h | 199 ++++++++ > Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 485 ++++++++++++++++++++ > Silicon/Qemu/SbsaQemu/AcpiTables/Dbg2.aslc | 67 +++ > Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 449 ++++++++++++++++++ > Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc | 80 ++++ > Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 67 +++ > Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc | 43 ++ > Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc | 53 +++ > 14 files changed, 1618 insertions(+), 4 deletions(-) > create mode 100644 Silicon/Qemu/SbsaQemu/Acpi.dsc.inc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf > create mode 100644 Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h > create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Dbg2.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc > > -- > 2.28.0 >