From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web12.18041.1598532369060746523 for ; Thu, 27 Aug 2020 05:46:09 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=0508fb1276=abner.chang@hpe.com) Received: from pps.filterd (m0150241.ppops.net [127.0.0.1]) by mx0a-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 07RChPi4025232 for ; Thu, 27 Aug 2020 12:46:08 GMT Received: from g4t3427.houston.hpe.com (g4t3427.houston.hpe.com [15.241.140.73]) by mx0a-002e3701.pphosted.com with ESMTP id 3358vwxxec-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 27 Aug 2020 12:46:08 +0000 Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g4t3427.houston.hpe.com (Postfix) with ESMTP id 1F1929C for ; Thu, 27 Aug 2020 12:46:08 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.39]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id 3ABC94E; Thu, 27 Aug 2020 12:46:07 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Daniel Schaefer Subject: [edk2-plaforms PATCH 3/3] Platform/U5SeriesPkg: Revise Readme.md Date: Thu, 27 Aug 2020 20:03:05 +0800 Message-Id: <20200827120305.26095-4-abner.chang@hpe.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200827120305.26095-1-abner.chang@hpe.com> References: <20200827120305.26095-1-abner.chang@hpe.com> X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-08-27_07:2020-08-27,2020-08-27 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 phishscore=0 bulkscore=0 mlxscore=0 adultscore=0 spamscore=0 malwarescore=0 mlxlogscore=999 suspectscore=0 lowpriorityscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2008270095 X-MIME-Autoconverted: from 8bit to quoted-printable by mx0a-002e3701.pphosted.com id 07RChPi4025232 Content-Type: text/plain; charset=y Content-Transfer-Encoding: quoted-printable Update RISC-V U5SeriesPkg Readme.md to align with the latest implementati= on. Signed-off-by: Abner Chang Co-authored-by: Daniel Schaefer Cc: Daniel Schaefer --- Platform/SiFive/U5SeriesPkg/Readme.md | 112 +++++++++++++------------- 1 file changed, 58 insertions(+), 54 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/Readme.md b/Platform/SiFive/U5Se= riesPkg/Readme.md index 4d293e54f6..4d404efec4 100644 --- a/Platform/SiFive/U5SeriesPkg/Readme.md +++ b/Platform/SiFive/U5SeriesPkg/Readme.md @@ -1,61 +1,59 @@ -=EF=BB=BF# Introduction -U5SeriesPkg provides the common EFI library and driver modules for SiFiv= e -U5 series core platforms. Currently the supported platforms are Freedom -U500 VC707 platform and Freedom U540 HiFive Unleashed platform. - -Both platforms are built with below common packages, -- **U5SeriesPkg**, edk2 platform branch - (Currently is in edk2-platforms/devel-riscvplatforms branch) -- **RiscVPlatformPkg**, edk2 master branch - (Currently is in edk2-staging/RISC-V-V2 branch) -- **RiscVPkg**, edk2 master branch - (Currently is in edk2-staging/RISC-V-V2 branch) +# Introduction of SiFive U5 Series Platforms +U5SeriesPkg provides the common EDK2 libraries and drivers for SiFive U5= series platforms. Currently the supported +platforms are Freedom U500 VC707 platform and Freedom U540 HiFive Unleas= hed platform. + +Both platforms are built with below common edk2 packages under edk2-plat= forms repository, +- [**U5SeriesPkg**](https://github.com/tianocore/edk2-platforms/tree/mas= ter/Platform/SiFive/U5SeriesPkg) +- [**RiscVPlatformPkg**](https://github.com/tianocore/edk2-platforms/tre= e/master/Platform/RISC-V/PlatformPkg) +- [**RiscVProcessorPkg**](https://github.com/tianocore/edk2-platforms/tr= ee/master/Silicon/RISC-V/ProcessorPkg) =20 ## U500 Platform -This is a sample RISC-V EDK2 platform package used agaist SiFive Freedom= U500 +This is a sample RISC-V EDK2 platform package used against to SiFive Fre= edom U500 VC707 FPGA Dev Kit, please refer to "SiFive Freedom U500 VC707 FPGA Gett= ing Started Guide" on https://www.sifive.com/documentation. +The binary built from Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board = can run on U500 VC707 FPGA board. +``` +build -a RISCV64 -t GCC5 -p Platform/SiFive/U5SeriesPkg/FreedomU500VC707= Board/U500.dsc +``` =20 ## U540 Platform -This is a sample RISC-V EDK2 platform package used against SiFive Freedo= m U540 -HiFive Unleashed development board, please refer to "SiFive Freedom U540= -C000 -Manual" on https://www.sifive.com. -The binary built from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnlea= shedBoard/ -can run on main stream [QEMU](https://git.qemu.org/?p=3Dqemu.git;a=3Dsum= mary) -using qemu-system-riscv64 under riscv64-softmmu. Launch the binary with +This is a sample RISC-V EDK2 platform package used for the SiFive Freedo= m U540 HiFive Unleashed development board, please refer to "SiFive Freedo= m U540-C000 Manual" on https://www.sifive.com. +The binary built from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnlea= shedBoard/ can run on both hardware and +[QEMU](https://git.qemu.org/?p=3Dqemu.git;a=3Dsummary). It is confirmed = that version 5.0 of QEMU can boot the firmware. +``` +build -a RISCV64 -t GCC5 -p Platform/SiFive/U5SeriesPkg/FreedomU540HiFiv= eUnleashedBoard/U540.dsc +``` +For running U540 edk2 binary on QEMU, use qemu-system-riscv64 under risc= v64-softmmu to launch the binary with +below parameters, =20 ``` --cpu sifive-u54 -machine sifive_u +qemu-system-riscv64 -cpu sifive-u54 -machine sifive_u -bios U540.fd -m 2= 048 -nographic -smp cpus=3D5,maxcpus=3D5 ``` =20 -## Download the sources +## Download the Source Code ``` -git clone https://github.com/tianocore/edk2-staging.git -# Checkout RISC-V-V2 branch +git clone https://github.com/tianocore/edk2.git git clone https://github.com/tianocore/edk2-platforms.git -# Checkout devel-riscvplatforms branch -git clone https://github.com/tianocore/edk2-non-osi.git ``` - -## Platform Owners -Chang, Abner -Chen, Gilbert +Refer to [Readme.md](https://github.com/tianocore/edk2-platforms/blob/ma= ster/Platform/RISC-V/PlatformPkg/Readme.md) for building RISC-V platforms. =20 ## Platform Status -Currently the binary built from U500Pkg can boot SiFive Freedom U500 VC7= 07 +**FreedomU500VC707Board** +Currently the binary built from U500 edk2 package can boot SiFive Freedo= m U500 VC707 FPGA to EFI shell with console in/out enabled. =20 -## Linux Build Instructions -You can build the RISC-V platform using below script, -`build -a RISCV64 -t GCC5 -p Platform/SiFive/U5SeriesPkg/FreedomU500VC7= 07Board/U500.dsc` +**FreedomU540HiFiveUnleashedBoard** +Currently the binary built from U540 edk2 package can boot SiFive Freedo= m U540 HiFive Unleashed +to EFI shell with console in/out enabled and Linux kernel. Please refer = to https://github.com/riscv/riscv-uefi-edk2-docs for booting to Linux ker= nel. =20 ## Supported Operating Systems -Only support to boot to EFI Shell so far. +Please refer to https://github.com/riscv/riscv-uefi-edk2-docs. =20 ## Known Issues and Limitations Only RISC-V RV64 is verified on this platform. =20 ## Related Materials +- [RISC-V UEFI Documents](https://github.com/riscv/riscv-uefi-edk2-docs) - [RISC-V OpenSbi](https://github.com/riscv/opensbi) - [SiFive U500 VC707 FPGA Getting Started Guide](https://sifive.cdn.pris= mic.io/sifive%2Fc248fabc-5e44-4412-b1c3-6bb6aac73a2c_sifive-u500-vc707-ge= ttingstarted-v0.2.pdf) - [SiFive Freedom U540-C000 Manual](https://sifive.cdn.prismic.io/sifive= %2F834354f0-08e6-423c-bf1f-0cb58ef14061_fu540-c000-v1.0.pdf) @@ -63,48 +61,54 @@ Only RISC-V RV64 is verified on this platform. =20 ## U5SeriesPkg Libraries and Drivers ### PeiCoreInfoHobLib -This is the library to create RISC-V core characteristics for building u= p -RISC-V related SMBIOS records to support the unified boot loader and OS = image. +This is the library to create RISC-V core characteristics for building u= p RISC-V related SMBIOS records to support +the single boot loader image or OS image on the RISC-V variants This library leverage the silicon libraries provided in Silicon/SiFive. =20 ### RiscVPlatformTimerLib -This is common U5 series platform timer library which has the -platform-specific timer implementation. +This is common U5 series platform timer library which has the platform-s= pecific timer implementation. + +### SerialLib +This is common U5 series platform serial port library. =20 ### TimerDxe -This is U5 series platform timer DXE driver whcih has the platform-speci= fic -timer implementation. +This is common U5 series platform timer DXE driver which has the platfor= m-specific timer implementation. =20 ## U500 Platform Libraries and Drivers ### RiscVOpensbiPlatformLib -In order to reduce the dependencies with RISC-V OpenSBI project -(https://github.com/riscv/opensbi) and fewer burdens to EDK2 build proce= ss, the -implementation of RISC-V EDK2 platform is leveraging platform source cod= e from +In order to reduce the dependencies with RISC-V OpenSBI project (https:/= /github.com/riscv/opensbi) and fewer +burdens to EDK2 build process, the implementation of RISC-V EDK2 platfor= m is leveraging platform source code from OpenSBI code tree. The "platform.c" under OpenSbiPlatformLib is cloned f= rom -RISC-V OpenSBI code tree (in EDK2 RiscVPkg) and built based on EDK2 buil= d -environment. +[RISC-V OpenSBI code tree](Silicon/RISC-V/ProcessorPkg/Library/RiscVOpen= sbiLib/opensbi) and built based on edk2 +build environment. =20 ### PlatformPei -This is the platform-implementation specific library which is executed i= n early -PEI phase for U500 platform initialization. +This is the platform-implementation specific library which is executed i= n early PEI phase for U500 platform +initialization. =20 ## U540 Platform Libraries and Drivers ### RiscVOpensbiPlatformLib -In order to reduce the dependencies with RISC-V OpenSBI project -(https://github.com/riscv/opensbi) and fewer burdens to EDK2 build proce= ss, the -implementation of RISC-V EDK2 platform is leveraging platform source cod= e from +In order to reduce the dependencies with RISC-V OpenSBI project (https:/= /github.com/riscv/opensbi) and fewer +burdens to EDK2 build process, the implementation of RISC-V EDK2 platfor= m is leveraging platform source code from OpenSBI code tree. The "platform.c" under OpenSbiPlatformLib is cloned f= rom -RISC-V OpenSBI code tree (in EDK2 RiscVPkg) and built based on EDK2 buil= d -environment. +[RISC-V OpenSBI code tree](Silicon/RISC-V/ProcessorPkg/Library/RiscVOpen= sbiLib/opensbi) and built based on edk2 +build environment. =20 ### PlatformPei -This is the platform-implementation specific library which is executed i= n early -PEI phase for U540 platform initialization. +This is the platform-implementation specific library which is executed i= n early PEI phase for U540 platform +initialization. =20 ## U5SeriesPkg Platform PCD settings =20 | **PCD name** |**Usage**| |----------------|----------| +|PcdU5PlatformSystemClock| U5 series platform system clock| |PcdNumberofU5Cores| Number of U5 core enabled on U5 series platform| |PcdE5MCSupported| Indicates whether the Monitor Core (E5) is supported = on U5 series platform| |PcdU5UartBase|Platform serial port base address| + + +## Platform Owners +Chang, Abner +Chen, Gilbert +Schaefer, Daniel \ No newline at end of file --=20 2.25.0