From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) by mx.groups.io with SMTP id smtpd.web12.21362.1598541699296927113 for ; Thu, 27 Aug 2020 08:21:39 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=Mpcfp5E/; spf=pass (domain: nuviainc.com, ip: 209.85.221.67, mailfrom: graeme@nuviainc.com) Received: by mail-wr1-f67.google.com with SMTP id l7so1941376wrx.8 for ; Thu, 27 Aug 2020 08:21:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=hxCozOrUiGzJkX9CB8PHi+gsXz+pYK7433z2g2DrDcM=; b=Mpcfp5E/hbKpwFNMYtn6PtwGL60JYdvS7y1bPvj4TeoDDXMSGfy0+pOOP9HkDmcro2 p5iYnlSphziRX9/xiJHYDzpKTYaoxUmbbQ9hFFuiKyVXg8cOP13w97VMAVqCSaDAbasd 8YvYi/ccdw/O7t0gvECQCz0uGocUSZuv8OsYrJaXrPiT5WFDw4TLDyD28Ef+7ChP2NB4 nkuI5MfEOXMjszPdJYQTbnbmawPKiYu8j+sjAgrDQNBOkTY83yApfgojLM8MhovNF23H aw/aTb2g6VcqJhrBCmBUvs0lE7AiIEUJndwhrCfd4dqHFK88uKhFYrxVEQhVddKF/TiU GGEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=hxCozOrUiGzJkX9CB8PHi+gsXz+pYK7433z2g2DrDcM=; b=jHdzm02PSOVX4uEJHnry2nmeDYbQMe0ts7mWtpRIXI+NgUd/8kUWQWAn93KKKqSNhz E+emX4cqoE/N4bzFHRrgY+Mv4yySpO1OkB3YrZzQS/0N5ZFaPt3+RO0aBNfP7g6KZ9DB c+aVoFOveaxUklAE2wWXSi5XIRBytqOKgFQcMuY8aq0r6R21auQ3IDf82h+xNZohfhl2 e0PvG3UY9qPCU4aMtyqjaaEdmQumziNoYIwoagjNYZwTVyRnpDs1E+qjhFIdrbK/KrJj 8xDS2LIvnDeQY4l2126mjynUBGsSWKdObInYWezX40chHVBGqL2X9VY+3mxYNfWewCj4 plhg== X-Gm-Message-State: AOAM5306Y3OeszrDlSbyfWCAZ3jokpAwDyo2k1FnzbqK04V87X28AZaS 93f82UrREbpBIhvlPepciiI92ltfObhZun8pq83MwCdNmH41MeuuPld5iew+SAISE5FqQs7HmqU K0HKB8XNZCZDO/7ElPK6kUcyiK2q+0xM1QiAAJzmvMiZBScPf+A9yR+uTn6/u+DaMuqllHCk= X-Google-Smtp-Source: ABdhPJyL4kzr3cDKBeUgvlWDyqlkx3Jm9PeikPkY3fOctUYY5W+9i5yt8pfXYF9k90/xxXgsv53OtQ== X-Received: by 2002:a5d:4a8d:: with SMTP id o13mr20058909wrq.194.1598541697389; Thu, 27 Aug 2020 08:21:37 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2a02:8010:64d6::1d89]) by smtp.gmail.com with ESMTPSA id o5sm5264524wmc.33.2020.08.27.08.21.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2020 08:21:36 -0700 (PDT) From: "Graeme Gregory" To: devel@edk2.groups.io Cc: leif@nuviainc.com, tanmay.jagdale@linaro.org, Graeme Gregory Subject: [edk2-plaforms PATCH 1/1] SbsaQemu: Fix numerous SSDT generation problems Date: Thu, 27 Aug 2020 16:21:33 +0100 Message-Id: <20200827152133.255281-1-graeme@nuviainc.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 1 - The SBSAQEMU_ACPI_ITOA contained a typo that put bogus characters in the name if number of CPUs was greater than 10. It is safter to use the AsciiSPrint function from PrintLib. 2 - The _UID fields were bogus, and indicated as bytes in AML instead of a word. This caused extra Zero's to appear in disassembly. Fixed by making them AML_WORD_PREFIX and putting CpuId in little endian. 3 - The table was a number of bytes too long causes bogus Zero in dissassembly at end of table. Re-adjust code slightly to reduce table size once we know the size of the length field. Signed-off-by: Graeme Gregory --- This patch supercedes "SbsaQemu: Fix CPUID generation in SSDT" as while fixing review comments on that I found the other issues. .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 1 + .../Include/IndustryStandard/SbsaQemuAcpi.h | 5 +--- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 25 +++++++++++-------- 3 files changed, 16 insertions(+), 15 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index cde9d02f7f90..127eef029f3c 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -36,6 +36,7 @@ [LibraryClasses] DxeServicesLib FdtLib PcdLib + PrintLib UefiDriverEntryPoint UefiLib UefiRuntimeServicesTableLib diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h index 1a7d9dda2b99..f085765d2677 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -50,9 +50,6 @@ #define SBSAQEMU_ACPI_CPU_DEV_LEN 0x1C #define SBSAQEMU_ACPI_CPU_DEV_NAME { 'C', '0', '0', '0' } -// Macro to convert Integer to Character -#define SBSAQEMU_ACPI_ITOA(Byte) (0x30 + (Byte > 9 ? (Byte + 1) : Byte)) - #define SBSAQEMU_ACPI_CPU_HID { \ AML_NAME_OP, AML_NAME_CHAR__, 'H', 'I', 'D', \ AML_STRING_PREFIX, 'A', 'C', 'P', 'I', '0', '0', '0', '7', \ @@ -60,7 +57,7 @@ } #define SBSAQEMU_ACPI_CPU_UID { \ - AML_NAME_OP, AML_NAME_CHAR__, 'U', 'I', 'D', AML_BYTE_PREFIX, \ + AML_NAME_OP, AML_NAME_CHAR__, 'U', 'I', 'D', AML_WORD_PREFIX, \ AML_ZERO_OP, AML_ZERO_OP \ } diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 06552f4b22f3..47a9bd1d423a 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -248,6 +249,7 @@ AddSsdtTable ( UINT32 TableSize; EFI_PHYSICAL_ADDRESS PageAddress; UINT8 *New; + UINT8 *HeaderAddr; UINT32 CpuId; UINT32 Offset; UINT8 ScopeOpName[] = SBSAQEMU_ACPI_SCOPE_NAME; @@ -283,12 +285,12 @@ AddSsdtTable ( return EFI_OUT_OF_RESOURCES; } - New = (UINT8 *)(UINTN) PageAddress; + HeaderAddr = New = (UINT8 *)(UINTN) PageAddress; ZeroMem (New, TableSize); // Add the ACPI Description table header CopyMem (New, &Header, sizeof (EFI_ACPI_DESCRIPTION_HEADER)); - ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length = TableSize; + New += sizeof (EFI_ACPI_DESCRIPTION_HEADER); // Insert the top level ScopeOp @@ -296,6 +298,11 @@ AddSsdtTable ( New++; Offset = SetPkgLength (New, (TableSize - sizeof (EFI_ACPI_DESCRIPTION_HEADER) - 1)); + + // Adjust TableSize now we know header length of _SB + TableSize -= (SBSAQEMU_ACPI_SCOPE_OP_MAX_LENGTH - Offset); + ((EFI_ACPI_DESCRIPTION_HEADER*) HeaderAddr)->Length = TableSize; + New += Offset; CopyMem (New, &ScopeOpName, sizeof (ScopeOpName)); New += sizeof (ScopeOpName); @@ -303,21 +310,17 @@ AddSsdtTable ( // Add new Device structures for the Cores for (CpuId = 0; CpuId < NumCores; CpuId++) { SBSAQEMU_ACPI_CPU_DEVICE *CpuDevicePtr; - UINT8 CpuIdByte1, CpuIdByte2, CpuIdByte3; CopyMem (New, &CpuDevice, sizeof (SBSAQEMU_ACPI_CPU_DEVICE)); CpuDevicePtr = (SBSAQEMU_ACPI_CPU_DEVICE *) New; - CpuIdByte1 = CpuId & 0xF; - CpuIdByte2 = (CpuId >> 4) & 0xF; - CpuIdByte3 = (CpuId >> 8) & 0xF; + AsciiSPrint((CHAR8 *)&CpuDevicePtr->dev_name[1], 4, "%03X", CpuId); - CpuDevicePtr->dev_name[1] = SBSAQEMU_ACPI_ITOA(CpuIdByte3); - CpuDevicePtr->dev_name[2] = SBSAQEMU_ACPI_ITOA(CpuIdByte2); - CpuDevicePtr->dev_name[3] = SBSAQEMU_ACPI_ITOA(CpuIdByte1); + /* replace character lost by above NULL termination */ + CpuDevicePtr->hid[0] = AML_NAME_OP; - CpuDevicePtr->uid[6] = CpuIdByte1 | CpuIdByte2; - CpuDevicePtr->uid[7] = CpuIdByte3; + CpuDevicePtr->uid[6] = CpuId & 0xFF; + CpuDevicePtr->uid[7] = (CpuId >> 8) & 0xFF; New += sizeof (SBSAQEMU_ACPI_CPU_DEVICE); } -- 2.25.1