[PATCH v2 0/2] Add support for scanning Option ROMs

[PATCH v2 0/2] Add support for scanning Option ROMs

[Marcello Sylvester Bauer]

Fix Option ROM enumeration and support scanning.

v2:
* add correct Maintainer and Reviewer to Cc
* PciPlatformDxe:
  - Update description
  - add function description

Branch: https://github.com/9elements/edk2-1/tree/UefiPayloadPkg-Option_ROMs
PR: https://github.com/tianocore/edk2/pull/926

Patrick Rudolph (2):
  MdeModulePkg: Fix OptionROM scanning
  UefiPayloadPkg: Scan for Option ROMs

 UefiPayloadPkg/UefiPayloadPkgIa32.dsc                 |   1 +
 UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc              |   1 +
 UefiPayloadPkg/UefiPayloadPkg.fdf                     |   1 +
 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf      |  46 +++
 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h        |  19 +
 MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c |  10 +-
 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c        | 426 ++++++++++++++++++++
 7 files changed, 500 insertions(+), 4 deletions(-)
 create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
 create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h
 create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c

-- 
2.28.0

[PATCH v2 1/2] MdeModulePkg: Fix OptionROM scanning

[Marcello Sylvester Bauer]

From: Patrick Rudolph <patrick.rudolph@9elements.com>

The Option ROM scanner can't work as enumeration was done by the
first stage bootloader. Running it will disable the ability of the
PCIPlatform code to scan for ROMs.

Required for the following patch that enables custom Option ROM
scanning using gPciPlatformProtocol.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com>
Cc: Patrick Rudolph <patrick.rudolph@9elements.com>
Cc: Christian Walter <christian.walter@9elements.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index 6c68a97d4e46..7420f0079f7d 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -2530,10 +2530,12 @@ PciEnumeratorLight (
       //
       RemoveRejectedPciDevices (RootBridgeDev->Handle, RootBridgeDev);
 
-      //
-      // Process option rom light
-      //
-      ProcessOptionRomLight (RootBridgeDev);
+      if (!PcdGetBool (PcdPciDisableBusEnumeration)) {
+        //
+        // Process option rom light
+        //
+        ProcessOptionRomLight (RootBridgeDev);
+      }
 
       //
       // Determine attributes for all devices under this root bridge
-- 
2.28.0

Re: [edk2-devel] [PATCH v2 1/2] MdeModulePkg: Fix OptionROM scanning

[Laszlo Ersek]

Anthony, Julien, Rebecca, Peter,

FYI:

On 09/15/20 14:26, Marcello Sylvester Bauer wrote:
> From: Patrick Rudolph <patrick.rudolph@9elements.com>
> 
> The Option ROM scanner can't work as enumeration was done by the
> first stage bootloader. Running it will disable the ability of the
> PCIPlatform code to scan for ROMs.
> 
> Required for the following patch that enables custom Option ROM
> scanning using gPciPlatformProtocol.
> 
> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
> Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com>
> Cc: Patrick Rudolph <patrick.rudolph@9elements.com>
> Cc: Christian Walter <christian.walter@9elements.com>
> Cc: Hao A Wu <hao.a.wu@intel.com>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> ---
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
> index 6c68a97d4e46..7420f0079f7d 100644
> --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
> +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
> @@ -2530,10 +2530,12 @@ PciEnumeratorLight (
>        //
>        RemoveRejectedPciDevices (RootBridgeDev->Handle, RootBridgeDev);
>  
> -      //
> -      // Process option rom light
> -      //
> -      ProcessOptionRomLight (RootBridgeDev);
> +      if (!PcdGetBool (PcdPciDisableBusEnumeration)) {
> +        //
> +        // Process option rom light
> +        //
> +        ProcessOptionRomLight (RootBridgeDev);
> +      }
>  
>        //
>        // Determine attributes for all devices under this root bridge
> 

I suggest checking the effects of this patch on Xen and bhyve.

Thanks
Laszlo

[PATCH v2 2/2] UefiPayloadPkg: Scan for Option ROMs

[Marcello Sylvester Bauer]

From: Patrick Rudolph <patrick.rudolph@9elements.com>

Install the gPciPlatformProtocol to scan for Option ROMs.

For every device we probe the Option ROM and provide a pointer
to the activated BAR if found.

It's safe to assume that all ROM bars have been enumerated,
reserved in the bridge resources and are disabled by default.

Enabling them and leaving them enabled will do no harm.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com>
Cc: Patrick Rudolph <patrick.rudolph@9elements.com>
Cc: Christian Walter <christian.walter@9elements.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
---
 UefiPayloadPkg/UefiPayloadPkgIa32.dsc            |   1 +
 UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc         |   1 +
 UefiPayloadPkg/UefiPayloadPkg.fdf                |   1 +
 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf |  46 +++
 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h   |  19 +
 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c   | 426 ++++++++++++++++++++
 6 files changed, 494 insertions(+)

diff --git a/UefiPayloadPkg/UefiPayloadPkgIa32.dsc b/UefiPayloadPkg/UefiPayloadPkgIa32.dsc
index 12d7ffe81416..9f42d2cd6b74 100644
--- a/UefiPayloadPkg/UefiPayloadPkgIa32.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkgIa32.dsc
@@ -513,6 +513,7 @@ [Components.IA32]
   MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 !endif
   UefiPayloadPkg/GraphicsOutputDxe/GraphicsOutputDxe.inf
+  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
 
   #------------------------------
   #  Build the shell
diff --git a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
index 9bae1daa09bb..59fc1b79457b 100644
--- a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
@@ -514,6 +514,7 @@ [Components.X64]
   MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 !endif
   UefiPayloadPkg/GraphicsOutputDxe/GraphicsOutputDxe.inf
+  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
 
   #------------------------------
   #  Build the shell
diff --git a/UefiPayloadPkg/UefiPayloadPkg.fdf b/UefiPayloadPkg/UefiPayloadPkg.fdf
index 570a8ee7fdc1..9b188724221d 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.fdf
+++ b/UefiPayloadPkg/UefiPayloadPkg.fdf
@@ -151,6 +151,7 @@ [FV.DXEFV]
 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 !endif
 INF UefiPayloadPkg/GraphicsOutputDxe/GraphicsOutputDxe.inf
+INF UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
 
 #
 # SCSI/ATA/IDE/DISK Support
diff --git a/UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf b/UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
new file mode 100644
index 000000000000..96cedad5afc3
--- /dev/null
+++ b/UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
@@ -0,0 +1,46 @@
+## @file
+# This driver produces gEfiPciPlatform protocol to load PCI Option ROMs
+#
+# Copyright (c) 2020, 9elements Agency GmbH
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PciPlatformDxe
+  FILE_GUID                      = 86D58F7B-6E7C-401F-BDD4-E32E6D582AAD
+  MODULE_TYPE                    = UEFI_DRIVER
+  VERSION_STRING                 = 1.0
+  ENTRY_POINT                    = InstallPciPlatformProtocol
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+#  VALID_ARCHITECTURES           = IA32 X64
+#
+
+[Sources.common]
+  PciPlatformDxe.h
+  PciPlatformDxe.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+
+[LibraryClasses]
+  UefiDriverEntryPoint
+  UefiBootServicesTableLib
+  DxeServicesTableLib
+  DebugLib
+  MemoryAllocationLib
+  BaseMemoryLib
+  DevicePathLib
+  UefiLib
+  HobLib
+
+[Protocols]
+  gEfiPciPlatformProtocolGuid                   ## PRODUCES
+  gEfiPciIoProtocolGuid                         ## COMSUMES
diff --git a/UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h b/UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h
new file mode 100644
index 000000000000..c40518c703f8
--- /dev/null
+++ b/UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h
@@ -0,0 +1,19 @@
+/** @file
+  Header file for a PCI platform driver.
+
+Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+
+**/
+#ifndef _PCI_PLATFORM_DXE_H_
+#define _PCI_PLATFORM_DXE_H_
+#include <PiDxe.h>
+
+#include <IndustryStandard/Pci.h>
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/Pci22.h>
+#include <Protocol/PciIo.h>
+#include <Protocol/PciPlatform.h>
+
+#endif
diff --git a/UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c b/UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c
new file mode 100644
index 000000000000..65a1ba967314
--- /dev/null
+++ b/UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c
@@ -0,0 +1,426 @@
+/** @file
+  This driver will probe for the Option Rom and provide a pointer to
+  the activated BAR if found.
+
+Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+
+**/
+
+#include "PciPlatformDxe.h"
+#include <Bus/Pci/PciBusDxe/PciBus.h>
+#include <Bus/Pci/PciBusDxe/PciOptionRomSupport.h>
+
+//
+// The driver should only start on one graphics controller.
+// So a global flag is used to remember that the driver is already started.
+//
+EFI_HANDLE      mDriverHandle = NULL;
+
+/**
+  The notification from the PCI bus enumerator to the platform that it is
+  about to enter a certain phase during the enumeration process.
+
+  @param[in] This           The pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+  @param[in] HostBridge     The handle of the host bridge controller.
+  @param[in] Phase          The phase of the PCI bus enumeration.
+  @param[in] ExecPhase      Defines the execution phase of the PCI chipset driver.
+
+  @retval EFI_SUCCESS   The function completed successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+PciPlatformNotify(
+  IN EFI_PCI_PLATFORM_PROTOCOL                      *This,
+  IN EFI_HANDLE                                     HostBridge,
+  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE  Phase,
+  IN EFI_PCI_EXECUTION_PHASE                        ExecPhase
+  )
+{
+  return EFI_SUCCESS;
+}
+
+
+/**
+  The notification from the PCI bus enumerator to the platform for each PCI
+  controller at several predefined points during PCI controller initialization.
+
+  @param[in] This           The pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+  @param[in] HostBridge     The associated PCI host bridge handle.
+  @param[in] RootBridge     The associated PCI root bridge handle.
+  @param[in] PciAddress     The address of the PCI device on the PCI bus.
+  @param[in] Phase          The phase of the PCI controller enumeration.
+  @param[in] ExecPhase      Defines the execution phase of the PCI chipset driver.
+
+  @retval EFI_SUCCESS   The function completed successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+PciPlatformPrepController(
+  IN EFI_PCI_PLATFORM_PROTOCOL                     *This,
+  IN EFI_HANDLE                                    HostBridge,
+  IN EFI_HANDLE                                    RootBridge,
+  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS   PciAddress,
+  IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE  Phase,
+  IN EFI_PCI_EXECUTION_PHASE                       ExecPhase
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  Gets the PCI device's option ROM.
+
+  @param[in]  This        The pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+  @param[in]  PciHandle   The handle of the PCI device.
+  @param[out] RomImage    If the call succeeds, the pointer to the pointer to the option ROM image.
+                          Otherwise, this field is undefined. The memory for RomImage is allocated
+                          by EFI_PCI_PLATFORM_PROTOCOL.GetPciRom() using the EFI Boot Service AllocatePool().
+                          It is the caller's responsibility to free the memory using the EFI Boot Service
+                          FreePool(), when the caller is done with the option ROM.
+  @param[out] RomSize     If the call succeeds, a pointer to the size of the option ROM size. Otherwise,
+                          this field is undefined.
+
+  @retval EFI_SUCCESS            The option ROM was available for this device and loaded into memory.
+  @retval EFI_NOT_FOUND          No option ROM was available for this device.
+  @retval EFI_OUT_OF_RESOURCES   No memory was available to load the option ROM.
+  @retval EFI_DEVICE_ERROR       An error occurred in obtaining the option ROM.
+
+**/
+EFI_STATUS
+EFIAPI
+PciGetPciRom (
+  IN  CONST EFI_PCI_PLATFORM_PROTOCOL  *This,
+  IN        EFI_HANDLE                 PciHandle,
+  OUT       VOID                       **RomImage,
+  OUT       UINTN                      *RomSize
+  )
+{
+  EFI_STATUS                           Status;
+  IN EFI_PCI_IO_PROTOCOL               *PciIo;
+  UINTN                                PciSegment;
+  UINTN                                PciBus;
+  UINTN                                PciDevice;
+  UINTN                                PciFunction;
+  UINTN                                RomBarIndex;
+  UINT32                               Buffer;
+  UINT32                               AllOnes;
+  PCI_IO_DEVICE                        *PciIoDevice;
+  UINT8                                Indicator;
+  UINT16                               OffsetPcir;
+  UINT32                               RomBarOffset;
+  UINT32                               RomBar;
+  BOOLEAN                              FirstCheck;
+  PCI_EXPANSION_ROM_HEADER             *RomHeader;
+  PCI_DATA_STRUCTURE                   *RomPcir;
+  UINT64                               RomImageSize;
+  UINT32                               LegacyImageLength;
+  UINT8                                *RomInMemory;
+  UINT8                                CodeType;
+
+  if (!RomImage || !RomSize) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  *RomImage = NULL;
+  *RomSize = 0;
+
+  Status = gBS->HandleProtocol (
+                  PciHandle,
+                  &gEfiPciIoProtocolGuid,
+                  (VOID **) &PciIo
+                  );
+  if (EFI_ERROR (Status)) {
+      DEBUG ((DEBUG_INFO, "%a: Failed to open gEfiPciIoProtocolGuid\n", __FUNCTION__));
+
+    return EFI_UNSUPPORTED;
+  }
+  PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (PciIo);
+
+  //
+  // Get the location of the PCI device
+  //
+  PciIo->GetLocation (
+           PciIo,
+           &PciSegment,
+           &PciBus,
+           &PciDevice,
+           &PciFunction
+           );
+
+  DEBUG ((DEBUG_INFO, "%a: Searching Option ROM on device:\n", __FUNCTION__));
+  DEBUG ((DEBUG_INFO, " PciSegment         - %02x\n", PciSegment));
+  DEBUG ((DEBUG_INFO, " PciBus             - %02x\n", PciBus));
+  DEBUG ((DEBUG_INFO, " PciDevice          - %02x\n", PciDevice));
+  DEBUG ((DEBUG_INFO, " PciFunction        - %02x\n", PciFunction));
+
+  //
+  // Offset is 0x30 if is not ppb
+  //
+  RomBarIndex = PCI_EXPANSION_ROM_BASE;
+
+  if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
+    //
+    // If is ppb, 0x38
+    //
+    RomBarIndex = PCI_BRIDGE_ROMBAR;
+  }
+
+  //
+  // Backup BAR
+  //
+  Status = PciIo->Pci.Read (
+                          PciIo,
+                          EfiPciWidthUint32,
+                          RomBarIndex,
+                          1,
+                          &Buffer
+                          );
+  if (EFI_ERROR (Status)) {
+    goto CloseAndReturn;
+    return Status;
+  }
+
+  //
+  // The bit0 is 0 to prevent the enabling of the Rom address decoder
+  //
+  AllOnes = 0xfffffffe;
+
+  Status = PciIo->Pci.Write (
+                            PciIo,
+                            EfiPciWidthUint32,
+                            RomBarIndex,
+                            1,
+                            &AllOnes
+                            );
+  if (EFI_ERROR (Status)) {
+    goto CloseAndReturn;
+  }
+
+  //
+  // Read back
+  //
+  Status = PciIo->Pci.Read(
+                          PciIo,
+                          EfiPciWidthUint32,
+                          RomBarIndex,
+                          1,
+                          &AllOnes
+                          );
+  if (EFI_ERROR (Status)) {
+    goto CloseAndReturn;
+  }
+
+  //
+  // Bits [1, 10] are reserved
+  //
+  AllOnes &= 0xFFFFF800;
+  if ((AllOnes == 0) || (AllOnes == 0xFFFFF800)) {
+    DEBUG ((DEBUG_INFO, "%a: No Option ROM found\n", __FUNCTION__));
+    return EFI_NOT_FOUND;
+  }
+
+  *RomSize = (~AllOnes) + 1;
+
+  DEBUG ((DEBUG_INFO, "%a: Option ROM with size %d\n", __FUNCTION__, *RomSize));
+
+  //
+  // Restore BAR and enable it
+  //
+  Buffer |= 1;
+  Status = PciIo->Pci.Write (
+                            PciIo,
+                            EfiPciWidthUint32,
+                            RomBarIndex,
+                            1,
+                            &Buffer
+                            );
+  if (EFI_ERROR (Status)) {
+    goto CloseAndReturn;
+  }
+
+  //
+  // Allocate memory for Rom header and PCIR
+  //
+  RomHeader = AllocatePool (sizeof (PCI_EXPANSION_ROM_HEADER));
+  if (RomHeader == NULL) {
+    Status = EFI_OUT_OF_RESOURCES;
+    goto CloseAndReturn;
+  }
+
+  RomPcir = AllocatePool (sizeof (PCI_DATA_STRUCTURE));
+  if (RomPcir == NULL) {
+    FreePool (RomHeader);
+    Status = EFI_OUT_OF_RESOURCES;
+    goto CloseAndReturn;
+  }
+
+  // FIXME: Use gEfiPciRootBridgeIoProtocolGuid
+  RomBar = (UINT32) Buffer &~1;
+
+  RomBarOffset  = RomBar;
+  FirstCheck    = TRUE;
+  LegacyImageLength = 0;
+  RomImageSize = 0;
+
+  do {
+    // FIXME: Use gEfiPciRootBridgeIoProtocolGuid
+    CopyMem(RomHeader, (VOID *)(UINTN)RomBarOffset, sizeof (PCI_EXPANSION_ROM_HEADER));
+
+    DEBUG ((DEBUG_INFO, "%a: RomHeader->Signature %x\n", __FUNCTION__, RomHeader->Signature));
+
+    if (RomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
+
+      RomBarOffset = RomBarOffset + 512;
+      if (FirstCheck) {
+        break;
+      } else {
+        RomImageSize = RomImageSize + 512;
+        continue;
+      }
+    }
+
+    FirstCheck  = FALSE;
+    OffsetPcir  = RomHeader->PcirOffset;
+    //
+    // If the pointer to the PCI Data Structure is invalid, no further images can be located.
+    // The PCI Data Structure must be DWORD aligned.
+    //
+    if (OffsetPcir == 0 ||
+        (OffsetPcir & 3) != 0 ||
+        RomImageSize + OffsetPcir + sizeof (PCI_DATA_STRUCTURE) > *RomSize) {
+      break;
+    }
+    // FIXME: Use gEfiPciRootBridgeIoProtocolGuid
+    CopyMem(RomPcir, (VOID *)(UINTN)RomBarOffset + OffsetPcir, sizeof (PCI_DATA_STRUCTURE));
+
+    DEBUG ((DEBUG_INFO, "%a: RomPcir->Signature %x\n", __FUNCTION__, RomPcir->Signature));
+
+    //
+    // If a valid signature is not present in the PCI Data Structure, no further images can be located.
+    //
+    if (RomPcir->Signature != PCI_DATA_STRUCTURE_SIGNATURE) {
+      break;
+    }
+    if (RomImageSize + RomPcir->ImageLength * 512 > *RomSize) {
+      break;
+    }
+    if (RomPcir->CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {
+      CodeType = PCI_CODE_TYPE_PCAT_IMAGE;
+      LegacyImageLength = ((UINT32)((EFI_LEGACY_EXPANSION_ROM_HEADER *)RomHeader)->Size512) * 512;
+    }
+    Indicator     = RomPcir->Indicator;
+    RomImageSize  = RomImageSize + RomPcir->ImageLength * 512;
+    RomBarOffset  = RomBarOffset + RomPcir->ImageLength * 512;
+  } while (((Indicator & 0x80) == 0x00) && ((RomBarOffset - RomBar) < *RomSize));
+
+  //
+  // Some Legacy Cards do not report the correct ImageLength so used the maximum
+  // of the legacy length and the PCIR Image Length
+  //
+  if (CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {
+    RomImageSize = MAX (RomImageSize, LegacyImageLength);
+  }
+
+  if (RomImageSize > 0) {
+    // FIXME: Use gEfiPciRootBridgeIoProtocolGuid
+    RomInMemory = (VOID *)(UINTN)RomBar;
+  }
+
+  //
+  // Free allocated memory
+  //
+  FreePool (RomHeader);
+  FreePool (RomPcir);
+
+  if (RomImageSize > 0) {
+    *RomImage = RomInMemory;
+    *RomSize = RomImageSize;
+    DEBUG ((DEBUG_INFO, "%a: Found Option ROM at %p, length 0x%x\n", __FUNCTION__,
+        RomInMemory, RomImageSize));
+
+    Status = EFI_SUCCESS;
+  } else {
+    Status = EFI_NOT_FOUND;
+  }
+
+CloseAndReturn:
+  //
+  // Close the I/O Abstraction(s) used to perform the supported test
+  //
+  gBS->CloseProtocol (
+        PciHandle,
+        &gEfiPciIoProtocolGuid,
+        PciIo,
+        PciHandle
+        );
+
+  return Status;
+}
+
+/**
+  Retrieves the platform policy regarding enumeration.
+
+  The GetPlatformPolicy() function retrieves the platform policy regarding PCI
+  enumeration. The PCI bus driver and the PCI Host Bridge Resource Allocation Protocol
+  driver can call this member function to retrieve the policy.
+
+  @param[in]  This        The pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+  @param[out] PciPolicy   The platform policy with respect to VGA and ISA aliasing.
+
+  @retval EFI_SUCCESS             The function completed successfully.
+  @retval EFI_INVALID_PARAMETER   PciPolicy is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+PciGetPlatformPolicy (
+  IN  CONST EFI_PCI_PLATFORM_PROTOCOL  *This,
+  OUT       EFI_PCI_PLATFORM_POLICY    *PciPolicy
+  )
+{
+  if (PciPolicy == NULL)
+    return EFI_INVALID_PARAMETER;
+
+  *PciPolicy = 0;
+
+  return EFI_SUCCESS;
+}
+
+EFI_PCI_PLATFORM_PROTOCOL                     mPciPlatformProtocol = {
+  PciPlatformNotify,
+  PciPlatformPrepController,
+  PciGetPlatformPolicy,
+  PciGetPciRom,
+};
+
+/**
+  The Entry Point for Option ROM driver.
+
+  It installs DriverBinding.
+
+  @retval EFI_SUCCESS       The entry point is executed successfully.
+  @retval other             Some error occurs when executing this entry point.
+
+**/
+EFI_STATUS
+EFIAPI
+InstallPciPlatformProtocol (
+  IN EFI_HANDLE                        ImageHandle,
+  IN EFI_SYSTEM_TABLE                  *SystemTable
+  )
+{
+  EFI_STATUS                           Status;
+
+  Status = gBS->InstallProtocolInterface (
+                  &mDriverHandle,
+                  &gEfiPciPlatformProtocolGuid,
+                  EFI_NATIVE_INTERFACE,
+                  &mPciPlatformProtocol
+                  );
+
+  return Status;
+}
-- 
2.28.0

Re: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs

[Ni, Ray]

Why running it will disable the ability of PciPlatform code to scan for ROMs?

I guess it is because the PciIoDevice->AllOpRomProcessed is set which causes GetPciRom() is skipped.

Can you explain more in the code comment?

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Marcello
> Sylvester Bauer
> Sent: Tuesday, September 15, 2020 8:26 PM
> To: devel@edk2.groups.io
> Subject: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs
> 
> Fix Option ROM enumeration and support scanning.
> 
> v2:
> * add correct Maintainer and Reviewer to Cc
> * PciPlatformDxe:
>   - Update description
>   - add function description
> 
> Branch: https://github.com/9elements/edk2-1/tree/UefiPayloadPkg-
> Option_ROMs
> PR: https://github.com/tianocore/edk2/pull/926
> 
> Patrick Rudolph (2):
>   MdeModulePkg: Fix OptionROM scanning
>   UefiPayloadPkg: Scan for Option ROMs
> 
>  UefiPayloadPkg/UefiPayloadPkgIa32.dsc                 |   1 +
>  UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc              |   1 +
>  UefiPayloadPkg/UefiPayloadPkg.fdf                     |   1 +
>  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf      |  46 +++
>  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h        |  19 +
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c |  10 +-
>  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c        | 426
> ++++++++++++++++++++
>  7 files changed, 500 insertions(+), 4 deletions(-)
>  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
>  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h
>  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c
> 
> --
> 2.28.0
> 
> 
> 

Re: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs

[Marcello Sylvester Bauer]

[-- Attachment #1: Type: text/plain, Size: 3151 bytes --]

hi Ray,

> I guess it is because the PciIoDevice->AllOpRomProcessed is set which
causes GetPciRom() is skipped.

exactly. Therefore we need this for the gPciPlatformProtocol implementation
to work.
I will add this information as a code comment.

> In your UefiPayloadPkg change, you have an assumption that the option ROM
BAR still contain the correct base address.
> Is it always true in real world? Do you think maybe the boot loader
should supply a MMIO space range so UeifPayloadPkg
> can use for option rom decoding?

Every option ROM in coreboot does have it's own memory space and can not be
provided as MMIO space range. Probably we could
add some kind of validation to verify the validity of the base address.

thanks,
Marcello


On Wed, Sep 16, 2020 at 10:28 AM Ni, Ray <ray.ni@intel.com> wrote:

> Why running it will disable the ability of PciPlatform code to scan for
> ROMs?
>
> I guess it is because the PciIoDevice->AllOpRomProcessed is set which
> causes GetPciRom() is skipped.
>
> Can you explain more in the code comment?
>
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Marcello
> > Sylvester Bauer
> > Sent: Tuesday, September 15, 2020 8:26 PM
> > To: devel@edk2.groups.io
> > Subject: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs
> >
> > Fix Option ROM enumeration and support scanning.
> >
> > v2:
> > * add correct Maintainer and Reviewer to Cc
> > * PciPlatformDxe:
> >   - Update description
> >   - add function description
> >
> > Branch: https://github.com/9elements/edk2-1/tree/UefiPayloadPkg-
> > Option_ROMs
> > PR: https://github.com/tianocore/edk2/pull/926
> >
> > Patrick Rudolph (2):
> >   MdeModulePkg: Fix OptionROM scanning
> >   UefiPayloadPkg: Scan for Option ROMs
> >
> >  UefiPayloadPkg/UefiPayloadPkgIa32.dsc                 |   1 +
> >  UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc              |   1 +
> >  UefiPayloadPkg/UefiPayloadPkg.fdf                     |   1 +
> >  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf      |  46 +++
> >  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h        |  19 +
> >  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c |  10 +-
> >  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c        | 426
> > ++++++++++++++++++++
> >  7 files changed, 500 insertions(+), 4 deletions(-)
> >  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
> >  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h
> >  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c
> >
> > --
> > 2.28.0
> >
> >
> > 
>
>

-- 
*[Marcello Sylvester Bauer]*



9elements Agency GmbH, Kortumstraße 19-21, 44787 Bochum, Germany
Email:  [DEINE EMAIL ADDRESSE]
<https://static.9elements.com/email_signatur.html>
Phone:  *+49 234 68 94 188 <+492346894188>*
Mobile:  *+49 1722847618 <+491722847618>*

Sitz der Gesellschaft: Bochum
Handelsregister: Amtsgericht Bochum, HRB 17519
Geschäftsführung: Sebastian Deutsch, Eray Basar

Datenschutzhinweise nach Art. 13 DSGVO <https://9elements.com/privacy>

[-- Attachment #2: Type: text/html, Size: 6101 bytes --]

Re: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs

[Michael D Kinney]

[-- Attachment #1: Type: text/plain, Size: 3846 bytes --]

Marcello,

If the assumption in this env is that PCI enumeration has already been done, would it make
more sense for the component that performed PCI enumeration to collect the PCI Option ROM
contents and pass them into the UefiPayLoadPkg in memory buffers and have the PCI Platform Protocol
provide the PCI Option ROM images from these memory buffers?

Thanks,

Mike

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Marcello Sylvester Bauer
Sent: Monday, September 21, 2020 6:25 AM
To: Ni, Ray <ray.ni@intel.com>
Cc: devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs

hi Ray,

> I guess it is because the PciIoDevice->AllOpRomProcessed is set which causes GetPciRom() is skipped.

exactly. Therefore we need this for the gPciPlatformProtocol implementation to work.
I will add this information as a code comment.

> In your UefiPayloadPkg change, you have an assumption that the option ROM BAR still contain the correct base address.
> Is it always true in real world? Do you think maybe the boot loader should supply a MMIO space range so UeifPayloadPkg
> can use for option rom decoding?

Every option ROM in coreboot does have it's own memory space and can not be provided as MMIO space range. Probably we could
add some kind of validation to verify the validity of the base address.

thanks,
Marcello

On Wed, Sep 16, 2020 at 10:28 AM Ni, Ray <ray.ni@intel.com<mailto:ray.ni@intel.com>> wrote:
Why running it will disable the ability of PciPlatform code to scan for ROMs?

I guess it is because the PciIoDevice->AllOpRomProcessed is set which causes GetPciRom() is skipped.

Can you explain more in the code comment?

> -----Original Message-----
> From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> <devel@edk2.groups.io<mailto:devel@edk2.groups.io>> On Behalf Of Marcello
> Sylvester Bauer
> Sent: Tuesday, September 15, 2020 8:26 PM
> To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
> Subject: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs
>
> Fix Option ROM enumeration and support scanning.
>
> v2:
> * add correct Maintainer and Reviewer to Cc
> * PciPlatformDxe:
>   - Update description
>   - add function description
>
> Branch: https://github.com/9elements/edk2-1/tree/UefiPayloadPkg-
> Option_ROMs
> PR: https://github.com/tianocore/edk2/pull/926
>
> Patrick Rudolph (2):
>   MdeModulePkg: Fix OptionROM scanning
>   UefiPayloadPkg: Scan for Option ROMs
>
>  UefiPayloadPkg/UefiPayloadPkgIa32.dsc                 |   1 +
>  UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc              |   1 +
>  UefiPayloadPkg/UefiPayloadPkg.fdf                     |   1 +
>  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf      |  46 +++
>  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h        |  19 +
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c |  10 +-
>  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c        | 426
> ++++++++++++++++++++
>  7 files changed, 500 insertions(+), 4 deletions(-)
>  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
>  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h
>  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c
>
> --
> 2.28.0
>
>
>


--
[Marcello Sylvester Bauer]

[http://static.9elements.com/logo-signature.png]
9elements Agency GmbH, Kortumstraße 19-21, 44787 Bochum, Germany
Email:  [DEINE EMAIL ADDRESSE]<https://static.9elements.com/email_signatur.html>
Phone:  +49 234 68 94 188<tel:+492346894188>
Mobile:  +49 1722847618<tel:+491722847618>

Sitz der Gesellschaft: Bochum
Handelsregister: Amtsgericht Bochum, HRB 17519
Geschäftsführung: Sebastian Deutsch, Eray Basar

Datenschutzhinweise nach Art. 13 DSGVO<https://9elements.com/privacy>


[-- Attachment #2: Type: text/html, Size: 49020 bytes --]

Re: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs

[Marcello Sylvester Bauer]

[-- Attachment #1: Type: text/plain, Size: 5539 bytes --]

Hi,

> If the assumption in this env is that PCI enumeration has already been
done, would it make

more sense for the component that performed PCI enumeration to collect the
PCI Option ROM

contents and pass them into the UefiPayLoadPkg in memory buffers and have
the PCI Platform Protocol provide the PCI Option ROM images from these
memory buffers?

We did not plan to add extra memory buffers to pass PCI Option ROMs. Is
there any benefit to creating it?

> In your UefiPayloadPkg change, you have an assumption that the option ROM BAR
still contain the correct base address. Is it always true in real world? Do
you think maybe the boot loader should supply a MMIO space range so
UeifPayloadPkg can use for option rom decoding?

We could update UefiPayloadPkg/BuildAndIntegrationInstructions.txt and make
this a requirement for the boot loader to make all option ROM BARs contain
a valid base address.

Thanks,
Marcello

On Wed, Sep 23, 2020 at 1:58 AM Kinney, Michael D <
michael.d.kinney@intel.com> wrote:

> Marcello,
>
>
>
> If the assumption in this env is that PCI enumeration has already been
> done, would it make
>
> more sense for the component that performed PCI enumeration to collect the
> PCI Option ROM
>
> contents and pass them into the UefiPayLoadPkg in memory buffers and have
> the PCI Platform Protocol
>
> provide the PCI Option ROM images from these memory buffers?
>
>
>
> Thanks,
>
>
>
> Mike
>
>
>
> *From:* devel@edk2.groups.io <devel@edk2.groups.io> *On Behalf Of *Marcello
> Sylvester Bauer
> *Sent:* Monday, September 21, 2020 6:25 AM
> *To:* Ni, Ray <ray.ni@intel.com>
> *Cc:* devel@edk2.groups.io
> *Subject:* Re: [edk2-devel] [PATCH v2 0/2] Add support for scanning
> Option ROMs
>
>
>
> hi Ray,
>
> > I guess it is because the PciIoDevice->AllOpRomProcessed is set which
> causes GetPciRom() is skipped.
>
> exactly. Therefore we need this for the gPciPlatformProtocol
> implementation to work.
> I will add this information as a code comment.
>
> > In your UefiPayloadPkg change, you have an assumption that the option
> ROM BAR still contain the correct base address.
> > Is it always true in real world? Do you think maybe the boot loader
> should supply a MMIO space range so UeifPayloadPkg
> > can use for option rom decoding?
>
> Every option ROM in coreboot does have it's own memory space and can not
> be provided as MMIO space range. Probably we could
> add some kind of validation to verify the validity of the base address.
>
> thanks,
> Marcello
>
>
>
> On Wed, Sep 16, 2020 at 10:28 AM Ni, Ray <ray.ni@intel.com> wrote:
>
> Why running it will disable the ability of PciPlatform code to scan for
> ROMs?
>
> I guess it is because the PciIoDevice->AllOpRomProcessed is set which
> causes GetPciRom() is skipped.
>
> Can you explain more in the code comment?
>
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Marcello
> > Sylvester Bauer
> > Sent: Tuesday, September 15, 2020 8:26 PM
> > To: devel@edk2.groups.io
> > Subject: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs
> >
> > Fix Option ROM enumeration and support scanning.
> >
> > v2:
> > * add correct Maintainer and Reviewer to Cc
> > * PciPlatformDxe:
> >   - Update description
> >   - add function description
> >
> > Branch: https://github.com/9elements/edk2-1/tree/UefiPayloadPkg-
> > Option_ROMs
> > PR: https://github.com/tianocore/edk2/pull/926
> >
> > Patrick Rudolph (2):
> >   MdeModulePkg: Fix OptionROM scanning
> >   UefiPayloadPkg: Scan for Option ROMs
> >
> >  UefiPayloadPkg/UefiPayloadPkgIa32.dsc                 |   1 +
> >  UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc              |   1 +
> >  UefiPayloadPkg/UefiPayloadPkg.fdf                     |   1 +
> >  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf      |  46 +++
> >  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h        |  19 +
> >  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c |  10 +-
> >  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c        | 426
> > ++++++++++++++++++++
> >  7 files changed, 500 insertions(+), 4 deletions(-)
> >  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
> >  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h
> >  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c
> >
> > --
> > 2.28.0
> >
> >
> >
>
>
>
>
> --
>
> *[Marcello Sylvester Bauer]*
>
>
>
> 9elements Agency GmbH, Kortumstraße 19-21, 44787 Bochum, Germany
>
> Email:  [DEINE EMAIL ADDRESSE]
> <https://static.9elements.com/email_signatur.html>
>
> Phone:  *+49 234 68 94 188 <+492346894188>*
>
> Mobile:  *+49 1722847618 <+491722847618>*
>
>
>
> Sitz der Gesellschaft: Bochum
>
> Handelsregister: Amtsgericht Bochum, HRB 17519
>
> Geschäftsführung: Sebastian Deutsch, Eray Basar
>
>
> Datenschutzhinweise nach Art. 13 DSGVO <https://9elements.com/privacy>
>
> 
>


-- 
*[Marcello Sylvester Bauer]*



9elements Agency GmbH, Kortumstraße 19-21, 44787 Bochum, Germany
Email:  [DEINE EMAIL ADDRESSE]
<https://static.9elements.com/email_signatur.html>
Phone:  *+49 234 68 94 188 <+492346894188>*
Mobile:  *+49 1722847618 <+491722847618>*

Sitz der Gesellschaft: Bochum
Handelsregister: Amtsgericht Bochum, HRB 17519
Geschäftsführung: Sebastian Deutsch, Eray Basar

Datenschutzhinweise nach Art. 13 DSGVO <https://9elements.com/privacy>

[-- Attachment #2: Type: text/html, Size: 14930 bytes --]

Re: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs

[Dmitry Ponamorev]

[-- Attachment #1: Type: text/plain, Size: 757 bytes --]

Hi.

Thank you for this solution. This is a very useful feature for me. Some devices work - they detect and load optional ROM firmware, but some do not.
The presence of optional ROM is confirmed, but 0xFFFF is read instead of signature AA55 and other rom header fields.
Apparently the base address of the optional firmware is incorrect?
How can I debug this problem?

Thanks,
Dmitry


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[-- Attachment #2: Type: text/html, Size: 2847 bytes --]

Re: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs

[Ni, Ray]

Another comment:
In your UefiPayloadPkg change, you have an assumption that the option ROM BAR still contain the correct base address.
Is it always true in real world? Do you think maybe the boot loader should supply a MMIO space range so UeifPayloadPkg
 can use for option rom decoding?

Thanks,
Ray

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray
> Sent: Wednesday, September 16, 2020 4:29 PM
> To: devel@edk2.groups.io; marcello.bauer@9elements.com
> Subject: Re: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs
> 
> Why running it will disable the ability of PciPlatform code to scan for ROMs?
> 
> I guess it is because the PciIoDevice->AllOpRomProcessed is set which causes GetPciRom() is skipped.
> 
> Can you explain more in the code comment?
> 
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Marcello
> > Sylvester Bauer
> > Sent: Tuesday, September 15, 2020 8:26 PM
> > To: devel@edk2.groups.io
> > Subject: [edk2-devel] [PATCH v2 0/2] Add support for scanning Option ROMs
> >
> > Fix Option ROM enumeration and support scanning.
> >
> > v2:
> > * add correct Maintainer and Reviewer to Cc
> > * PciPlatformDxe:
> >   - Update description
> >   - add function description
> >
> > Branch: https://github.com/9elements/edk2-1/tree/UefiPayloadPkg-
> > Option_ROMs
> > PR: https://github.com/tianocore/edk2/pull/926
> >
> > Patrick Rudolph (2):
> >   MdeModulePkg: Fix OptionROM scanning
> >   UefiPayloadPkg: Scan for Option ROMs
> >
> >  UefiPayloadPkg/UefiPayloadPkgIa32.dsc                 |   1 +
> >  UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc              |   1 +
> >  UefiPayloadPkg/UefiPayloadPkg.fdf                     |   1 +
> >  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf      |  46 +++
> >  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h        |  19 +
> >  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c |  10 +-
> >  UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c        | 426
> > ++++++++++++++++++++
> >  7 files changed, 500 insertions(+), 4 deletions(-)
> >  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.inf
> >  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.h
> >  create mode 100644 UefiPayloadPkg/PciPlatformDxe/PciPlatformDxe.c
> >
> > --
> > 2.28.0
> >
> >
> >
> 
> 
>