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* [Patch V1 1/1] \Silicon\Intel\Tools\FitGen: Add extra parameter to the Fit Gen Tool to input the Higher Flash Address
@ 2020-09-22 10:36 cbduggap
  2020-09-22 10:36 ` [Patch V2 1/1] Tools\FitGen: Add extra parameter " cbduggap
  0 siblings, 1 reply; 5+ messages in thread
From: cbduggap @ 2020-09-22 10:36 UTC (permalink / raw)
  To: devel; +Cc: cbduggap

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2981

Add extra parameter to the Fit Gen Tool to input the Higher Address.
Default Address should be 4GB and if some one inputs new address,
tool must consume that address instead of Default address (4GB).

Signed-off-by: cbduggap <chinni.b.duggapu@intel.com>
---
 Silicon/Intel/Tools/FitGen/FitGen.c | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c b/Silicon/Intel/Tools/FitGen/FitGen.c
index c4006e69c8..c17a0fabc0 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.c
+++ b/Silicon/Intel/Tools/FitGen/FitGen.c
@@ -209,10 +209,12 @@ typedef struct {
 #define DEFAULT_FIT_TABLE_POINTER_OFFSET  0x40
 #define DEFAULT_FIT_ENTRY_VERSION         0x0100
 
+#define HIGHER_FLASH_ADDRESS  (gFitTableContext.HigherAddressRemapValue)
+
 #define MEMORY_TO_FLASH(FileBuffer, FvBuffer, FvSize)  \
-                 (UINTN)(0x100000000 - ((UINTN)(FvBuffer) + (UINTN)(FvSize) - (UINTN)(FileBuffer)))
+                 (UINTN)(HIGHER_FLASH_ADDRESS - ((UINTN)(FvBuffer) + (UINTN)(FvSize) - (UINTN)(FileBuffer)))
 #define FLASH_TO_MEMORY(Address, FvBuffer, FvSize)  \
-                 (VOID *)(UINTN)((UINTN)(FvBuffer) + (UINTN)(FvSize) - (0x100000000 - (UINTN)(Address)))
+                 (VOID *)(UINTN)((UINTN)(FvBuffer) + (UINTN)(FvSize) - (HIGHER_FLASH_ADDRESS - (UINTN)(Address)))
 
 #define FIT_TABLE_TYPE_HEADER                 0
 #define FIT_TABLE_TYPE_MICROCODE              1
@@ -268,6 +270,7 @@ typedef struct {
   UINT32                     MicrocodeVersion;
   FIT_TABLE_CONTEXT_ENTRY    OptionalModule[MAX_OPTIONAL_ENTRY];
   FIT_TABLE_CONTEXT_ENTRY    PortModule[MAX_PORT_ENTRY];
+  UINT64                      HigherAddressRemapValue;
 } FIT_TABLE_CONTEXT;
 
 FIT_TABLE_CONTEXT   gFitTableContext = {0};
@@ -330,6 +333,7 @@ Returns:
           "\t[-F <FitTablePointerOffset>] [-F <FitTablePointerOffset>] [-V <FitHeaderVersion>]\n"
           "\t[-NA]\n"
           "\t[-A <MicrocodeAlignment>]\n"
+           "\t[-REMAP <FlashHigherAddress>\n"
           "\t[-CLEAR]\n"
           "\t[-L <MicrocodeSlotSize> <MicrocodeFfsGuid>]\n"
           "\t[-I <BiosInfoGuid>]\n"
@@ -986,6 +990,21 @@ Returns:
     Index += 2;
   }
 
+  if ((Index >= argc) ||
+      ((strcmp (argv[Index], "-REMAP") == 0) ||
+       (strcmp (argv[Index], "-remap") == 0)) ) {
+    //
+    // by pass
+    //
+    gFitTableContext.HigherAddressRemapValue = xtoi (argv[Index + 1]);
+    Index += 2;
+  } else {
+    //
+    // no remapping
+    //
+    gFitTableContext.HigherAddressRemapValue = 0x100000000;
+  }
+  printf ("Higher Address Value : 0x%llx\n", gFitTableContext.HigherAddressRemapValue);
   //
   // 0.4 Clear FIT table related memory
   //
-- 
2.26.2.windows.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [Patch V2 1/1] Tools\FitGen: Add extra parameter to input the Higher Flash Address
  2020-09-22 10:36 [Patch V1 1/1] \Silicon\Intel\Tools\FitGen: Add extra parameter to the Fit Gen Tool to input the Higher Flash Address cbduggap
@ 2020-09-22 10:36 ` cbduggap
  2020-09-29  2:31   ` 回复: [edk2-devel] " gaoliming
  0 siblings, 1 reply; 5+ messages in thread
From: cbduggap @ 2020-09-22 10:36 UTC (permalink / raw)
  To: devel; +Cc: cbduggap, Bob Feng, Liming Gao

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2981

Add extra parameter to the Fit Gen Tool to input the Higher Address.
Default Address should be 4GB and if some one inputs new address,
tool must consume that address instead of Default address (4GB).

Signed-off-by: cbduggap <chinni.b.duggapu@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
---
 Silicon/Intel/Tools/FitGen/FitGen.c | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c b/Silicon/Intel/Tools/FitGen/FitGen.c
index c4006e69c8..c17a0fabc0 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.c
+++ b/Silicon/Intel/Tools/FitGen/FitGen.c
@@ -209,10 +209,12 @@ typedef struct {
 #define DEFAULT_FIT_TABLE_POINTER_OFFSET  0x40
 #define DEFAULT_FIT_ENTRY_VERSION         0x0100
 
+#define HIGHER_FLASH_ADDRESS  (gFitTableContext.HigherAddressRemapValue)
+
 #define MEMORY_TO_FLASH(FileBuffer, FvBuffer, FvSize)  \
-                 (UINTN)(0x100000000 - ((UINTN)(FvBuffer) + (UINTN)(FvSize) - (UINTN)(FileBuffer)))
+                 (UINTN)(HIGHER_FLASH_ADDRESS - ((UINTN)(FvBuffer) + (UINTN)(FvSize) - (UINTN)(FileBuffer)))
 #define FLASH_TO_MEMORY(Address, FvBuffer, FvSize)  \
-                 (VOID *)(UINTN)((UINTN)(FvBuffer) + (UINTN)(FvSize) - (0x100000000 - (UINTN)(Address)))
+                 (VOID *)(UINTN)((UINTN)(FvBuffer) + (UINTN)(FvSize) - (HIGHER_FLASH_ADDRESS - (UINTN)(Address)))
 
 #define FIT_TABLE_TYPE_HEADER                 0
 #define FIT_TABLE_TYPE_MICROCODE              1
@@ -268,6 +270,7 @@ typedef struct {
   UINT32                     MicrocodeVersion;
   FIT_TABLE_CONTEXT_ENTRY    OptionalModule[MAX_OPTIONAL_ENTRY];
   FIT_TABLE_CONTEXT_ENTRY    PortModule[MAX_PORT_ENTRY];
+  UINT64                      HigherAddressRemapValue;
 } FIT_TABLE_CONTEXT;
 
 FIT_TABLE_CONTEXT   gFitTableContext = {0};
@@ -330,6 +333,7 @@ Returns:
           "\t[-F <FitTablePointerOffset>] [-F <FitTablePointerOffset>] [-V <FitHeaderVersion>]\n"
           "\t[-NA]\n"
           "\t[-A <MicrocodeAlignment>]\n"
+           "\t[-REMAP <FlashHigherAddress>\n"
           "\t[-CLEAR]\n"
           "\t[-L <MicrocodeSlotSize> <MicrocodeFfsGuid>]\n"
           "\t[-I <BiosInfoGuid>]\n"
@@ -986,6 +990,21 @@ Returns:
     Index += 2;
   }
 
+  if ((Index >= argc) ||
+      ((strcmp (argv[Index], "-REMAP") == 0) ||
+       (strcmp (argv[Index], "-remap") == 0)) ) {
+    //
+    // by pass
+    //
+    gFitTableContext.HigherAddressRemapValue = xtoi (argv[Index + 1]);
+    Index += 2;
+  } else {
+    //
+    // no remapping
+    //
+    gFitTableContext.HigherAddressRemapValue = 0x100000000;
+  }
+  printf ("Higher Address Value : 0x%llx\n", gFitTableContext.HigherAddressRemapValue);
   //
   // 0.4 Clear FIT table related memory
   //
-- 
2.26.2.windows.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* 回复: [edk2-devel] [Patch V2 1/1] Tools\FitGen: Add extra parameter to input the Higher Flash Address
  2020-09-22 10:36 ` [Patch V2 1/1] Tools\FitGen: Add extra parameter " cbduggap
@ 2020-09-29  2:31   ` gaoliming
  2020-09-29  8:20     ` [edk2-devel] " cbduggap
  0 siblings, 1 reply; 5+ messages in thread
From: gaoliming @ 2020-09-29  2:31 UTC (permalink / raw)
  To: devel, chinni.b.duggapu; +Cc: 'Bob Feng'

Chinni:
  Can you introduce the real usage case with this enhancement? After this
case, how will you use FitGen tool in your case?

Thanks
Liming
> -----邮件原件-----
> 发件人: bounce+27952+65439+4905953+8761045@groups.io
> <bounce+27952+65439+4905953+8761045@groups.io> 代表 cbduggap
> 发送时间: 2020年9月22日 18:36
> 收件人: devel@edk2.groups.io
> 抄送: cbduggap <chinni.b.duggapu@intel.com>; Bob Feng
> <bob.c.feng@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>
> 主题: [edk2-devel] [Patch V2 1/1] Tools\FitGen: Add extra parameter to
input the
> Higher Flash Address
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2981
> 
> Add extra parameter to the Fit Gen Tool to input the Higher Address.
> Default Address should be 4GB and if some one inputs new address,
> tool must consume that address instead of Default address (4GB).
> 
> Signed-off-by: cbduggap <chinni.b.duggapu@intel.com>
> Cc: Bob Feng <bob.c.feng@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> ---
>  Silicon/Intel/Tools/FitGen/FitGen.c | 23 +++++++++++++++++++++--
>  1 file changed, 21 insertions(+), 2 deletions(-)
> 
> diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c
> b/Silicon/Intel/Tools/FitGen/FitGen.c
> index c4006e69c8..c17a0fabc0 100644
> --- a/Silicon/Intel/Tools/FitGen/FitGen.c
> +++ b/Silicon/Intel/Tools/FitGen/FitGen.c
> @@ -209,10 +209,12 @@ typedef struct {
>  #define DEFAULT_FIT_TABLE_POINTER_OFFSET  0x40
> 
>  #define DEFAULT_FIT_ENTRY_VERSION         0x0100
> 
> 
> 
> +#define HIGHER_FLASH_ADDRESS
> (gFitTableContext.HigherAddressRemapValue)
> 
> +
> 
>  #define MEMORY_TO_FLASH(FileBuffer, FvBuffer, FvSize)  \
> 
> -                 (UINTN)(0x100000000 - ((UINTN)(FvBuffer) +
> (UINTN)(FvSize) - (UINTN)(FileBuffer)))
> 
> +                 (UINTN)(HIGHER_FLASH_ADDRESS - ((UINTN)(FvBuffer) +
> (UINTN)(FvSize) - (UINTN)(FileBuffer)))
> 
>  #define FLASH_TO_MEMORY(Address, FvBuffer, FvSize)  \
> 
> -                 (VOID *)(UINTN)((UINTN)(FvBuffer) + (UINTN)(FvSize) -
> (0x100000000 - (UINTN)(Address)))
> 
> +                 (VOID *)(UINTN)((UINTN)(FvBuffer) + (UINTN)(FvSize) -
> (HIGHER_FLASH_ADDRESS - (UINTN)(Address)))
> 
> 
> 
>  #define FIT_TABLE_TYPE_HEADER                 0
> 
>  #define FIT_TABLE_TYPE_MICROCODE              1
> 
> @@ -268,6 +270,7 @@ typedef struct {
>    UINT32                     MicrocodeVersion;
> 
>    FIT_TABLE_CONTEXT_ENTRY    OptionalModule[MAX_OPTIONAL_ENTRY];
> 
>    FIT_TABLE_CONTEXT_ENTRY    PortModule[MAX_PORT_ENTRY];
> 
> +  UINT64                      HigherAddressRemapValue;
> 
>  } FIT_TABLE_CONTEXT;
> 
> 
> 
>  FIT_TABLE_CONTEXT   gFitTableContext = {0};
> 
> @@ -330,6 +333,7 @@ Returns:
>            "\t[-F <FitTablePointerOffset>] [-F <FitTablePointerOffset>]
[-V
> <FitHeaderVersion>]\n"
> 
>            "\t[-NA]\n"
> 
>            "\t[-A <MicrocodeAlignment>]\n"
> 
> +           "\t[-REMAP <FlashHigherAddress>\n"
> 
>            "\t[-CLEAR]\n"
> 
>            "\t[-L <MicrocodeSlotSize> <MicrocodeFfsGuid>]\n"
> 
>            "\t[-I <BiosInfoGuid>]\n"
> 
> @@ -986,6 +990,21 @@ Returns:
>      Index += 2;
> 
>    }
> 
> 
> 
> +  if ((Index >= argc) ||
> 
> +      ((strcmp (argv[Index], "-REMAP") == 0) ||
> 
> +       (strcmp (argv[Index], "-remap") == 0)) ) {
> 
> +    //
> 
> +    // by pass
> 
> +    //
> 
> +    gFitTableContext.HigherAddressRemapValue = xtoi (argv[Index + 1]);
> 
> +    Index += 2;
> 
> +  } else {
> 
> +    //
> 
> +    // no remapping
> 
> +    //
> 
> +    gFitTableContext.HigherAddressRemapValue = 0x100000000;
> 
> +  }
> 
> +  printf ("Higher Address Value : 0x%llx\n",
> gFitTableContext.HigherAddressRemapValue);
> 
>    //
> 
>    // 0.4 Clear FIT table related memory
> 
>    //
> 
> --
> 2.26.2.windows.1
> 
> 
> 
> -=-=-=-=-=-=
> Groups.io Links: You receive all messages sent to this group.
> View/Reply Online (#65439): https://edk2.groups.io/g/devel/message/65439
> Mute This Topic: https://groups.io/mt/77010246/4905953
> Group Owner: devel+owner@edk2.groups.io
> Unsubscribe: https://edk2.groups.io/g/devel/unsub
> [gaoliming@byosoft.com.cn]
> -=-=-=-=-=-=
> 




^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [edk2-devel] 回复: [edk2-devel] [Patch V2 1/1] Tools\FitGen: Add extra parameter to input the Higher Flash Address
  2020-09-29  2:31   ` 回复: [edk2-devel] " gaoliming
@ 2020-09-29  8:20     ` cbduggap
  2020-09-30  1:00       ` 回复: " gaoliming
  0 siblings, 1 reply; 5+ messages in thread
From: cbduggap @ 2020-09-29  8:20 UTC (permalink / raw)
  To: gaoliming, devel

[-- Attachment #1: Type: text/plain, Size: 1610 bytes --]

Use case :

For Boot from Block device feature, As Block device is not Memory mapped, we need some agent to load the Initial firmware to Host memory. CSE takes care of it by mapping CSE internal SRAM to host memory of 4GB to 4 GB – 256 KB.

*Boot from Block Configuration Host Memory Map :*

Current Implementation

Future Recommendation

POC on Current Implementation

CSE Mapped host memory

4GB to 4GB – 256 KB

4GB to 4GB – 512KB

4GB to 4GB – 256 KB

BIOS Flash Map Definition

4GB to 4GB – 256 KB à Empty Firmware volume ( *hole in flash map* )

4GB – 256KB to 4GB – 10 MB ( BIOS Firmware Volumes)

4GB to 4GB – 512KB à Empty Firmware volume ( *hole in flash map* )

4GB – 512 KB to 4GB – 10 MB ( BIOS Firmware Volumes)

*Eliminate the Empty Firmware volume /hole in flash memory.*

*(by shifting flash range by 256 KB as shown below)*

Flash Map range

4GB to 4GB – 10 MB

For 10 MB BIOS.

4GB to 4GB – 10 MB

For 10 MB BIOS.

4GB *– 256 KB* to 4GB – 10 MB *– 256 KB*

For 10 MB BIOS

Below is the usage of this addition.
@if "%BFX_BUILD%" == "TRUE" (
%WORKSPACE_PLATFORM%\%PLATFORM_FULL_PACKAGE%\Tools\FitGen_Split_Boot\FitGen.exe ^
-D ^
%BUILD_DIR%\FV\ClientBios.fd ^
%BUILD_DIR%\FV\ClientBios.fd ^
-F 0x40 ^
-NA ^
*-REMAP 0xFFF80000 ^*
-L %SLOT_SIZE% %MICROCODE_ARRAY_FFS_GUID% ^
-I %BIOS_INFO_GUID% ^
%STARTUP_AC_PARA% ^
-O 0x0C RESERVE 0x600 ^
-O 0x0B RESERVE 0x400 ^
-P 0xA 0x70 0x71 0x1 0x4 0x2a
)
%STARTUP_AC_PARA% ^
-O 0x0C RESERVE 0x600 ^
-O 0x0B RESERVE 0x400 ^
-P 0xA 0x70 0x71 0x1 0x4 0x2a

[-- Attachment #2: Type: text/html, Size: 7689 bytes --]

^ permalink raw reply	[flat|nested] 5+ messages in thread

* 回复: [edk2-devel] 回复: [edk2-devel] [Patch V2 1/1] Tools\FitGen: Add extra parameter to input the Higher Flash Address
  2020-09-29  8:20     ` [edk2-devel] " cbduggap
@ 2020-09-30  1:00       ` gaoliming
  0 siblings, 0 replies; 5+ messages in thread
From: gaoliming @ 2020-09-30  1:00 UTC (permalink / raw)
  To: devel, chinni.b.duggapu

[-- Attachment #1: Type: text/plain, Size: 2319 bytes --]

So, the specified top flash address should be less than 4G. Right? If yes, I suggest to update the patch tile with the top flash address instead of the higher flash address. The higher flash address may confuse me that it may be above 4G. 

 

Thanks

Liming

发件人: bounce+27952+65713+4905953+8761045@groups.io <bounce+27952+65713+4905953+8761045@groups.io> 代表 cbduggap
发送时间: 2020年9月29日 16:21
收件人: gaoliming <gaoliming@byosoft.com.cn>; devel@edk2.groups.io
主题: Re: [edk2-devel] 回复: [edk2-devel] [Patch V2 1/1] Tools\FitGen: Add extra parameter to input the Higher Flash Address

 

Use case :

For Boot from Block device feature, As Block device is not Memory mapped, we need some agent to load the Initial firmware to Host memory. CSE takes care of it by mapping CSE internal SRAM to host memory of 4GB to 4 GB – 256 KB. 

Boot from Block Configuration Host Memory Map :

 


 

Current Implementation 

Future Recommendation 

POC on Current Implementation


CSE Mapped host memory

 

4GB to 4GB – 256 KB

 

 

4GB to 4GB – 512KB

4GB to 4GB – 256 KB

 


BIOS Flash Map Definition 

4GB to 4GB – 256 KB --> Empty Firmware volume (hole in flash map)

4GB – 256KB to 4GB – 10 MB ( BIOS Firmware Volumes)

4GB to 4GB – 512KB --> Empty Firmware volume (hole in flash map)

4GB – 512 KB to 4GB – 10 MB ( BIOS Firmware Volumes)

Eliminate the Empty Firmware volume /hole in flash memory.

(by shifting flash range by 256 KB as shown below)


Flash Map range

4GB to 4GB – 10 MB

For 10 MB BIOS.

4GB to 4GB – 10 MB

For 10 MB BIOS.

4GB – 256 KB to 4GB – 10 MB – 256 KB 

For 10 MB BIOS

 


Below is the usage of this addition. 
@if "%BFX_BUILD%" == "TRUE" (

%WORKSPACE_PLATFORM%\%PLATFORM_FULL_PACKAGE%\Tools\FitGen_Split_Boot\FitGen.exe ^

-D ^

%BUILD_DIR%\FV\ClientBios.fd ^

%BUILD_DIR%\FV\ClientBios.fd ^

-F 0x40 ^

-NA ^

-REMAP 0xFFF80000 ^

-L %SLOT_SIZE% %MICROCODE_ARRAY_FFS_GUID% ^

-I %BIOS_INFO_GUID% ^

%STARTUP_AC_PARA% ^

-O 0x0C RESERVE 0x600 ^

-O 0x0B RESERVE 0x400 ^

-P 0xA 0x70 0x71 0x1 0x4 0x2a

)

%STARTUP_AC_PARA% ^

-O 0x0C RESERVE 0x600 ^

-O 0x0B RESERVE 0x400 ^

-P 0xA 0x70 0x71 0x1 0x4 0x2a




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^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2020-09-30  1:00 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-09-22 10:36 [Patch V1 1/1] \Silicon\Intel\Tools\FitGen: Add extra parameter to the Fit Gen Tool to input the Higher Flash Address cbduggap
2020-09-22 10:36 ` [Patch V2 1/1] Tools\FitGen: Add extra parameter " cbduggap
2020-09-29  2:31   ` 回复: [edk2-devel] " gaoliming
2020-09-29  8:20     ` [edk2-devel] " cbduggap
2020-09-30  1:00       ` 回复: " gaoliming

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