From: "Zhiguang Liu" <zhiguang.liu@intel.com>
To: devel@edk2.groups.io
Cc: "Wang, Sanyo" <sanyo.wang@intel.com>,
Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <gaoliming@byosoft.com.cn>
Subject: [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions".
Date: Tue, 29 Sep 2020 16:09:21 +0800 [thread overview]
Message-ID: <20200929080921.370-1-zhiguang.liu@intel.com> (raw)
From: "Wang, Sanyo" <sanyo.wang@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2352
SMBIOS 3.4 spec adds new memory device types (DDR5, LPDDR5)
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Sanyo Wang <sanyo.wang@intel.com>
---
MdePkg/Include/IndustryStandard/SmBios.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h
index ea23685851..f2db11f947 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1718,7 +1718,9 @@ typedef enum {
MemoryTypeLpddr4 = 0x1E,
MemoryTypeLogicalNonVolatileDevice = 0x1F,
MemoryTypeHBM = 0x20,
- MemoryTypeHBM2 = 0x21
+ MemoryTypeHBM2 = 0x21,
+ MemoryTypeDdr5 = 0x22,
+ MemoryTypeLpddr5 = 0x23
} MEMORY_DEVICE_TYPE;
///
--
2.25.1.windows.1
next reply other threads:[~2020-09-29 8:10 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-29 8:09 Zhiguang Liu [this message]
2020-10-03 0:57 ` [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions" Sean
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