From: Shashi Mallela <shashi.mallela@linaro.org>
To: leif@nuviainc.com, ard.biesheuvel@arm.com, graeme@nuviainc.com
Cc: devel@edk2.groups.io
Subject: [PATCH v1 1/1] Silicon/Qemu/Sbsa: Add SBSA-wdt entry to GTDT
Date: Thu, 8 Oct 2020 16:31:36 -0400 [thread overview]
Message-ID: <20201008203136.94393-2-shashi.mallela@linaro.org> (raw)
In-Reply-To: <20201008203136.94393-1-shashi.mallela@linaro.org>
SBSA generic watchdog timer structure entry has been added
to GTDT table as per BSAv0.9.
This enables acpi detection of wdt in qemu sbsa platform
Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
---
Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 87 ++++++++++++++------
1 file changed, 62 insertions(+), 25 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
index d16778e01a5c..e26047173744 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
@@ -24,42 +24,79 @@
#define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
#endif
-#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE
+#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE
#define GTDT_TIMER_LEVEL_TRIGGERED 0
-#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
+#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
#define GTDT_TIMER_ACTIVE_HIGH 0
#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED)
+#define SBSA_PLATFORM_WATCHDOG_COUNT 1
+#define SBSA_PLATFORM_TIMER_COUNT (SBSA_PLATFORM_WATCHDOG_COUNT)
+
+#define SBSAQEMU_WDT_REFRESH_FRAME_BASE 0x50010000
+#define SBSAQEMU_WDT_CONTROL_FRAME_BASE 0x50011000
+#define SBSAQEMU_WDT_IRQ 44
+
+#define GTDT_WDTIMER_EDGE_TRIGGERED EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE
+#define GTDT_WDTIMER_LEVEL_TRIGGERED 0
+#define GTDT_WDTIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY
+#define GTDT_WDTIMER_ACTIVE_HIGH 0
+
+#define GTDT_WDTIMER_FLAGS (GTDT_WDTIMER_ACTIVE_HIGH | GTDT_WDTIMER_LEVEL_TRIGGERED)
+
+#define EFI_ACPI_6_3_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( \
+ RefreshFramePhysicalAddress, ControlFramePhysicalAddress, \
+ WatchdogTimerGSIV, WatchdogTimerFlags) \
+ { \
+ EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG, \
+ sizeof(EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), \
+ EFI_ACPI_RESERVED_WORD, \
+ RefreshFramePhysicalAddress, \
+ ControlFramePhysicalAddress, \
+ WatchdogTimerGSIV, \
+ WatchdogTimerFlags \
+ }
+
#pragma pack (1)
typedef struct {
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
- } GENERIC_TIMER_DESCRIPTION_TABLE;
+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
+ EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE Gwdt;
+ } GENERIC_TIMER_DESCRIPTION_TABLES;
#pragma pack ()
- GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = {
- {
- SBSAQEMU_ACPI_HEADER(
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
- GENERIC_TIMER_DESCRIPTION_TABLE,
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
- ),
- SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
- 0, // UINT32 Reserved
- FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
- FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
- FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
- FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
- 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
- 0, // UINT32 PlatformTimerCount
- 0
- },
+ GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
+ {
+ SBSAQEMU_ACPI_HEADER(
+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
+ GENERIC_TIMER_DESCRIPTION_TABLES,
+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
+ ),
+ SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
+ 0, // UINT32 Reserved
+ FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
+ FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
+ FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
+ FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
+ 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
+ SBSA_PLATFORM_TIMER_COUNT, // UINT32 PlatformTimerCount
+ sizeof(EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE),
+ // UINT32 PlatformTimerOffset
+ 0, // UINT32 VirtualPL2TimerGSIV
+ 0 // UINT32 VirtualPL2TimerFlags
+ },
+ EFI_ACPI_6_3_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(
+ SBSAQEMU_WDT_REFRESH_FRAME_BASE,
+ SBSAQEMU_WDT_CONTROL_FRAME_BASE,
+ SBSAQEMU_WDT_IRQ,
+ GTDT_WDTIMER_FLAGS
+ )
};
// Reference the table being generated to prevent the optimizer from removing the
--
2.18.4
next prev parent reply other threads:[~2020-10-08 20:31 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-08 20:31 [PATCH v1 0/1] Add SBSA-wdt entry to GTDT table Shashi Mallela
2020-10-08 20:31 ` Shashi Mallela [this message]
2020-10-12 11:20 ` [PATCH v1 1/1] Silicon/Qemu/Sbsa: Add SBSA-wdt entry to GTDT Graeme Gregory
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