From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by mx.groups.io with SMTP id smtpd.web12.8052.1602667682351795553 for ; Wed, 14 Oct 2020 02:28:02 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=miSUFGiH; spf=pass (domain: nuviainc.com, ip: 209.85.221.65, mailfrom: graeme@nuviainc.com) Received: by mail-wr1-f65.google.com with SMTP id i1so2959832wro.1 for ; Wed, 14 Oct 2020 02:28:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=EGNKeQPfy3/pkQFJ7SvaYeRGB0RF4k0AI89yMQIeTog=; b=miSUFGiHFEgXMd9Yuyn2ObpFGuYxXVzGEmGL99pF++DbOerJlc15BQSEzBGzd/PF7e ksH6Oj0Qq1V5XEZNI2FPkCVIkuhWEOjsQcCUnTWvjclxIutneaIKY8JoxFD/T1jGgDbD zCvv/LSGmIdm1d71+vhUT30QCEwSzg5A1jqmyFNPEffOZSLifJKYjGuFV5zG12DPyH++ ydj+5W5yiTWXq8iVt/G//Gvly/DuMZzi1XwnrV7wgdooFNsss9SKokVvr2/hDtWWkGVn VpEWRI+YHcg4Yj2MOfMJNUR1iD+7Rkwn4cfzGLFYECOgQIzcbKwVt42Zm6GsGAzF6XxL hy4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=EGNKeQPfy3/pkQFJ7SvaYeRGB0RF4k0AI89yMQIeTog=; b=oAv6L3COJBVGjInR0DS4943M4+zCmk/S/lRzO4eYB8bmaQDfaXNcgjQjQNHV0qpnZ2 PIeorJrUtLiim4fmA7rFf12oONEfObODRreYdwnCHLcOgaQazypOd5I0gd0BxaqLCn9R 88PQWjBvI2UQq4797s7pXcvLdGFJ0jqFPXmhNZEFuNKca+vHc8Kwa4esRvJhjQUPWqHL ifLCjGYi41SZPZXw0aLIrH/5cgsP3W+P8vTznsi4vMBBrWYhlkNq5UO2F5sLz+S5kZtV ZyS9Ri901ZmozGWbfBsMd9OC7w8ILLw30C8V2l2mQOolIHirS6OfIl4S5vQ9vZvp8adB i3dg== X-Gm-Message-State: AOAM533Kz8H08GEAkmFAIpoWVAzKBZoPdzH1ReS//UDLcOBdBcApgYm2 OXowjxzQeGhRZJx7eBptGrUPuQ== X-Google-Smtp-Source: ABdhPJwhzR1owxtSxcn/i7sJvd+M+Y4I1Lk6mDxLngNE+eJjOiArkO4ylh+L7M8LCd0+E5NHw2I9BA== X-Received: by 2002:adf:94e6:: with SMTP id 93mr4233006wrr.190.1602667680950; Wed, 14 Oct 2020 02:28:00 -0700 (PDT) Return-Path: Received: from xora-monster ([2a02:8010:64d6::1d89]) by smtp.gmail.com with ESMTPSA id m14sm3870755wro.43.2020.10.14.02.28.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2020 02:28:00 -0700 (PDT) Date: Wed, 14 Oct 2020 10:27:58 +0100 From: "Graeme Gregory" To: Shashi Mallela Cc: leif@nuviainc.com, ard.biesheuvel@arm.com, devel@edk2.groups.io Subject: Re: [PATCH v2 1/1] Silicon/Qemu/Sbsa: Add SBSA-wdt entry to GTDT Message-ID: <20201014092758.magpc6ahwzs6k4io@xora-monster> References: <20201013161435.33893-1-shashi.mallela@linaro.org> <20201013161435.33893-2-shashi.mallela@linaro.org> MIME-Version: 1.0 In-Reply-To: <20201013161435.33893-2-shashi.mallela@linaro.org> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Oct 13, 2020 at 12:14:35PM -0400, Shashi Mallela wrote: > SBSA generic watchdog timer structure entry has been added > to GTDT table as per BSAv0.9. > This enables acpi detection of wdt in qemu sbsa platform > > Signed-off-by: Shashi Mallela New version is looking fine to me. Reviewed-by: Graeme Gregory > --- > Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 53 +++++++++++++++++--- > 1 file changed, 45 insertions(+), 8 deletions(-) > > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > index d16778e01a5c..2312fd74e26d 100644 > --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > @@ -24,27 +24,55 @@ > #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF > #endif > > -#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE > +#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE > #define GTDT_TIMER_LEVEL_TRIGGERED 0 > -#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY > +#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY > #define GTDT_TIMER_ACTIVE_HIGH 0 > > #define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) > > +#define SBSA_PLATFORM_WATCHDOG_COUNT 1 > +#define SBSA_PLATFORM_TIMER_COUNT (SBSA_PLATFORM_WATCHDOG_COUNT) > + > +#define SBSAQEMU_WDT_REFRESH_FRAME_BASE 0x50010000 > +#define SBSAQEMU_WDT_CONTROL_FRAME_BASE 0x50011000 > +#define SBSAQEMU_WDT_IRQ 44 > + > +#define GTDT_WDTIMER_EDGE_TRIGGERED EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE > +#define GTDT_WDTIMER_LEVEL_TRIGGERED 0 > +#define GTDT_WDTIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY > +#define GTDT_WDTIMER_ACTIVE_HIGH 0 > + > +#define GTDT_WDTIMER_FLAGS (GTDT_WDTIMER_ACTIVE_HIGH | GTDT_WDTIMER_LEVEL_TRIGGERED) > + > +#define EFI_ACPI_6_3_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( \ > + RefreshFramePhysicalAddress, ControlFramePhysicalAddress, \ > + WatchdogTimerGSIV, WatchdogTimerFlags) \ > + { \ > + EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG, \ > + sizeof(EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), \ > + EFI_ACPI_RESERVED_WORD, \ > + RefreshFramePhysicalAddress, \ > + ControlFramePhysicalAddress, \ > + WatchdogTimerGSIV, \ > + WatchdogTimerFlags \ > + } > + > #pragma pack (1) > > typedef struct { > - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; > - } GENERIC_TIMER_DESCRIPTION_TABLE; > + EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; > + EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE Gwdt; > + } GENERIC_TIMER_DESCRIPTION_TABLES; > > #pragma pack () > > GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = { > { > SBSAQEMU_ACPI_HEADER( > - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, > + EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, > GENERIC_TIMER_DESCRIPTION_TABLE, > - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION > + EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION > ), > SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress > 0, // UINT32 Reserved > @@ -57,9 +85,18 @@ > FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV > GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags > 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress > - 0, // UINT32 PlatformTimerCount > - 0 > + SBSA_PLATFORM_TIMER_COUNT, // UINT32 PlatformTimerCount > + sizeof(EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE), > + // UINT32 PlatformTimerOffset > + 0, // UINT32 VirtualPL2TimerGSIV > + 0 // UINT32 VirtualPL2TimerFlags > }, > + EFI_ACPI_6_3_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( > + SBSAQEMU_WDT_REFRESH_FRAME_BASE, > + SBSAQEMU_WDT_CONTROL_FRAME_BASE, > + SBSAQEMU_WDT_IRQ, > + GTDT_WDTIMER_FLAGS > + ) > }; > > // Reference the table being generated to prevent the optimizer from removing the > -- > 2.18.4 >