From: "Graeme Gregory" <graeme@nuviainc.com>
To: Shashi Mallela <shashi.mallela@linaro.org>
Cc: leif@nuviainc.com, ard.biesheuvel@arm.com, devel@edk2.groups.io
Subject: Re: [PATCH v3 1/1] Silicon/Qemu/Sbsa: Add SBSA-wdt entry to GTDT
Date: Mon, 2 Nov 2020 13:47:07 +0000 [thread overview]
Message-ID: <20201102134707.2pkulyvo7i5hizmw@xora-monster> (raw)
In-Reply-To: <20201029202121.26710-2-shashi.mallela@linaro.org>
On Thu, Oct 29, 2020 at 04:21:21PM -0400, Shashi Mallela wrote:
> SBSA generic watchdog timer structure entry has been added
> to GTDT table as per SBSAv6.0.
> This enables acpi detection of wdt in qemu sbsa platform
>
This version seems has reverteed to v1 re-indenting the whole file?
Please base update on v2 where you did not do this.
Thanks
Graeme
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
> Cc: Graeme Gregory <graeme@nuviainc.com>
> Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
> ---
> Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 87 ++++++++++++++------
> 1 file changed, 62 insertions(+), 25 deletions(-)
>
> diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
> index d16778e01a5c..1713c203766e 100644
> --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
> +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
> @@ -24,42 +24,79 @@
> #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
> #endif
>
> -#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE
> +#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE
> #define GTDT_TIMER_LEVEL_TRIGGERED 0
> -#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
> +#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
> #define GTDT_TIMER_ACTIVE_HIGH 0
>
> #define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED)
>
> +#define SBSA_PLATFORM_WATCHDOG_COUNT 1
> +#define SBSA_PLATFORM_TIMER_COUNT (SBSA_PLATFORM_WATCHDOG_COUNT)
> +
> +#define SBSAQEMU_WDT_REFRESH_FRAME_BASE 0x50010000
> +#define SBSAQEMU_WDT_CONTROL_FRAME_BASE 0x50011000
> +#define SBSAQEMU_WDT_IRQ 44
> +
> +#define GTDT_WDTIMER_EDGE_TRIGGERED EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE
> +#define GTDT_WDTIMER_LEVEL_TRIGGERED 0
> +#define GTDT_WDTIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY
> +#define GTDT_WDTIMER_ACTIVE_HIGH 0
> +
> +#define GTDT_WDTIMER_FLAGS (GTDT_WDTIMER_ACTIVE_HIGH | GTDT_WDTIMER_LEVEL_TRIGGERED)
> +
> +#define EFI_ACPI_6_3_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( \
> + RefreshFramePhysicalAddress, ControlFramePhysicalAddress, \
> + WatchdogTimerGSIV, WatchdogTimerFlags) \
> + { \
> + EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG, \
> + sizeof(EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), \
> + EFI_ACPI_RESERVED_WORD, \
> + RefreshFramePhysicalAddress, \
> + ControlFramePhysicalAddress, \
> + WatchdogTimerGSIV, \
> + WatchdogTimerFlags \
> + }
> +
> #pragma pack (1)
>
> typedef struct {
> - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
> - } GENERIC_TIMER_DESCRIPTION_TABLE;
> + EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
> + EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE Gwdt;
> + } GENERIC_TIMER_DESCRIPTION_TABLES;
>
> #pragma pack ()
>
> - GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = {
> - {
> - SBSAQEMU_ACPI_HEADER(
> - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
> - GENERIC_TIMER_DESCRIPTION_TABLE,
> - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
> - ),
> - SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
> - 0, // UINT32 Reserved
> - FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
> - GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
> - FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
> - GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
> - FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
> - GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
> - FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
> - GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
> - 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
> - 0, // UINT32 PlatformTimerCount
> - 0
> - },
> + GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
> + {
> + SBSAQEMU_ACPI_HEADER(
> + EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
> + GENERIC_TIMER_DESCRIPTION_TABLES,
> + EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
> + ),
> + SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
> + 0, // UINT32 Reserved
> + FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
> + GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
> + FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
> + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
> + FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
> + GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
> + FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
> + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
> + 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
> + SBSA_PLATFORM_TIMER_COUNT, // UINT32 PlatformTimerCount
> + sizeof(EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE),
> + // UINT32 PlatformTimerOffset
> + 0, // UINT32 VirtualPL2TimerGSIV
> + 0 // UINT32 VirtualPL2TimerFlags
> + },
> + EFI_ACPI_6_3_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(
> + SBSAQEMU_WDT_REFRESH_FRAME_BASE,
> + SBSAQEMU_WDT_CONTROL_FRAME_BASE,
> + SBSAQEMU_WDT_IRQ,
> + GTDT_WDTIMER_FLAGS
> + )
> };
>
> // Reference the table being generated to prevent the optimizer from removing the
> --
> 2.18.4
>
prev parent reply other threads:[~2020-11-02 13:47 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-29 20:21 [PATCH v3 0/1] Add SBSA-wdt entry to GTDT Shashi Mallela
2020-10-29 20:21 ` [PATCH v3 1/1] Silicon/Qemu/Sbsa: " Shashi Mallela
2020-11-02 13:47 ` Graeme Gregory [this message]
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