From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by mx.groups.io with SMTP id smtpd.web08.31197.1604324831730606652 for ; Mon, 02 Nov 2020 05:47:12 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=1Rcnoe3b; spf=pass (domain: nuviainc.com, ip: 209.85.128.65, mailfrom: graeme@nuviainc.com) Received: by mail-wm1-f65.google.com with SMTP id p19so1301497wmg.0 for ; Mon, 02 Nov 2020 05:47:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=VUttaPfBqqVBC2tSKa5PfVSeb5vHrBFH7vS3UzjHShQ=; b=1Rcnoe3bM+SgbAOBww7Tg5xvl2J9qjNkxGPZXU81Zj87ml3KRGr4kZfwkjzM3JMYCD 9JUj1Zhab6muORIpWqU854ORQOnHaXqKc6ECmmNTnHKk0Jwoat0X0lcVKvY87qcF8jNV BCAGNAQXztb1Y02/KOC0VoknE13wmGPjm13Cz8qrQ6kjGhCqWOfFgs4IgODRWayp+q9r UmL6WcuMdsFb5Hhe8cb3AZsY4ZyFxaeWBtRZbiNtWX/Pn7AZCFV85zzxNzO8Qb5mRXGO xDnTu1sCt3xN57VY2D+TapXCsUJRf5L+XmQOHvIWfd9WD85J4Abr5+xlRGSeq4PKgxca KI8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=VUttaPfBqqVBC2tSKa5PfVSeb5vHrBFH7vS3UzjHShQ=; b=o7zEodMUHphl3GPK/2AftxKtiw3K8+fg3e4Nfg1PlhD+qtOCZv81iKGO6EGS0clda6 oCfM0t0zvw9NHk1J9HdxqiDDBSI0vHKmzDpUu8S8WTvF7KLpt0G5IdAcOJ52vSoFo0G2 V6z/bsV0CCoG76ukT7zzJL1PVrka7PrpJyspJkBnwQR/aUl+hTSeQH85ThPEO6ZCDDJ5 Beig5duJhXV163l3ITh5N4UUgMM+BAfyfhvbjHuU8gw/XtSOfBjsYSelu0tSNfy08MbV Th07ZlsgCI3kn3ymOXghNFICtjQW1SgW+kxa1Vq+kchHiWdzn9HEV3rul87to2DjaGZn BPaA== X-Gm-Message-State: AOAM53273gG+r/MWv0arm8ge6siY6LaKFEbSa7m3xuHQc5ebWeG6FFEV dGizFtcwsrCRDpKO/FhQv3s/+Q== X-Google-Smtp-Source: ABdhPJwPP+dzM5dWEpswwxz3dAmQjr4l1xhjkvQx/rCEdPA7HIZtvsoYOd3p4Hd9DVzQcNtA8WuxJw== X-Received: by 2002:a1c:c20a:: with SMTP id s10mr12208698wmf.23.1604324830296; Mon, 02 Nov 2020 05:47:10 -0800 (PST) Return-Path: Received: from xora-monster ([2a02:8010:64d6::1d89]) by smtp.gmail.com with ESMTPSA id w7sm23657716wre.9.2020.11.02.05.47.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2020 05:47:09 -0800 (PST) Date: Mon, 2 Nov 2020 13:47:07 +0000 From: "Graeme Gregory" To: Shashi Mallela Cc: leif@nuviainc.com, ard.biesheuvel@arm.com, devel@edk2.groups.io Subject: Re: [PATCH v3 1/1] Silicon/Qemu/Sbsa: Add SBSA-wdt entry to GTDT Message-ID: <20201102134707.2pkulyvo7i5hizmw@xora-monster> References: <20201029202121.26710-1-shashi.mallela@linaro.org> <20201029202121.26710-2-shashi.mallela@linaro.org> MIME-Version: 1.0 In-Reply-To: <20201029202121.26710-2-shashi.mallela@linaro.org> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Oct 29, 2020 at 04:21:21PM -0400, Shashi Mallela wrote: > SBSA generic watchdog timer structure entry has been added > to GTDT table as per SBSAv6.0. > This enables acpi detection of wdt in qemu sbsa platform > This version seems has reverteed to v1 re-indenting the whole file? Please base update on v2 where you did not do this. Thanks Graeme > Cc: Leif Lindholm > Cc: Ard Biesheuvel > Cc: Graeme Gregory > Signed-off-by: Shashi Mallela > --- > Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 87 ++++++++++++++------ > 1 file changed, 62 insertions(+), 25 deletions(-) > > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > index d16778e01a5c..1713c203766e 100644 > --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > @@ -24,42 +24,79 @@ > #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF > #endif > > -#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE > +#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE > #define GTDT_TIMER_LEVEL_TRIGGERED 0 > -#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY > +#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY > #define GTDT_TIMER_ACTIVE_HIGH 0 > > #define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) > > +#define SBSA_PLATFORM_WATCHDOG_COUNT 1 > +#define SBSA_PLATFORM_TIMER_COUNT (SBSA_PLATFORM_WATCHDOG_COUNT) > + > +#define SBSAQEMU_WDT_REFRESH_FRAME_BASE 0x50010000 > +#define SBSAQEMU_WDT_CONTROL_FRAME_BASE 0x50011000 > +#define SBSAQEMU_WDT_IRQ 44 > + > +#define GTDT_WDTIMER_EDGE_TRIGGERED EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE > +#define GTDT_WDTIMER_LEVEL_TRIGGERED 0 > +#define GTDT_WDTIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY > +#define GTDT_WDTIMER_ACTIVE_HIGH 0 > + > +#define GTDT_WDTIMER_FLAGS (GTDT_WDTIMER_ACTIVE_HIGH | GTDT_WDTIMER_LEVEL_TRIGGERED) > + > +#define EFI_ACPI_6_3_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( \ > + RefreshFramePhysicalAddress, ControlFramePhysicalAddress, \ > + WatchdogTimerGSIV, WatchdogTimerFlags) \ > + { \ > + EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG, \ > + sizeof(EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), \ > + EFI_ACPI_RESERVED_WORD, \ > + RefreshFramePhysicalAddress, \ > + ControlFramePhysicalAddress, \ > + WatchdogTimerGSIV, \ > + WatchdogTimerFlags \ > + } > + > #pragma pack (1) > > typedef struct { > - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; > - } GENERIC_TIMER_DESCRIPTION_TABLE; > + EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; > + EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE Gwdt; > + } GENERIC_TIMER_DESCRIPTION_TABLES; > > #pragma pack () > > - GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = { > - { > - SBSAQEMU_ACPI_HEADER( > - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, > - GENERIC_TIMER_DESCRIPTION_TABLE, > - EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION > - ), > - SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress > - 0, // UINT32 Reserved > - FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV > - GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags > - FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV > - GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags > - FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV > - GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags > - FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV > - GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags > - 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress > - 0, // UINT32 PlatformTimerCount > - 0 > - }, > + GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = { > + { > + SBSAQEMU_ACPI_HEADER( > + EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, > + GENERIC_TIMER_DESCRIPTION_TABLES, > + EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION > + ), > + SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress > + 0, // UINT32 Reserved > + FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV > + GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags > + FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV > + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags > + FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV > + GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags > + FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV > + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags > + 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress > + SBSA_PLATFORM_TIMER_COUNT, // UINT32 PlatformTimerCount > + sizeof(EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE), > + // UINT32 PlatformTimerOffset > + 0, // UINT32 VirtualPL2TimerGSIV > + 0 // UINT32 VirtualPL2TimerFlags > + }, > + EFI_ACPI_6_3_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( > + SBSAQEMU_WDT_REFRESH_FRAME_BASE, > + SBSAQEMU_WDT_CONTROL_FRAME_BASE, > + SBSAQEMU_WDT_IRQ, > + GTDT_WDTIMER_FLAGS > + ) > }; > > // Reference the table being generated to prevent the optimizer from removing the > -- > 2.18.4 >