* [platforms: PATCH] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description
@ 2020-11-14 9:21 Marcin Wojtas
2020-11-14 13:19 ` Ard Biesheuvel
0 siblings, 1 reply; 3+ messages in thread
From: Marcin Wojtas @ 2020-11-14 9:21 UTC (permalink / raw)
To: devel; +Cc: leif, ard.biesheuvel, mw, jsd
This patch adds a new description of the board's SD/MMC
interfaces in DSDT table that can work with the newly
introduced support in Linux.
Remaining Armada7k8k / CN913x platforms will follow
after this binding is accepted.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 60 ++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
index 7e9e361988..5f910fa814 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
@@ -86,6 +86,66 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
})
}
+ Device (MMC0)
+ {
+ Name (_HID, "MRVL0002") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0xF06E0000, // Address Base (MMIO)
+ 0x00000300, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 48
+ }
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "clock-frequency", 400000000 },
+ Package () { "bus-width", 8 },
+ Package () { "marvell,xenon-phy-slow-mode", 0x1 },
+ Package () { "no-1-8-v", 0x1 },
+ Package () { "no-sd", 0x1 },
+ Package () { "no-sdio", 0x1 },
+ Package () { "non-removable", 0x1 },
+ Package () { "compatible", "marvell,armada-ap806-sdhci" },
+ }
+ })
+ }
+
+ Device (MMC1)
+ {
+ Name (_HID, "MRVL0002") // _HID: Hardware ID
+ Name (_UID, 0x01) // _UID: Unique ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0xF2780000, // Address Base (MMIO)
+ 0x00000300, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ CP_GIC_SPI_CP0_SDMMC
+ }
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "clock-frequency", 400000000 },
+ Package () { "bus-width", 4 },
+ Package () { "broken-cd", 0x1 },
+ Package () { "no-1-8-v", 0x1 },
+ }
+ })
+ }
+
Device (XHC0)
{
Name (_HID, "PNP0D10") // _HID: Hardware ID
--
2.29.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [platforms: PATCH] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description
2020-11-14 9:21 [platforms: PATCH] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description Marcin Wojtas
@ 2020-11-14 13:19 ` Ard Biesheuvel
2020-11-18 19:42 ` [edk2-devel] " Marcin Wojtas
0 siblings, 1 reply; 3+ messages in thread
From: Ard Biesheuvel @ 2020-11-14 13:19 UTC (permalink / raw)
To: Marcin Wojtas, devel; +Cc: leif, jsd
Hello Marcin,
On 11/14/20 10:21 AM, Marcin Wojtas wrote:
> This patch adds a new description of the board's SD/MMC
> interfaces in DSDT table that can work with the newly
> introduced support in Linux.
> Remaining Armada7k8k / CN913x platforms will follow
> after this binding is accepted.
>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 60 ++++++++++++++++++++
> 1 file changed, 60 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> index 7e9e361988..5f910fa814 100644
> --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> @@ -86,6 +86,66 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> })
> }
>
> + Device (MMC0)
> + {
> + Name (_HID, "MRVL0002") // _HID: Hardware ID
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> + {
> + Memory32Fixed (ReadWrite,
> + 0xF06E0000, // Address Base (MMIO)
> + 0x00000300, // Address Length
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + 48
> + }
> + })
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "clock-frequency", 400000000 },
> + Package () { "bus-width", 8 },
> + Package () { "marvell,xenon-phy-slow-mode", 0x1 },
> + Package () { "no-1-8-v", 0x1 },
> + Package () { "no-sd", 0x1 },
> + Package () { "no-sdio", 0x1 },
> + Package () { "non-removable", 0x1 },
> + Package () { "compatible", "marvell,armada-ap806-sdhci" },
Please use either a dedicated ACPI _HID, or use PRP0001+compatible to
match the device (and the former is strongly preferred).
> + }
> + })
> + }
> +
> + Device (MMC1)
> + {
> + Name (_HID, "MRVL0002") // _HID: Hardware ID
> + Name (_UID, 0x01) // _UID: Unique ID
> + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> + {
> + Memory32Fixed (ReadWrite,
> + 0xF2780000, // Address Base (MMIO)
> + 0x00000300, // Address Length
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + CP_GIC_SPI_CP0_SDMMC
> + }
> + })
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "clock-frequency", 400000000 },
> + Package () { "bus-width", 4 },
> + Package () { "broken-cd", 0x1 },
> + Package () { "no-1-8-v", 0x1 },
> + }
> + })
> + }
> +
> Device (XHC0)
> {
> Name (_HID, "PNP0D10") // _HID: Hardware ID
>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [edk2-devel] [platforms: PATCH] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description
2020-11-14 13:19 ` Ard Biesheuvel
@ 2020-11-18 19:42 ` Marcin Wojtas
0 siblings, 0 replies; 3+ messages in thread
From: Marcin Wojtas @ 2020-11-18 19:42 UTC (permalink / raw)
To: edk2-devel-groups-io, Ard Biesheuvel; +Cc: Leif Lindholm, jsd@semihalf.com
Hi Ard,
sob., 14 lis 2020 o 14:19 Ard Biesheuvel <ard.biesheuvel@arm.com> napisał(a):
>
> Hello Marcin,
>
> On 11/14/20 10:21 AM, Marcin Wojtas wrote:
> > This patch adds a new description of the board's SD/MMC
> > interfaces in DSDT table that can work with the newly
> > introduced support in Linux.
> > Remaining Armada7k8k / CN913x platforms will follow
> > after this binding is accepted.
> >
> > Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> > ---
> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 60 ++++++++++++++++++++
> > 1 file changed, 60 insertions(+)
> >
> > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> > index 7e9e361988..5f910fa814 100644
> > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> > @@ -86,6 +86,66 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> > })
> > }
> >
> > + Device (MMC0)
> > + {
> > + Name (_HID, "MRVL0002") // _HID: Hardware ID
> > + Name (_UID, 0x00) // _UID: Unique ID
> > + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > +
> > + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > + {
> > + Memory32Fixed (ReadWrite,
> > + 0xF06E0000, // Address Base (MMIO)
> > + 0x00000300, // Address Length
> > + )
> > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> > + {
> > + 48
> > + }
> > + })
> > + Name (_DSD, Package () {
> > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> > + Package () {
> > + Package () { "clock-frequency", 400000000 },
> > + Package () { "bus-width", 8 },
> > + Package () { "marvell,xenon-phy-slow-mode", 0x1 },
> > + Package () { "no-1-8-v", 0x1 },
> > + Package () { "no-sd", 0x1 },
> > + Package () { "no-sdio", 0x1 },
> > + Package () { "non-removable", 0x1 },
> > + Package () { "compatible", "marvell,armada-ap806-sdhci" },
>
> Please use either a dedicated ACPI _HID, or use PRP0001+compatible to
> match the device (and the former is strongly preferred).
I'll go with the dedicated _HID and differentiate the silicon variant
with acpi_match_data.
Thanks,
Marcin
>
>
> > + }
> > + })
> > + }
> > +
> > + Device (MMC1)
> > + {
> > + Name (_HID, "MRVL0002") // _HID: Hardware ID
> > + Name (_UID, 0x01) // _UID: Unique ID
> > + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > +
> > + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > + {
> > + Memory32Fixed (ReadWrite,
> > + 0xF2780000, // Address Base (MMIO)
> > + 0x00000300, // Address Length
> > + )
> > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> > + {
> > + CP_GIC_SPI_CP0_SDMMC
> > + }
> > + })
> > + Name (_DSD, Package () {
> > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> > + Package () {
> > + Package () { "clock-frequency", 400000000 },
> > + Package () { "bus-width", 4 },
> > + Package () { "broken-cd", 0x1 },
> > + Package () { "no-1-8-v", 0x1 },
> > + }
> > + })
> > + }
> > +
> > Device (XHC0)
> > {
> > Name (_HID, "PNP0D10") // _HID: Hardware ID
> >
>
>
>
>
>
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-11-18 19:42 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-11-14 9:21 [platforms: PATCH] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description Marcin Wojtas
2020-11-14 13:19 ` Ard Biesheuvel
2020-11-18 19:42 ` [edk2-devel] " Marcin Wojtas
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox