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From: "jasonlouyun" <yun.lou@intel.com>
To: devel@edk2.groups.io
Cc: jasonlouyun <yun.lou@intel.com>, Ray Ni <ray.ni@intel.com>,
	Eric Dong <eric.dong@intel.com>, Laszlo Ersek <lersek@redhat.com>,
	Rahul Kumar <rahul1.kumar@intel.com>
Subject: [PATCH v1 2/2] UefiCpuPkg/CpuCacheInfoLib: Add new CpuCacheInfoLib.
Date: Thu, 19 Nov 2020 10:36:58 +0800	[thread overview]
Message-ID: <20201119023658.926-2-yun.lou@intel.com> (raw)
In-Reply-To: <20201119023658.926-1-yun.lou@intel.com>

This library uses a platform agnostic algorithm to get CPU cache
information. It provides user with an API(GetCpuCacheInfo) to get
detailed CPU cache information by each package, each core type
included in this package, and each cache level & type.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
---
 UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c         | 602 ++++++++++++++++++++
 UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c      | 131 +++++
 UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c      | 130 +++++
 UefiCpuPkg/Include/Library/CpuCacheInfoLib.h                 |  68 +++
 UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni       |  15 +
 UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf    |  43 ++
 UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h |  64 +++
 UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf    |  43 ++
 UefiCpuPkg/UefiCpuPkg.dec                                    |   3 +
 UefiCpuPkg/UefiCpuPkg.dsc                                    |   4 +
 10 files changed, 1103 insertions(+)

diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c
new file mode 100644
index 000000000000..e0cc6bbf7fa2
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c
@@ -0,0 +1,602 @@
+/** @file
+  Provides cache info for each package, core type, cache level and cache type.
+
+  Copyright (c) 2020 Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/CpuCacheInfoLib.h>
+#include <Register/Cpuid.h>
+#include <InternalCpuCacheInfoLib.h>
+
+/*
+  Defines the maximum count of Deterministic Cache Parameters Leaf of all APs
+  and BSP.
+  To save boot time, skip starting up all APs to calculate each AP's count of
+  Deterministic Cache Parameters Leaf, so use a definition instead.
+  Anyway, definition value will be checked in CollectCoreAndCacheData function.
+*/
+#define MAX_NUM_OF_CACHE_PARAMS_LEAF    5
+
+/*
+  Defines the maximum count of Core Type of all BSP and APs in one package.
+  Core Type value comes from CPUID(1Ah).Eax[31:24].Coretype
+*/
+#define MAX_NUM_OF_CORE_TYPE            256
+
+/*
+  Defines the maximum count of packages.
+*/
+#define MAX_NUM_OF_PACKAGE              100
+
+/**
+  Get EFI_MP_SERVICES_PROTOCOL pointer.
+
+  @retval  Return MP_SERVICES structure.
+**/
+MP_SERVICES
+GetMpServices (
+  VOID
+  );
+
+/**
+  Collect core and cache information of all APs and BSP via CPUID instructions.
+
+  @param[in]  Context             The pointer to COLLECT_CPUID_CACHE_DATA_CONTEXT structure.
+**/
+VOID
+CollectCoreAndCacheDataForAll (
+  IN COLLECT_CPUID_CACHE_DATA_CONTEXT   *Context
+  );
+
+/**
+  Get detailed information of the requested logical processor.
+
+  @param[in]  MpServices          MP_SERVICES structure.
+  @param[in]  ProcessorNum        The requested logical processor number.
+
+  @retval  Return EFI_PROCESSOR_INFORMATION structure of requested logical processors.
+**/
+EFI_PROCESSOR_INFORMATION
+GetCurrentProcessorInfo (
+  IN MP_SERVICES            MpServices,
+  IN UINTN                  ProcessorNum
+  );
+
+/**
+  Get the logical processor number.
+
+  @param[in]  MpServices          MP_SERVICES structure.
+
+  @retval  Return the logical processor number.
+**/
+UINT32
+GetCurrentProcessorNum (
+  IN MP_SERVICES            MpServices
+  );
+
+/**
+  Get the total number of logical processors in the platform.
+
+  @param[in]  MpServices          MP_SERVICES structure.
+
+  @retval  Return the total number of logical processors.
+**/
+UINT32
+GetNumberOfProcessor (
+  IN MP_SERVICES            MpServices
+  );
+
+/**
+  Print CpuidCacheData array.
+
+  @param[in]  CpuidCacheData      Pointer to the CpuidCacheData array.
+  @param[in]  CpuidCacheDataCount The length of CpuidCacheData array.
+
+**/
+VOID
+PrintCpuidCacheDataTable (
+  IN CPUID_CACHE_DATA       *CpuidCacheData,
+  IN UINTN                  CpuidCacheDataCount
+  )
+{
+  UINTN                     Index;
+
+  DEBUG((DEBUG_ERROR, "+-------+------------------------------------------------------------------------+\n"));
+  DEBUG((DEBUG_ERROR, "| Index | ApicId (Pkg / Core / Thread)  CoreType  Level Type  ShareBits SizeinKB |\n"));
+  DEBUG((DEBUG_ERROR, "+-------+------------------------------------------------------------------------+\n"));
+
+  for (Index = 0; Index < CpuidCacheDataCount; Index++) {
+    if (Index % MAX_NUM_OF_CACHE_PARAMS_LEAF == 0) {
+      DEBUG((DEBUG_ERROR, "|*"));
+    } else {
+      DEBUG((DEBUG_ERROR, "| "));
+    }
+
+    DEBUG((DEBUG_ERROR, "%4x  |  %4x %4x  /%4x  / %4x        %2x      %2x    %2x     %4x   %8x  |\n", Index, \
+        CpuidCacheData[Index].ApicId, CpuidCacheData[Index].Location.Package, CpuidCacheData[Index].Location.Core, \
+        CpuidCacheData[Index].Location.Thread, CpuidCacheData[Index].CoreType, CpuidCacheData[Index].CacheLevel, \
+        CpuidCacheData[Index].CacheType, CpuidCacheData[Index].CacheShareBits, CpuidCacheData[Index].CacheSizeinKB));
+  }
+
+  DEBUG((DEBUG_ERROR, "+-------+------------------------------------------------------------------------+\n"));
+}
+
+/**
+  Print CpuCacheInfo array.
+
+  @param[in]  CpuCacheInfo        Pointer to the CpuCacheInfo array.
+  @param[in]  CpuCacheInfoCount   The length of CpuCacheInfo array.
+
+**/
+VOID
+PrintCpuCacheInfoTable (
+  IN CPU_CACHE_INFO         *CpuCacheInfo,
+  IN UINTN                  CpuCacheInfoCount
+  )
+{
+  UINTN                     Index;
+
+  DEBUG((DEBUG_ERROR, "+-------+--------------------------------------------------------------------+\n"));
+  DEBUG((DEBUG_ERROR, "| Index | Packge  CoreType  CacheLevel  CacheType  CacheSizeinKB  CacheCount |\n"));
+  DEBUG((DEBUG_ERROR, "+-------+--------------------------------------------------------------------+\n"));
+
+  for (Index = 0; Index < CpuCacheInfoCount; Index++) {
+    DEBUG((DEBUG_ERROR, "| %4x  | %4x       %2x        %2x          %2x      %8x         %4x     |\n", Index, \
+        CpuCacheInfo[Index].Package, CpuCacheInfo[Index].CoreType, CpuCacheInfo[Index].CacheLevel, \
+        CpuCacheInfo[Index].CacheType, CpuCacheInfo[Index].CacheSizeinKB, CpuCacheInfo[Index].CacheCount));
+  }
+
+  DEBUG((DEBUG_ERROR, "+-------+--------------------------------------------------------------------+\n"));
+}
+
+/**
+  Get the total number of package in the platform.
+
+  @param[in]  CpuidCacheData      Pointer to the CpuidCacheData array.
+  @param[in]  CpuidCacheDataCount The length of CpuidCacheData array.
+
+  @retval  Return the total number of package in the platform.
+**/
+UINT32
+GetNumberOfPackage (
+  IN CPUID_CACHE_DATA       *CpuidCacheData,
+  IN UINTN                  CpuidCacheDataCount
+  )
+{
+  UINTN                     ProcessorNum;
+  UINTN                     PackageIndex;
+  UINT32                    Package[MAX_NUM_OF_PACKAGE];
+  BOOLEAN                   Package0Existed;
+  UINTN                     Count;
+  CPUID_CACHE_DATA          *CurrentCpuidCacheData;
+
+  //
+  // Package array is empty.
+  //
+  Count = 0;
+  Package0Existed = FALSE;
+  ZeroMem(Package, sizeof(Package));
+
+  for (ProcessorNum = 0; ProcessorNum * MAX_NUM_OF_CACHE_PARAMS_LEAF < CpuidCacheDataCount; ProcessorNum++) {
+    CurrentCpuidCacheData = &CpuidCacheData[ProcessorNum * MAX_NUM_OF_CACHE_PARAMS_LEAF];
+
+    //
+    // If package value is the same as default value of Package array.
+    // We can not consider this value has already existed in the Package array.
+    //
+    if (CurrentCpuidCacheData->Location.Package == 0) {
+      if (!Package0Existed) {
+        Package0Existed = TRUE;
+        Count++;
+        ASSERT(Count <= MAX_NUM_OF_PACKAGE);
+      }
+      continue;
+    }
+
+    //
+    // For the Package has already existed in Package array, break out the loop.
+    //
+    for (PackageIndex = 0; PackageIndex < MAX_NUM_OF_PACKAGE; PackageIndex++) {
+      if (CurrentCpuidCacheData->Location.Package == Package[PackageIndex]) {
+        break;
+      }
+    }
+
+    //
+    // For the new type, save it in CoreType array.
+    //
+    if (PackageIndex == MAX_NUM_OF_PACKAGE) {
+      Package[Count++] = CurrentCpuidCacheData->Location.Package;
+      ASSERT(Count <= MAX_NUM_OF_PACKAGE);
+    }
+  }
+
+  return (UINT32)Count;
+}
+
+/**
+  Get the number of CoreType of requested package.
+
+  @param[in]  CpuidCacheData      Pointer to the CpuidCacheData array.
+  @param[in]  CpuidCacheDataCount The length of CpuidCacheData array.
+  @param[in]  Package             The requested package number.
+
+  @retval  Return the number of CoreType of requested package.
+**/
+UINT8
+GetNumberOfCoreTypePerPackage (
+  IN CPUID_CACHE_DATA       *CpuidCacheData,
+  IN UINTN                  CpuidCacheDataCount,
+  IN UINTN                  Package
+  )
+{
+  UINTN                     ProcessorNum;
+  UINTN                     CoreTypeIndex;
+  UINT8                     CoreType[MAX_NUM_OF_CORE_TYPE];
+  BOOLEAN                   CoreType0Existed;
+  UINTN                     Count;
+  CPUID_CACHE_DATA          *CurrentCpuidCacheData;
+
+  //
+  // CoreType array is empty.
+  //
+  Count = 0;
+  CoreType0Existed = FALSE;
+  ZeroMem(CoreType, sizeof(CoreType));
+
+  for (ProcessorNum = 0; ProcessorNum * MAX_NUM_OF_CACHE_PARAMS_LEAF < CpuidCacheDataCount; ProcessorNum++) {
+    CurrentCpuidCacheData = &CpuidCacheData[ProcessorNum * MAX_NUM_OF_CACHE_PARAMS_LEAF];
+
+    if (CurrentCpuidCacheData->Location.Package != Package) {
+      continue;
+
+    //
+    // If the type value is the same as default value of CoreType array.
+    // We can not consider this value has already existed in the CoreType array.
+    //
+    } else if (CurrentCpuidCacheData->CoreType == 0) {
+      if (!CoreType0Existed) {
+        CoreType0Existed = TRUE;
+        Count++;
+        ASSERT(Count <= MAX_NUM_OF_CORE_TYPE);
+      }
+      continue;
+    }
+
+    //
+    // For the type has already existed in CoreType array, break out the loop.
+    //
+    for (CoreTypeIndex = 0; CoreTypeIndex < MAX_NUM_OF_CORE_TYPE; CoreTypeIndex++) {
+      if (CurrentCpuidCacheData->CoreType == CoreType[CoreTypeIndex]) {
+        break;
+      }
+    }
+
+    //
+    // For the new type, save it in CoreType array.
+    //
+    if (CoreTypeIndex == MAX_NUM_OF_CORE_TYPE) {
+      CoreType[Count++] = CurrentCpuidCacheData->CoreType;
+      ASSERT(Count <= MAX_NUM_OF_CORE_TYPE);
+    }
+  }
+
+  return (UINT8)Count;
+}
+
+/**
+  Collect core and cache information of calling processor via CPUID instructions.
+
+  @param[in] Buffer             The pointer to private data buffer.
+**/
+VOID
+CollectCoreAndCacheData (
+  IN OUT VOID               *Buffer
+  )
+{
+  UINTN                     ProcessorNum;
+  UINT32                    CpuidMaxInput;
+  UINT8                     CoreType;
+  UINT8                     CacheParamLeafNum;
+  CPUID_CACHE_PARAMS_EAX    CacheParamEax;
+  CPUID_CACHE_PARAMS_EBX    CacheParamEbx;
+  UINT32                    CacheParamEcx;
+  CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX   NativeModelIdAndCoreTypeEax;
+  COLLECT_CPUID_CACHE_DATA_CONTEXT  *Context;
+  CPUID_CACHE_DATA          *CpuidCacheData;
+
+  Context = (COLLECT_CPUID_CACHE_DATA_CONTEXT *)Buffer;
+
+  ProcessorNum = GetCurrentProcessorNum (Context->MpServices);
+
+  CpuidCacheData = &Context->CpuidCacheData[MAX_NUM_OF_CACHE_PARAMS_LEAF * ProcessorNum];
+
+  AsmCpuid (CPUID_SIGNATURE, &CpuidMaxInput, NULL, NULL, NULL);
+
+  //
+  // get CoreType if CPUID_HYBRID_INFORMATION leaf is supported.
+  //
+  CoreType = 0;
+  if (CpuidMaxInput >= CPUID_HYBRID_INFORMATION) {
+    AsmCpuidEx(CPUID_HYBRID_INFORMATION, CPUID_HYBRID_INFORMATION_SUB_LEAF, &NativeModelIdAndCoreTypeEax.Uint32, NULL, NULL, NULL);
+    CoreType = (UINT8)NativeModelIdAndCoreTypeEax.Bits.CoreType;
+  }
+
+  //
+  // cache hierarchy starts with an index value of 0.
+  //
+  CacheParamLeafNum = 0;
+
+  while (CacheParamLeafNum != MAX_NUM_OF_CACHE_PARAMS_LEAF) {
+    AsmCpuidEx(CPUID_CACHE_PARAMS, CacheParamLeafNum, &CacheParamEax.Uint32, &CacheParamEbx.Uint32, &CacheParamEcx, NULL);
+
+    if (CacheParamEax.Bits.CacheType == 0) {
+      break;
+    }
+
+    CpuidCacheData[CacheParamLeafNum].CoreType = CoreType;
+    CpuidCacheData[CacheParamLeafNum].CacheLevel = (UINT8)CacheParamEax.Bits.CacheLevel;
+    CpuidCacheData[CacheParamLeafNum].CacheType = (UINT8)CacheParamEax.Bits.CacheType;
+    CpuidCacheData[CacheParamLeafNum].CacheShareBits = (UINT16)CacheParamEax.Bits.MaximumAddressableIdsForLogicalProcessors;
+    CpuidCacheData[CacheParamLeafNum].CacheSizeinKB = ((CacheParamEbx.Bits.Ways + 1) * \
+        (CacheParamEbx.Bits.LinePartitions+1) * (CacheParamEbx.Bits.LineSize+1) * (CacheParamEcx+1)) / 1024;
+
+    ASSERT(CacheParamLeafNum != MAX_NUM_OF_CACHE_PARAMS_LEAF);
+    CacheParamLeafNum++;
+  }
+}
+
+/**
+  Collect processor location information of all logical processors via MpServices.
+
+  @param[in]  Context             The pointer to COLLECT_CPUID_CACHE_DATA_CONTEXT structure.
+  @param[in]  NumberOfProcessor   The total number of logical processors in the platform.
+
+**/
+VOID
+CollectProcessorLocationData(
+  IN COLLECT_CPUID_CACHE_DATA_CONTEXT   *Context,
+  IN UINTN                              NumberOfProcessor
+  )
+{
+  UINTN                     ProcessorNum;
+  UINTN                     CacheParamLeafNum;
+  EFI_PROCESSOR_INFORMATION ProcessorInfo;
+  IN CPUID_CACHE_DATA       *CpuidCacheData;
+
+  for (ProcessorNum = 0; ProcessorNum < NumberOfProcessor; ProcessorNum++) {
+    CpuidCacheData = &Context->CpuidCacheData[MAX_NUM_OF_CACHE_PARAMS_LEAF * ProcessorNum];
+    ProcessorInfo = GetCurrentProcessorInfo(Context->MpServices, ProcessorNum);
+
+    for (CacheParamLeafNum = 0; CacheParamLeafNum < MAX_NUM_OF_CACHE_PARAMS_LEAF; CacheParamLeafNum++) {
+      CpuidCacheData[CacheParamLeafNum].Location.Package = ProcessorInfo.Location.Package;
+      CpuidCacheData[CacheParamLeafNum].Location.Core = ProcessorInfo.Location.Core;
+      CpuidCacheData[CacheParamLeafNum].Location.Thread = ProcessorInfo.Location.Thread;
+      CpuidCacheData[CacheParamLeafNum].ApicId = (UINT32)ProcessorInfo.ProcessorId;
+    }
+  }
+}
+
+/**
+  Collect CpuCacheInfo data from the CpuidCacheData.
+
+  @param[in]      CpuidCacheData      Pointer to the CpuidCacheData array.
+  @param[in]      CpuidCacheDataCount The length of CpuidCacheData array.
+  @param[in, out] CpuCacheInfo        Pointer to the CpuCacheInfo array.
+  @param[in, out] CpuCacheInfoCount   As input, point to the length of response CpuCacheInfo array.
+                                      As output, point to the actual length of response CpuCacheInfo array.
+
+  @retval         EFI_SUCCESS             Function completed successfully.
+  @retval         EFI_OUT_OF_RESOURCES    Required resources could not be allocated.
+  @retval         EFI_BUFFER_TOO_SMALL    CpuCacheInfoCount is too small to hold the response CpuCacheInfo
+                                          array. CpuCacheInfoCount has been updated with the length needed
+                                          to complete the request.
+**/
+EFI_STATUS
+CollectCpuCacheInfoData (
+  IN CPUID_CACHE_DATA       *CpuidCacheData,
+  IN UINTN                  CpuidCacheDataCount,
+  IN OUT CPU_CACHE_INFO     *CpuCacheInfo,
+  IN OUT UINTN              *CpuCacheInfoCount
+  )
+{
+  EFI_STATUS                Status;
+  UINT32                    NumberOfPackage;
+  UINT8                     NumberOfCoreType;
+  UINTN                     TotalNumberOfCoreType;
+  CPU_CACHE_INFO            *TempCpuCacheInfo;
+  UINTN                     TempCacheInfoIndex;
+  UINTN                     TempCpuCacheInfoCount;
+  UINTN                     PackageNum;
+  UINTN                     CurrentCacheDataIndex;
+  UINTN                     NextCacheDataIndex;
+  UINTN                     CacheInfoIndex;
+  UINTN                     Count;
+
+  //
+  // Get number of Packages.
+  //
+  NumberOfPackage = GetNumberOfPackage (CpuidCacheData, CpuidCacheDataCount);
+  DEBUG((DEBUG_ERROR, "[CacheInfoLib] NumberOfPackage = %d\n", NumberOfPackage));
+
+  //
+  // Get number of core types for each package and count the total number.
+  // E.g. If Packege1 and Package2 both have 2 core types, the total number is 4.
+  //
+  TotalNumberOfCoreType = 0;
+
+  for (PackageNum = 0; PackageNum < NumberOfPackage; PackageNum++) {
+    NumberOfCoreType = GetNumberOfCoreTypePerPackage(CpuidCacheData, CpuidCacheDataCount, PackageNum);
+    DEBUG((DEBUG_ERROR, "[CacheInfoLib] Package%d: NumberOfCoreType = %d\n", PackageNum, NumberOfCoreType));
+
+    TotalNumberOfCoreType += NumberOfCoreType;
+  }
+  DEBUG((DEBUG_ERROR, "[CacheInfoLib] TotalNumberOfCoreType = %d\n", TotalNumberOfCoreType));
+
+  TempCpuCacheInfoCount = TotalNumberOfCoreType * MAX_NUM_OF_CACHE_PARAMS_LEAF;
+  TempCpuCacheInfo = AllocatePages (EFI_SIZE_TO_PAGES(TempCpuCacheInfoCount * sizeof(*TempCpuCacheInfo)));
+  ASSERT(TempCpuCacheInfo != NULL);
+  if (TempCpuCacheInfo == NULL) {
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  ZeroMem(TempCpuCacheInfo, EFI_PAGES_TO_SIZE(EFI_SIZE_TO_PAGES(TempCpuCacheInfoCount * sizeof(*TempCpuCacheInfo))));
+
+  //
+  // TempCpuCacheInfo is empty.
+  //
+  Count = 0;
+
+  for (CurrentCacheDataIndex = 0; CurrentCacheDataIndex < CpuidCacheDataCount; CurrentCacheDataIndex++) {
+    if (CpuidCacheData[CurrentCacheDataIndex].CacheSizeinKB == 0)
+      continue;
+
+    //
+    // For the sharing caches, clear their CacheSize.
+    //
+    for (NextCacheDataIndex = CurrentCacheDataIndex + 1; NextCacheDataIndex < CpuidCacheDataCount; NextCacheDataIndex++) {
+      if (CpuidCacheData[NextCacheDataIndex].CacheSizeinKB == 0)
+        continue;
+
+      if (CpuidCacheData[CurrentCacheDataIndex].Location.Package == CpuidCacheData[NextCacheDataIndex].Location.Package && \
+          CpuidCacheData[CurrentCacheDataIndex].CoreType == CpuidCacheData[NextCacheDataIndex].CoreType &&  \
+          CpuidCacheData[CurrentCacheDataIndex].CacheLevel == CpuidCacheData[NextCacheDataIndex].CacheLevel && \
+          CpuidCacheData[CurrentCacheDataIndex].CacheType == CpuidCacheData[NextCacheDataIndex].CacheType && \
+          (CpuidCacheData[CurrentCacheDataIndex].ApicId & ~CpuidCacheData[CurrentCacheDataIndex].CacheShareBits) == \
+          (CpuidCacheData[NextCacheDataIndex].ApicId & ~CpuidCacheData[NextCacheDataIndex].CacheShareBits)) {
+        CpuidCacheData[NextCacheDataIndex].CacheSizeinKB = 0; // uses the sharing cache
+      }
+    }
+
+    //
+    // For the cache has already existed in TempCpuCacheInfo buffer, increase its CacheCount.
+    //
+    for (TempCacheInfoIndex = 0; TempCacheInfoIndex < TempCpuCacheInfoCount; TempCacheInfoIndex++) {
+      if (CpuidCacheData[CurrentCacheDataIndex].Location.Package == TempCpuCacheInfo[TempCacheInfoIndex].Package &&  \
+          CpuidCacheData[CurrentCacheDataIndex].CoreType == TempCpuCacheInfo[TempCacheInfoIndex].CoreType &&  \
+          CpuidCacheData[CurrentCacheDataIndex].CacheLevel == TempCpuCacheInfo[TempCacheInfoIndex].CacheLevel && \
+          CpuidCacheData[CurrentCacheDataIndex].CacheType == TempCpuCacheInfo[TempCacheInfoIndex].CacheType) {
+        TempCpuCacheInfo[TempCacheInfoIndex].CacheCount++;
+        break;
+      }
+    }
+
+    //
+    // For the new cache with different Package, CoreType, CacheLevel or CacheType, copy its
+    // data into TempCpuCacheInfo buffer.
+    //
+    if (TempCacheInfoIndex == TempCpuCacheInfoCount) {
+      TempCpuCacheInfo[Count].Package = CpuidCacheData[CurrentCacheDataIndex].Location.Package;
+      TempCpuCacheInfo[Count].CoreType = CpuidCacheData[CurrentCacheDataIndex].CoreType;
+      TempCpuCacheInfo[Count].CacheLevel = CpuidCacheData[CurrentCacheDataIndex].CacheLevel;
+      TempCpuCacheInfo[Count].CacheType = CpuidCacheData[CurrentCacheDataIndex].CacheType;
+      TempCpuCacheInfo[Count].CacheSizeinKB = CpuidCacheData[CurrentCacheDataIndex].CacheSizeinKB;
+      TempCpuCacheInfo[Count].CacheCount = 1;
+
+      Count++;
+      ASSERT(Count <= TempCpuCacheInfoCount);
+    }
+  }
+
+  PrintCpuidCacheDataTable(CpuidCacheData, CpuidCacheDataCount);
+
+  if (*CpuCacheInfoCount < Count) {
+    Status = EFI_BUFFER_TOO_SMALL;
+  } else {
+    Status = EFI_SUCCESS;
+
+    for (CacheInfoIndex = 0; CacheInfoIndex < Count; CacheInfoIndex++) {
+      CopyMem(&CpuCacheInfo[CacheInfoIndex], &TempCpuCacheInfo[CacheInfoIndex], sizeof(*CpuCacheInfo));
+    }
+
+    PrintCpuCacheInfoTable(CpuCacheInfo, Count);
+  }
+
+  *CpuCacheInfoCount = Count;
+
+  FreePages(TempCpuCacheInfo, EFI_SIZE_TO_PAGES(TempCpuCacheInfoCount * sizeof(*TempCpuCacheInfo)));
+
+  return Status;
+}
+
+/**
+  Get CpuCacheInfo data array.
+
+  @param[in, out] CpuCacheInfo        Pointer to the CpuCacheInfo array.
+  @param[in, out] CpuCacheInfoCount   As input, point to the length of response CpuCacheInfo array.
+                                      As output, point to the actual length of response CpuCacheInfo array.
+
+  @retval         EFI_SUCCESS             Function completed successfully.
+  @retval         EFI_INVALID_PARAMETER   CpuCacheInfoCount is NULL.
+  @retval         EFI_INVALID_PARAMETER   CpuCacheInfo is NULL while CpuCacheInfoCount contains the value
+                                          greater than zero.
+  @retval         EFI_OUT_OF_RESOURCES    Required resources could not be allocated.
+  @retval         EFI_BUFFER_TOO_SMALL    CpuCacheInfoCount is too small to hold the response CpuCacheInfo
+                                          array. CpuCacheInfoCount has been updated with the length needed
+                                          to complete the request.
+**/
+EFI_STATUS
+EFIAPI
+GetCpuCacheInfo (
+  IN OUT CPU_CACHE_INFO     *CpuCacheInfo,
+  IN OUT UINTN              *CpuCacheInfoCount
+  )
+{
+  EFI_STATUS                Status;
+  UINT32                    NumberOfProcessor;
+  UINTN                     CpuidCacheDataCount;
+  COLLECT_CPUID_CACHE_DATA_CONTEXT  Context;
+
+  if (CpuCacheInfoCount == NULL) {
+    return EFI_INVALID_PARAMETER;
+
+  } else if (*CpuCacheInfoCount != 0 && CpuCacheInfo == NULL) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // Initialize COLLECT_CPUID_CACHE_DATA_CONTEXT.MpServices.
+  //
+  Context.MpServices = GetMpServices();
+
+  NumberOfProcessor = GetNumberOfProcessor (Context.MpServices);
+  DEBUG((DEBUG_ERROR, "[CacheInfoLib] NumberOfProcessor = 0x%x\n", NumberOfProcessor));
+
+  //
+  // Initialize COLLECT_CPUID_CACHE_DATA_CONTEXT.CpuidCacheData.
+  //
+  CpuidCacheDataCount = NumberOfProcessor * MAX_NUM_OF_CACHE_PARAMS_LEAF;
+  Context.CpuidCacheData = AllocatePages(EFI_SIZE_TO_PAGES(CpuidCacheDataCount * sizeof(*Context.CpuidCacheData)));
+  ASSERT(Context.CpuidCacheData != NULL);
+  if (Context.CpuidCacheData == NULL) {
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  ZeroMem(Context.CpuidCacheData, EFI_PAGES_TO_SIZE(EFI_SIZE_TO_PAGES(CpuidCacheDataCount * sizeof(*Context.CpuidCacheData))));
+
+  //
+  // Wakeup all processors for CpuidCacheData(core and cache data) collection.
+  //
+  CollectCoreAndCacheDataForAll (&Context);
+
+  //
+  // Collect CpuidCacheData(ProcessorLocation data) of all processors.
+  //
+  CollectProcessorLocationData (&Context, NumberOfProcessor);
+
+  //
+  // Collect CpuCacheInfo data from CpuidCacheData.
+  //
+  Status = CollectCpuCacheInfoData (Context.CpuidCacheData, CpuidCacheDataCount, CpuCacheInfo, CpuCacheInfoCount);
+  DEBUG((DEBUG_ERROR, "[CacheInfoLib] CollectCpuCacheInfoData: %r (CacheInfoCount = %d)\n", Status, *CpuCacheInfoCount));
+
+  FreePages(Context.CpuidCacheData, EFI_SIZE_TO_PAGES(CpuidCacheDataCount * sizeof(*Context.CpuidCacheData)));
+
+  return Status;
+}
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c b/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c
new file mode 100644
index 000000000000..4c85150e7750
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.c
@@ -0,0 +1,131 @@
+/** @file
+  Provides cache info for each package, core type, cache level and cache type.
+
+  Copyright (c) 2020 Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/CpuCacheInfoLib.h>
+#include <InternalCpuCacheInfoLib.h>
+
+/**
+  Collect core and cache information of calling processor via CPUID instructions.
+
+  @param[in] Buffer             The pointer to private data buffer.
+**/
+VOID
+CollectCoreAndCacheData (
+  IN OUT VOID               *Buffer
+  );
+
+/**
+  Get EFI_MP_SERVICES_PROTOCOL pointer.
+
+  @retval  Return MP_SERVICES structure.
+**/
+MP_SERVICES
+GetMpServices (
+  VOID
+  )
+{
+  EFI_STATUS                Status;
+  MP_SERVICES               MpServices;
+
+  Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&MpServices.Protocol);
+  ASSERT_EFI_ERROR (Status);
+
+  return MpServices;
+}
+
+/**
+  Collect core and cache information of all APs and BSP via CPUID instructions.
+
+  @param[in]  Context             The pointer to COLLECT_CPUID_CACHE_DATA_CONTEXT structure.
+**/
+VOID
+CollectCoreAndCacheDataForAll (
+  IN COLLECT_CPUID_CACHE_DATA_CONTEXT   *Context
+  )
+{
+  EFI_STATUS                Status;
+  MP_SERVICES               MpServices;
+
+  MpServices = Context->MpServices;
+
+  Status = MpServices.Protocol->StartupAllAPs (MpServices.Protocol, CollectCoreAndCacheData, TRUE, NULL, 0, Context, NULL);
+  ASSERT_EFI_ERROR(Status);
+
+  CollectCoreAndCacheData(Context);
+}
+
+/**
+  Get detailed information of the requested logical processor.
+
+  @param[in]  MpServices          MP_SERVICES structure.
+  @param[in]  ProcessorNum        The requested logical processor number.
+
+  @retval  Return EFI_PROCESSOR_INFORMATION structure of requested logical processors.
+**/
+EFI_PROCESSOR_INFORMATION
+GetCurrentProcessorInfo (
+  IN MP_SERVICES            MpServices,
+  IN UINTN                  ProcessorNum
+
+  )
+{
+  EFI_STATUS                Status;
+  EFI_PROCESSOR_INFORMATION ProcessorInfo;
+
+  Status = MpServices.Protocol->GetProcessorInfo (MpServices.Protocol, ProcessorNum, &ProcessorInfo);
+  ASSERT_EFI_ERROR(Status);
+
+  return ProcessorInfo;
+}
+
+/**
+  Get the logical processor number.
+
+  @param[in]  MpServices          MP_SERVICES structure.
+
+  @retval  Return the logical processor number.
+**/
+UINT32
+GetCurrentProcessorNum (
+  IN MP_SERVICES            MpServices
+  )
+{
+  EFI_STATUS                Status;
+  UINTN                     ProcessorNum;
+
+  Status = MpServices.Protocol->WhoAmI (MpServices.Protocol, &ProcessorNum);
+  ASSERT_EFI_ERROR(Status);
+
+  return (UINT32)ProcessorNum;
+}
+
+/**
+  Get the total number of logical processors in the platform.
+
+  @param[in]  MpServices          MP_SERVICES structure.
+
+  @retval  Return the total number of logical processors.
+**/
+UINT32
+GetNumberOfProcessor (
+  IN MP_SERVICES            MpServices
+  )
+{
+  EFI_STATUS                Status;
+  UINTN                     NumberOfProcessor;
+  UINTN                     NumberOfEnabledProcessor;
+
+  Status = MpServices.Protocol->GetNumberOfProcessors (MpServices.Protocol, &NumberOfProcessor, &NumberOfEnabledProcessor);
+  ASSERT_EFI_ERROR(Status);
+
+  return (UINT32)NumberOfProcessor;
+}
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c b/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c
new file mode 100644
index 000000000000..2d40b7086dc7
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.c
@@ -0,0 +1,130 @@
+/** @file
+  Provides cache info for each package, core type, cache level and cache type.
+
+  Copyright (c) 2020 Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/CpuCacheInfoLib.h>
+#include <InternalCpuCacheInfoLib.h>
+
+/**
+  Collect core and cache information of calling processor via CPUID instructions.
+
+  @param[in] Buffer             The pointer to private data buffer.
+**/
+VOID
+CollectCoreAndCacheData (
+  IN OUT VOID               *Buffer
+  );
+
+/**
+  Get EDKII_PEI_MP_SERVICES2_PPI pointer.
+
+  @retval  Return MP_SERVICES structure.
+**/
+MP_SERVICES
+GetMpServices (
+  VOID
+  )
+{
+  EFI_STATUS                Status;
+  MP_SERVICES               MpServices;
+
+  Status = PeiServicesLocatePpi (&gEdkiiPeiMpServices2PpiGuid, 0, NULL, (VOID **)&MpServices.Ppi);
+  ASSERT_EFI_ERROR (Status);
+
+  return MpServices;
+}
+
+/**
+  Collect core and cache information of all APs and BSP via CPUID instructions.
+
+  @param[in]  Context             The pointer to COLLECT_CPUID_CACHE_DATA_CONTEXT structure.
+**/
+VOID
+CollectCoreAndCacheDataForAll (
+  IN COLLECT_CPUID_CACHE_DATA_CONTEXT   *Context
+  )
+{
+  EFI_STATUS                Status;
+  MP_SERVICES               MpServices;
+
+  MpServices = Context->MpServices;
+
+  Status = MpServices.Ppi->StartupAllCPUs (MpServices.Ppi, CollectCoreAndCacheData, 0, Context);
+  ASSERT_EFI_ERROR(Status);
+}
+
+/**
+  Get detailed information of the requested logical processor.
+
+  @param[in]  MpServices          MP_SERVICES structure.
+  @param[in]  ProcessorNum        The requested logical processor number.
+
+  @retval  Return EFI_PROCESSOR_INFORMATION structure of requested logical processors.
+**/
+EFI_PROCESSOR_INFORMATION
+GetCurrentProcessorInfo (
+  IN MP_SERVICES            MpServices,
+  IN UINTN                  ProcessorNum
+
+  )
+{
+  EFI_STATUS                Status;
+  EFI_PROCESSOR_INFORMATION ProcessorInfo;
+
+  Status = MpServices.Ppi->GetProcessorInfo (MpServices.Ppi, ProcessorNum, &ProcessorInfo);
+  ASSERT_EFI_ERROR(Status);
+
+  return ProcessorInfo;
+}
+
+/**
+  Get the logical processor number.
+
+  @param[in]  MpServices          MP_SERVICES structure.
+
+  @retval  Return the logical processor number.
+**/
+UINT32
+GetCurrentProcessorNum (
+  IN MP_SERVICES            MpServices
+  )
+{
+  EFI_STATUS                Status;
+  UINTN                     ProcessorNum;
+
+  Status = MpServices.Ppi->WhoAmI (MpServices.Ppi, &ProcessorNum);
+  ASSERT_EFI_ERROR(Status);
+
+  return (UINT32)ProcessorNum;
+}
+
+/**
+  Get the total number of logical processors in the platform.
+
+  @param[in]  MpServices          MP_SERVICES structure.
+
+  @retval  Return the total number of logical processors.
+**/
+UINT32
+GetNumberOfProcessor (
+  IN MP_SERVICES            MpServices
+  )
+{
+  EFI_STATUS                Status;
+  UINTN                     NumberOfProcessor;
+  UINTN                     NumberOfEnabledProcessor;
+
+  Status = MpServices.Ppi->GetNumberOfProcessors (MpServices.Ppi, &NumberOfProcessor, &NumberOfEnabledProcessor);
+  ASSERT_EFI_ERROR(Status);
+
+  return (UINT32)NumberOfProcessor;
+}
diff --git a/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h
new file mode 100644
index 000000000000..475764f893d0
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h
@@ -0,0 +1,68 @@
+/** @file
+  Header file for CPU Cache info Library.
+
+  Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _CPU_CACHE_INFO_LIB_H_
+#define _CPU_CACHE_INFO_LIB_H_
+
+typedef struct {
+  //
+  // Package number.
+  //
+  UINT32        Package;
+  //
+  // Core type of logical processor.
+  // Value = CPUID(1A).Eax[31:24].Coretype
+  //
+  UINT8         CoreType;
+  //
+  // Level of the cache that this package's this type of logical processor corresponds to.
+  // Value = CPUID(04).Eax[07:05].CacheLevel
+  //
+  UINT8         CacheLevel : 3;
+  //
+  // Type of the cache that this package's this type of logical processor corresponds to.
+  // Value = CPUID(04).Eax[04:00].CacheTypeField
+  //
+  UINT8         CacheType : 5;
+  //
+  // Size of single cache that this package's this type of logical processor corresponds to.
+  // Value = (CPUID(04).Ebx[31:22].Ways + 1) * (CPUID(04).Ebx[21:12].Partitions + 1) * /
+  //         (CPUID(04).Ebx[11:00].LineSize + 1) * (CPUID(04).Ecx[31:00].Sets + 1)
+  //
+  UINT32        CacheSizeinKB;
+  //
+  // Number of the cache that this package's this type of logical processor corresponds to.
+  // Have subtracted the number of caches that are shared.
+  //
+  UINT16        CacheCount;
+} CPU_CACHE_INFO;
+
+/**
+  Get CpuCacheInfo data array.
+
+  @param[in, out] CpuCacheInfo        Pointer to the CpuCacheInfo array.
+  @param[in, out] CpuCacheInfoCount   As input, point to the length of response CpuCacheInfo array.
+                                      As output, point to the actual length of response CpuCacheInfo array.
+
+  @retval         EFI_SUCCESS             Function completed successfully.
+  @retval         EFI_INVALID_PARAMETER   CpuCacheInfoCount is NULL.
+  @retval         EFI_INVALID_PARAMETER   CpuCacheInfo is NULL while CpuCacheInfoCount contains the value
+                                          greater than zero.
+  @retval         EFI_OUT_OF_RESOURCES    Required resources could not be allocated.
+  @retval         EFI_BUFFER_TOO_SMALL    CpuCacheInfoCount is too small to hold the response CpuCacheInfo
+                                          array. CpuCacheInfoCount has been updated with the length needed
+                                          to complete the request.
+**/
+EFI_STATUS
+EFIAPI
+GetCpuCacheInfo (
+  IN OUT CPU_CACHE_INFO     *CpuCacheInfo,
+  IN OUT UINTN              *CpuCacheInfoCount
+  );
+
+#endif
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni
new file mode 100644
index 000000000000..1bc801f15f84
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.uni
@@ -0,0 +1,15 @@
+// /** @file
+// CPU Cache Info Library
+//
+// Provides cache info for each package, core type, cache level and cache type.
+//
+// Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT             #language en-US "CPU Cache Info Library"
+
+#string STR_MODULE_DESCRIPTION          #language en-US "Provides cache info for each package, core type, cache level and cache type."
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf b/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
new file mode 100644
index 000000000000..f509861a5f4c
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
@@ -0,0 +1,43 @@
+## @file
+#  CPU Cache Info Library instance for DXE driver.
+#
+#  Provides cache info for each package, core type, cache level and cache type.
+#
+#  Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = DxeCpuCacheInfoLib
+  FILE_GUID                      = B25C288F-C309-41F1-8325-37E64DC5EA3D
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = CpuCacheInfoLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER UEFI_APPLICATION UEFI_DRIVER
+  MODULE_UNI_FILE                = CpuCacheInfoLib.uni
+
+[Sources]
+  InternalCpuCacheInfoLib.h
+  CpuCacheInfoLib.c
+  DxeCpuCacheInfoLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  BaseMemoryLib
+  MemoryAllocationLib
+  UefiBootServicesTableLib
+
+[Protocols]
+  gEfiMpServiceProtocolGuid
+
+[Pcd]
+
+[Depex]
+  gEfiMpServiceProtocolGuid
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h b/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h
new file mode 100644
index 000000000000..934d5f2fa5a1
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h
@@ -0,0 +1,64 @@
+/** @file
+  Internal header file for CPU Cache info Library.
+
+  Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _INTERNAL_CPU_CACHE_INFO_LIB_H_
+#define _INTERNAL_CPU_CACHE_INFO_LIB_H_
+
+#include <PiPei.h>
+#include <Ppi/MpServices2.h>
+#include <Protocol/MpService.h>
+
+typedef struct {
+  //
+  // APIC ID.
+  //
+  UINT32                    ApicId;
+  //
+  // Processor location information.
+  // The information comes from MP Services.
+  //
+  EFI_CPU_PHYSICAL_LOCATION Location;
+  //
+  // Core type of logical processor.
+  // Value = CPUID(1A).Eax[31:24].Coretype
+  //
+  UINT8                     CoreType;
+  //
+  // Level of the cache.
+  // Value = CPUID(04).Eax[07:05].CacheLevel
+  //
+  UINT8                     CacheLevel : 3;
+  //
+  // Type of the cache.
+  // Value = CPUID(04).Eax[04:00].CacheTypeField
+  //
+  UINT8                     CacheType : 5;
+  //
+  // Cache share bits.
+  // Value = CPUID(04).Eax[25:14].MaximumAddressableIdsForLogicalProcessors
+  //
+  UINT16                    CacheShareBits;
+  //
+  // Size of single cache.
+  // Value = (CPUID(04).Ebx[31:22].Ways + 1) * (CPUID(04).Ebx[21:12].Partitions + 1) * /
+  //         (CPUID(04).Ebx[11:00].LineSize + 1) * (CPUID(04).Ecx[31:00].Sets + 1)
+  //
+  UINT32                    CacheSizeinKB;
+} CPUID_CACHE_DATA;
+
+typedef union {
+  EDKII_PEI_MP_SERVICES2_PPI    *Ppi;
+  EFI_MP_SERVICES_PROTOCOL      *Protocol;
+} MP_SERVICES;
+
+typedef struct {
+  MP_SERVICES               MpServices;
+  CPUID_CACHE_DATA          *CpuidCacheData;
+} COLLECT_CPUID_CACHE_DATA_CONTEXT;
+
+#endif
diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf b/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
new file mode 100644
index 000000000000..a84b50219e53
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
@@ -0,0 +1,43 @@
+## @file
+#  CPU Cache Info Library instance for PEI module.
+#
+#  Provides cache info for each package, core type, cache level and cache type.
+#
+#  Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PeiCpuCacheInfoLib
+  FILE_GUID                      = CFEE2DBE-53B2-4916-84CA-0BA83C3DDA6E
+  MODULE_TYPE                    = PEIM
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = CpuCacheInfoLib|PEI_CORE PEIM
+  MODULE_UNI_FILE                = CpuCacheInfoLib.uni
+
+[Sources]
+  InternalCpuCacheInfoLib.h
+  CpuCacheInfoLib.c
+  PeiCpuCacheInfoLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  BaseMemoryLib
+  MemoryAllocationLib
+  PeiServicesTablePointerLib
+
+[Ppis]
+  gEdkiiPeiMpServices2PpiGuid
+
+[Pcd]
+
+[Depex]
+  gEdkiiPeiMpServices2PpiGuid
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index d83c084467b3..a639ce5412e4 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -56,6 +56,9 @@ [LibraryClasses.IA32, LibraryClasses.X64]
   ##  @libraryclass  Provides function to support VMGEXIT processing.
   VmgExitLib|Include/Library/VmgExitLib.h
 
+  ##  @libraryclass  Provides function to get CPU cache information.
+  CpuCacheInfoLib|Include/Library/CpuCacheInfoLib.h
+
 [Guids]
   gUefiCpuPkgTokenSpaceGuid      = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
   gMsegSmramGuid                 = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index b2b6d78a71b0..5834eafaa200 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -75,6 +75,7 @@ [LibraryClasses.common.PEIM]
   LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf
   MpInitLib|UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
   RegisterCpuFeaturesLib|UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.inf
+  CpuCacheInfoLib|UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
 
 [LibraryClasses.IA32.PEIM, LibraryClasses.X64.PEIM]
   PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf
@@ -86,6 +87,7 @@ [LibraryClasses.common.DXE_DRIVER]
   CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
   MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
   RegisterCpuFeaturesLib|UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.inf
+  CpuCacheInfoLib|UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
 
 [LibraryClasses.common.DXE_SMM_DRIVER]
   SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
@@ -109,6 +111,8 @@ [Components]
   UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
   UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf
   UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf
+  UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
+  UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
 
 [Components.IA32, Components.X64]
   UefiCpuPkg/CpuDxe/CpuDxe.inf
-- 
2.28.0.windows.1


  reply	other threads:[~2020-11-19  2:38 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-19  2:36 [PATCH v1 1/2] MdePkg/Cpuid.h: Add CPUID_HYBRID_INFORMATION Leaf(0x1A) jasonlouyun
2020-11-19  2:36 ` jasonlouyun [this message]
2020-11-19  9:52   ` [PATCH v1 2/2] UefiCpuPkg/CpuCacheInfoLib: Add new CpuCacheInfoLib Laszlo Ersek
2020-11-20  5:06     ` Ni, Ray
2020-11-20 10:56       ` Laszlo Ersek
2020-12-01  7:57   ` Ni, Ray
2020-11-20  5:45 ` 回复: [PATCH v1 1/2] MdePkg/Cpuid.h: Add CPUID_HYBRID_INFORMATION Leaf(0x1A) gaoliming

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