* [platforms: PATCH v2] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description
@ 2020-11-20 3:11 Marcin Wojtas
2020-12-18 1:46 ` Marcin Wojtas
0 siblings, 1 reply; 3+ messages in thread
From: Marcin Wojtas @ 2020-11-20 3:11 UTC (permalink / raw)
To: devel; +Cc: leif, ard.biesheuvel, mw, jaz
This patch adds a new description of the board's SD/MMC
interfaces in DSDT table that can work with the newly
introduced support in Linux.
Remaining Armada7k8k / CN913x platforms will follow
after this binding is accepted.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Changelog:
v1->v2
* Drop 'compatible' property from MMC0 node
* Use dedicated _HID for each variant
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 59 ++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
index 7e9e361988..9e771afc98 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
@@ -86,6 +86,65 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
})
}
+ Device (MMC0)
+ {
+ Name (_HID, "MRVL0002") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0xF06E0000, // Address Base (MMIO)
+ 0x00000300, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 48
+ }
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "clock-frequency", 400000000 },
+ Package () { "bus-width", 8 },
+ Package () { "marvell,xenon-phy-slow-mode", 0x1 },
+ Package () { "no-1-8-v", 0x1 },
+ Package () { "no-sd", 0x1 },
+ Package () { "no-sdio", 0x1 },
+ Package () { "non-removable", 0x1 },
+ }
+ })
+ }
+
+ Device (MMC1)
+ {
+ Name (_HID, "MRVL0004") // _HID: Hardware ID
+ Name (_UID, 0x01) // _UID: Unique ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0xF2780000, // Address Base (MMIO)
+ 0x00000300, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ CP_GIC_SPI_CP0_SDMMC
+ }
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "clock-frequency", 400000000 },
+ Package () { "bus-width", 4 },
+ Package () { "broken-cd", 0x1 },
+ Package () { "no-1-8-v", 0x1 },
+ }
+ })
+ }
+
Device (XHC0)
{
Name (_HID, "PNP0D10") // _HID: Hardware ID
--
2.29.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [platforms: PATCH v2] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description
2020-11-20 3:11 [platforms: PATCH v2] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description Marcin Wojtas
@ 2020-12-18 1:46 ` Marcin Wojtas
2021-01-04 17:40 ` Ard Biesheuvel
0 siblings, 1 reply; 3+ messages in thread
From: Marcin Wojtas @ 2020-12-18 1:46 UTC (permalink / raw)
To: edk2-devel-groups-io; +Cc: Leif Lindholm, Ard Biesheuvel, Grzegorz Jaszczyk
Hi,
pt., 20 lis 2020 o 04:11 Marcin Wojtas <mw@semihalf.com> napisał(a):
>
> This patch adds a new description of the board's SD/MMC
> interfaces in DSDT table that can work with the newly
> introduced support in Linux.
> Remaining Armada7k8k / CN913x platforms will follow
> after this binding is accepted.
>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Changelog:
> v1->v2
> * Drop 'compatible' property from MMC0 node
> * Use dedicated _HID for each variant
>
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 59 ++++++++++++++++++++
> 1 file changed, 59 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> index 7e9e361988..9e771afc98 100644
> --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> @@ -86,6 +86,65 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> })
> }
>
> + Device (MMC0)
> + {
> + Name (_HID, "MRVL0002") // _HID: Hardware ID
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> + {
> + Memory32Fixed (ReadWrite,
> + 0xF06E0000, // Address Base (MMIO)
> + 0x00000300, // Address Length
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + 48
> + }
> + })
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "clock-frequency", 400000000 },
> + Package () { "bus-width", 8 },
> + Package () { "marvell,xenon-phy-slow-mode", 0x1 },
> + Package () { "no-1-8-v", 0x1 },
> + Package () { "no-sd", 0x1 },
> + Package () { "no-sdio", 0x1 },
> + Package () { "non-removable", 0x1 },
> + }
> + })
> + }
> +
> + Device (MMC1)
> + {
> + Name (_HID, "MRVL0004") // _HID: Hardware ID
> + Name (_UID, 0x01) // _UID: Unique ID
> + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> + {
> + Memory32Fixed (ReadWrite,
> + 0xF2780000, // Address Base (MMIO)
> + 0x00000300, // Address Length
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + CP_GIC_SPI_CP0_SDMMC
> + }
> + })
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "clock-frequency", 400000000 },
> + Package () { "bus-width", 4 },
> + Package () { "broken-cd", 0x1 },
> + Package () { "no-1-8-v", 0x1 },
> + }
> + })
> + }
> +
> Device (XHC0)
> {
> Name (_HID, "PNP0D10") // _HID: Hardware ID
> --
> 2.29.0
>
The Linux part got merged. Do you have any more comments/remarks to this patch?
Best regards,
Marcin
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [platforms: PATCH v2] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description
2020-12-18 1:46 ` Marcin Wojtas
@ 2021-01-04 17:40 ` Ard Biesheuvel
0 siblings, 0 replies; 3+ messages in thread
From: Ard Biesheuvel @ 2021-01-04 17:40 UTC (permalink / raw)
To: Marcin Wojtas, edk2-devel-groups-io; +Cc: Leif Lindholm, Grzegorz Jaszczyk
On 12/18/20 2:46 AM, Marcin Wojtas wrote:
> Hi,
>
> pt., 20 lis 2020 o 04:11 Marcin Wojtas <mw@semihalf.com> napisał(a):
>>
>> This patch adds a new description of the board's SD/MMC
>> interfaces in DSDT table that can work with the newly
>> introduced support in Linux.
>> Remaining Armada7k8k / CN913x platforms will follow
>> after this binding is accepted.
>>
>> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
>> ---
>> Changelog:
>> v1->v2
>> * Drop 'compatible' property from MMC0 node
>> * Use dedicated _HID for each variant
>>
>> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 59 ++++++++++++++++++++
>> 1 file changed, 59 insertions(+)
>>
>> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
>> index 7e9e361988..9e771afc98 100644
>> --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
>> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
>> @@ -86,6 +86,65 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
>> })
>> }
>>
>> + Device (MMC0)
>> + {
>> + Name (_HID, "MRVL0002") // _HID: Hardware ID
>> + Name (_UID, 0x00) // _UID: Unique ID
>> + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
>> +
>> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
>> + {
>> + Memory32Fixed (ReadWrite,
>> + 0xF06E0000, // Address Base (MMIO)
>> + 0x00000300, // Address Length
>> + )
>> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
>> + {
>> + 48
>> + }
>> + })
>> + Name (_DSD, Package () {
>> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
>> + Package () {
>> + Package () { "clock-frequency", 400000000 },
>> + Package () { "bus-width", 8 },
>> + Package () { "marvell,xenon-phy-slow-mode", 0x1 },
>> + Package () { "no-1-8-v", 0x1 },
>> + Package () { "no-sd", 0x1 },
>> + Package () { "no-sdio", 0x1 },
>> + Package () { "non-removable", 0x1 },
>> + }
>> + })
>> + }
>> +
>> + Device (MMC1)
>> + {
>> + Name (_HID, "MRVL0004") // _HID: Hardware ID
>> + Name (_UID, 0x01) // _UID: Unique ID
>> + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
>> +
>> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
>> + {
>> + Memory32Fixed (ReadWrite,
>> + 0xF2780000, // Address Base (MMIO)
>> + 0x00000300, // Address Length
>> + )
>> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
>> + {
>> + CP_GIC_SPI_CP0_SDMMC
>> + }
>> + })
>> + Name (_DSD, Package () {
>> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
>> + Package () {
>> + Package () { "clock-frequency", 400000000 },
>> + Package () { "bus-width", 4 },
>> + Package () { "broken-cd", 0x1 },
>> + Package () { "no-1-8-v", 0x1 },
>> + }
>> + })
>> + }
>> +
>> Device (XHC0)
>> {
>> Name (_HID, "PNP0D10") // _HID: Hardware ID
>> --
>> 2.29.0
>>
>
> The Linux part got merged. Do you have any more comments/remarks to this patch?
>
>
Thanks Marcin
Pushed as 794979b1ee14..862428aa3f5e
--
Ard.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-11-20 3:11 [platforms: PATCH v2] SolidRun/Armada80x0McBin: Introduce SD/MMC ACPI description Marcin Wojtas
2020-12-18 1:46 ` Marcin Wojtas
2021-01-04 17:40 ` Ard Biesheuvel
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