From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f65.google.com (mail-pj1-f65.google.com [209.85.216.65]) by mx.groups.io with SMTP id smtpd.web12.3075.1606782868636295854 for ; Mon, 30 Nov 2020 16:34:28 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=LbUor7WG; spf=pass (domain: nuviainc.com, ip: 209.85.216.65, mailfrom: rebecca@nuviainc.com) Received: by mail-pj1-f65.google.com with SMTP id r20so154915pjp.1 for ; Mon, 30 Nov 2020 16:34:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Z+1qAhfd7Lm05ya/KF25iwh8+L/nIjTka3bYRgymc/U=; b=LbUor7WGppvMQCrvO4VE+IKB8ZWlEHYKQKjf72zuCBDj77ZCuXKzOvSID9mpH+9sBe TOjxAiqkZkbFFnkMxMQlLit6GjPGBcknFcjXpt3GFFPKABDiQKwG9mqbc7KVVPtmMoKH Sj0+BkqfsCAYCFsxHGBtG6T93+PrSgpdG5yJvk4DziVhXZsYWzn31gterA3ZbRjO7sZl 8b9FDqoabw9pWFDTcVD4ov4t4whrOwosvEPHrxByrD/FZPpJyf4E9ebcUrmL1eA7bFAr gedeyf1jHbCmsqYXvOTtqfajEcKFtwWzfe2RUghSFXWfqfyEV7AIjSjRaiG88TIe5qfl nRCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Z+1qAhfd7Lm05ya/KF25iwh8+L/nIjTka3bYRgymc/U=; b=GNXXR3ETLkr57LFlnMBIhh1XuAbD6wEK0sJtdvBL0+GSbqS/awW7nIRekv6Xf9e8F3 EUk/MnK+dpmnWO4PpkPyIqBeNlPF+97mdFIilHjHXF6RILX4csf3pcuhpEgPprMXby2R 6bIZyaEJdng0sSu7lB42+rIxWx08DrBwT1eRskrS9SrhiexFBMcVuyo87MF+LNh7Q71a sMxwbsHvAR+nyREEbh5HqRdTGMut5Twpo3Efew6o9Bb9qMajPyULHRpsOugdIi3G8Zu1 G9/MDsl+zcQUBYJN6E7j4rwRaOMYmIEfYThlg0lxVSHsxRaurtEVVOx0/bUc4X/nY7Xk fxew== X-Gm-Message-State: AOAM5331FLUSsYxRhKiQYGKUyAddFX6QjJEYN+5rHqu0DAtpCI85RMlM npDqY+AL8lmvifwiI40AyN060LkMDur/pDl07yiDmPI+76HZ+cokIYVYX3AtTXl53R85SpJ+4XH ZhIACYY8QBCpy0ALf/GP+6F9mRF2OlqEBRyo/t1j0J7FtzK/S/EpjSiZnvcy9MaTpm9zI+GEz X-Google-Smtp-Source: ABdhPJxxQyeKyxXbpewSg8+ybFjZ23rB6siTmbtp64MjQKvBKcBlAPOVgKdLRApuMAuJC6AMWGt7Zw== X-Received: by 2002:a17:90a:62c3:: with SMTP id k3mr7889pjs.24.1606782867819; Mon, 30 Nov 2020 16:34:27 -0800 (PST) Return-Path: Received: from cube.nuviainc.com (c-174-52-16-57.hsd1.ut.comcast.net. [174.52.16.57]) by smtp.gmail.com with ESMTPSA id 22sm57899pjb.40.2020.11.30.16.34.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Nov 2020 16:34:27 -0800 (PST) From: "Rebecca Cran" To: devel@edk2.groups.io Cc: Rebecca Cran , Michael D Kinney , Liming Gao , Zhiguang Liu , Leif Lindholm , Ard Biesheuvel , Sami Mujawar Subject: [PATCH v4 03/11] ArmPkg: Add register encoding definition for MMFR2 Date: Mon, 30 Nov 2020 17:33:50 -0700 Message-Id: <20201201003358.8780-4-rebecca@nuviainc.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201201003358.8780-1-rebecca@nuviainc.com> References: <20201201003358.8780-1-rebecca@nuviainc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add register encoding definition for Memory Model Feature Register 2. We need to define it here because we build for ARMv8.0, which doesn't have it. Signed-off-by: Rebecca Cran --- ArmPkg/Include/Chipset/AArch64.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h index 0ade5cce91c3..7c2b592f92ee 100644 --- a/ArmPkg/Include/Chipset/AArch64.h +++ b/ArmPkg/Include/Chipset/AArch64.h @@ -112,6 +112,10 @@ #define ARM_VECTOR_LOW_A32_FIQ 0x700 #define ARM_VECTOR_LOW_A32_SERR 0x780 +// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we +// build for ARMv8.0, we need to define the register here. +#define ID_AA64MMFR2_EL1 S3_0_C0_C7_2 + #define VECTOR_BASE(tbl) \ .section .text.##tbl##,"ax"; \ .align 11; \ -- 2.26.2