From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by mx.groups.io with SMTP id smtpd.web08.8760.1607435989091574531 for ; Tue, 08 Dec 2020 05:59:49 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=DK8j9EXz; spf=pass (domain: nuviainc.com, ip: 209.85.221.68, mailfrom: leif@nuviainc.com) Received: by mail-wr1-f68.google.com with SMTP id l9so7192245wrt.13 for ; Tue, 08 Dec 2020 05:59:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=CPTciD/DRQQfrh5cyDKugkP4LVumErrRgHGjb+U2mnw=; b=DK8j9EXzuUIVMmVSd6e7ZakrLtSCYy0np9G/5Yw87RXntCqU3Pe3mC+tofYD4Bs9eE BQ2h0UWgF+txDPjhQjKGMiTE7wTBQUVuPXnHaFANQ4N9mtmlcWyP3vK2Ue0nqwd0eqpQ 6kr7BzNo4A8kW7SLRcXj+t0ghr83o6MOBmZacGPOp5PJ6Oyf0pQ15SLxXO3GLf7ygQ/7 DbQP7TDrlZHWUXwHke9EJ0fgy73UbsZxSh5i7qawHfLFLjPhABtBr0/NgcnMPxNyG1uK DIlrOhTBdUBHuRyvWMyZjRbcqo7rIfaVRlKSNqqxcxOsX2iRsUvEoSF3wqPfDHRf3wJw H/kw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=CPTciD/DRQQfrh5cyDKugkP4LVumErrRgHGjb+U2mnw=; b=ulHwt2XT8nTCTMls7aUKA7xJZciWjj6OMlsx2X7gPdPdNIwJcUCoFLEKnJ0c5Cbu1h C3Xec8Sx3VS3gIkEQEv4jH91P6SX1amudhSWvjNu2D2ibET0M5MQI9aMloI1X0eNFXS3 O4fHeHGKqZo8WsTrIIbZcJUIjAgjt5Pnn/CZ9UQ/P+LHBPyQJ24ideK2r+F2TIAGm8gk OEW43oTYmlWQb/U+jao8vSCNf9bKbj/blmYjShIJEvIMMfkZXmdcVowWvhJIBaUdnAyt U/Av9ZheRZzwUo2/4yikfeWAXvikt6XMlGq3KxRPhy7f4c2PQKuA/yU0GLH4kpCV6bA3 mlng== X-Gm-Message-State: AOAM531tO0sqnvBc74zUhv8xHr/0yn8tFH+/Ai1dSQ9gLJNIYWiYRZnW SEl0YU24pQBgJFRoTecCl+D9Glr4geMoE/wJQCc1b9Ut3Q43gx0w0AJfYsu2yDX9yNrkPyuiHK6 NmEZ0Klncwg9mqlAFJZYSzpQRstwoegjP7y2pd0VtjbOSRGq7fid65JPXDsICc5Vqqw== X-Google-Smtp-Source: ABdhPJxxxjKcI28RTy9O/KCV2uYaV5Zvowk9uoXeE7uV2TrJMPngxt+gK6H1Xb50VtuJNE6HIVU+jw== X-Received: by 2002:a5d:4b4c:: with SMTP id w12mr986484wrs.402.1607435987395; Tue, 08 Dec 2020 05:59:47 -0800 (PST) Return-Path: Received: from vanye (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id o17sm11325551wrg.32.2020.12.08.05.59.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Dec 2020 05:59:46 -0800 (PST) Date: Tue, 8 Dec 2020 13:59:45 +0000 From: "Leif Lindholm" To: devel@edk2.groups.io, xiewenyi2@huawei.com Cc: ard.biesheuvel@arm.com, songdongkuang@huawei.com Subject: Re: [edk2-devel] [PATCH EDK2 v1 1/1] ArmPkg/ArmDisassemblerLib: fix incorrect comparison Message-ID: <20201208135945.GK1664@vanye> References: <1607432869-13641-1-git-send-email-xiewenyi2@huawei.com> <1607432869-13641-2-git-send-email-xiewenyi2@huawei.com> MIME-Version: 1.0 In-Reply-To: <1607432869-13641-2-git-send-email-xiewenyi2@huawei.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Dec 08, 2020 at 21:07:49 +0800, wenyi,xie via groups.io wrote: > As shift = (OpCode >> 5) & 0x3, shift will never be larger than 0x3, > so the comparison between shift and 0x12 will always be false. The right > shift type of ASR is 0x2. Whoops[tm]. > Cc: Leif Lindholm > Cc: Ard Biesheuvel > Signed-off-by: Wenyi Xie Reviewed-by: Leif Lindholm Pushed as 8e4cb8fbceb8. Thanks! > --- > ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c > index b4f0f8dbbfc9..d206cf4ea908 100644 > --- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c > +++ b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c > @@ -240,7 +240,7 @@ DisassembleArmInstruction ( > if (shift_imm == 0) { > shift_imm = 32; > } > - } else if (shift == 0x12) { > + } else if (shift == 0x2) { > Type = "ASR"; > } else if (shift_imm == 0) { > AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W)); > @@ -270,7 +270,7 @@ DisassembleArmInstruction ( > if (shift_imm == 0) { > shift_imm = 32; > } > - } else if (shift == 0x12) { > + } else if (shift == 0x2) { > Type = "ASR"; > } else if (shift_imm == 0) { > AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (U), gReg[Rm]); > -- > 2.20.1.windows.1 > > > > > >