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dkim=none (message not signed) header.d=none;edk2.groups.io; dmarc=none action=none header.from=os.amperecomputing.com; Received: from MW2PR0102MB3482.prod.exchangelabs.com (2603:10b6:302:c::32) by MW4PR01MB6321.prod.exchangelabs.com (2603:10b6:303:7b::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3654.24; Wed, 16 Dec 2020 13:25:49 +0000 Received: from MW2PR0102MB3482.prod.exchangelabs.com ([fe80::e903:700a:f17:7a17]) by MW2PR0102MB3482.prod.exchangelabs.com ([fe80::e903:700a:f17:7a17%7]) with mapi id 15.20.3654.020; Wed, 16 Dec 2020 13:25:49 +0000 From: "Quan Nguyen" To: devel@edk2.groups.io CC: Leif Lindholm , Ard Biesheuvel , Victor Gallardo , Open Source Submission , Quan Nguyen Subject: [PATCH v2 0/2] ArmPkg/ArmGicV3Dxe: fix writes to GICD_IPRIORITYR when ARE enable Date: Wed, 16 Dec 2020 20:25:19 +0700 Message-ID: <20201216132521.5915-1-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 X-Originating-IP: [118.69.219.201] X-ClientProxiedBy: HK2PR02CA0140.apcprd02.prod.outlook.com (2603:1096:202:16::24) To MW2PR0102MB3482.prod.exchangelabs.com (2603:10b6:302:c::32) Return-Path: quan@os.amperecomputing.com MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from hcm-sw-17.amperecomputing.com (118.69.219.201) by HK2PR02CA0140.apcprd02.prod.outlook.com (2603:1096:202:16::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3654.12 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?us-ascii?Q?UnfjA4/rjrkk6Jqarmfhh2bBLSQme4tVdDuElLJWRsiC5HANVgs+cq4glIvq?= =?us-ascii?Q?GUpiiSil7xK7JVs2eXx0yRDZxrVMqytQWj/G+y9ZUDGrt6wpgGDGIjtMk//V?= =?us-ascii?Q?Xf3f1HclVpeY6Lu52FPZQCeWgMHV/y1Yoa+8B53GFTp8m4jm9UiEFfEJ6+AT?= =?us-ascii?Q?D1J5gVYEFx0ab8ynjAoLE5qLdfgOI7g5EvK7owoPpqtvzdv66aqFvSszn46V?= =?us-ascii?Q?6AxGJUDmUByPLeoS+BNS5MeUqM7G3GAphasqhc97DpSaj6c6QL3aF4yelJpj?= =?us-ascii?Q?bbSpJPruvifF3VgTlo0BYF0+RyFLkO2b1l2A0u+y7I4WKUmsNR/ec8Z1JzDH?= =?us-ascii?Q?ONB5Npu6lL/QH3TJjiv533lRvMPonX4+c6aSmjG1sJ4gJ0M9VwAcG83l2563?= =?us-ascii?Q?0bluppJFO+5rAhMj26fX4yloWXbHCWxYos21PbSxu9kF+R/MHnjED4cU32CB?= =?us-ascii?Q?Tm/lAnuYaKh9zq/ZHU5v5lF1GCDMUDK75+Q00yCwy2rHWmsFL1dwFaJUw+h1?= =?us-ascii?Q?U7faeCkxG2uAKFW9NW1EHddKU43hQS6hLWcAAG/UTb1COBbBxFIr6LcAUXLL?= =?us-ascii?Q?A9WTWND82lSndX2u+9bpKCiwya32Fql6rIDN44/VQh6Vl1bMTWSYupCOJZn5?= =?us-ascii?Q?AHKvoEbz+h+BGQIU1lWhAxQdgNG5Dd9I3/clzuR+r3qOZZ8fqdsCbLbLuUXK?= =?us-ascii?Q?SlTIWTqJmUVqznxpWXb3RFA3LjqYJr9PVQXbh89WXgYNPkAWujF1go59fdJX?= =?us-ascii?Q?mc84EPYsLUx5ALEOaSEdtaGZfMZMMom5Vpix1fvwWlKyxnQWJv57ZD2ITrPy?= =?us-ascii?Q?FfQPjRDMtbPFgSxDHw9/K6gq5eB2Xm00ChRc48bezyyz+wV93meTYILh4ife?= =?us-ascii?Q?0br9ORkb0vtUIkTUpzvxC+ttlubvhMgwr+9w6Wc5qRqECtXlWHwQcwnRmEUP?= =?us-ascii?Q?U0yALDoOmb/+EjhO49uObaCRLtYseFxjxxipHFLejPs=3D?= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-AuthSource: MW2PR0102MB3482.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Dec 2020 13:25:48.9637 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-Network-Message-Id: e9d27105-5b24-4ce1-8d55-08d8a1c61a69 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: qRiQFvHOzHBItnI7KbCHQRgUHXv4Kev42Tz8n5V6/rBdRXNjok/s7djmpizhm6HHE1T3bMblTsgvo7yGXUeP4vUfllfWqFk7j4fLhDM7XWQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR01MB6321 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain According to ARM IHI 0069F, section 11.9.18 GICD_IPRIORITYR, Interrupt Priority Registers, n =3D 0 - 254, when affinity routing is enabled for the Security state of an interrupt, GICR_IPRIORITYR is used instead of GICD_IPRIORITYR where n =3D 0 to 7 (that is, for SGIs and PPIs). Current ArmGicV3Dxe tries to initialize all GICD_IPRIORITYR to a default state, so it should write to GICR_IPRIORITYR registers when Affinity Routing is Enabled. v2: - Update Ard's comment on stack variable and FeaturePcdGet [Ard] - Introduce new helper function to handle register discrepancy [Quan] - Set priority using new helper function [Quan] Quan Nguyen (2): ArmPkg/ArmGicLib: Add ArmGicSetInterruptPriority() helper function ArmPkg/ArmGicV3Dxe: Use ArmGicSetInterruptPriority() to set priority ArmPkg/Drivers/ArmGic/ArmGicLib.c | 44 +++++++++++++++++++++++ ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c | 13 +++---- ArmPkg/Include/Library/ArmGicLib.h | 9 +++++ 3 files changed, 58 insertions(+), 8 deletions(-) --=20 2.28.0