From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.10391.1608300477878132645 for ; Fri, 18 Dec 2020 06:07:58 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: aditya.angadi@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8F3501FB; Fri, 18 Dec 2020 06:07:57 -0800 (PST) Received: from usa.arm.com (a073440-lin.blr.arm.com [10.162.16.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 568B83F66B; Fri, 18 Dec 2020 06:07:55 -0800 (PST) From: "Aditya Angadi" To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Sami Mujawar , Thomas Abraham , Vijayenthiran Subramaniam , Aditya Angadi Subject: [PATCH][edk2-platforms 4/5] Platform/ARM/SgiPkg: Add ACPI tables for RD-N2 platform Date: Fri, 18 Dec 2020 19:37:25 +0530 Message-Id: <20201218140726.23670-5-aditya.angadi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201218140726.23670-1-aditya.angadi@arm.com> References: <20201218140726.23670-1-aditya.angadi@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Add Madt and Dsdt ACPI tables that are specific for RD-N2 platform. Reuse the rest of the shared ACPI tables in SgiPkg. Signed-off-by: Aditya Angadi --- Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl | 112 ++++++++++++++++ Platform/ARM/SgiPkg/AcpiTables/RdN2/Madt.aslc | 137 ++++++++++++++++= ++++ Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 60 +++++++++ 3 files changed, 309 insertions(+) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl b/Platform/ARM/= SgiPkg/AcpiTables/RdN2/Dsdt.asl new file mode 100644 index 000000000000..8688fd8d6b90 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl @@ -0,0 +1,112 @@ +/** @file +* Differentiated System Description Table Fields (DSDT) +* +* Copyright (c) 2020, Arm Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI", + EFI_ACPI_ARM_OEM_REVISION) { + Scope (_SB) { + Device (CP00) { // Neoverse N2 core 0 + Name (_HID, "ACPI0007") + Name (_UID, 0) + Name (_STA, 0xF) + } + + Device (CP01) { // Neoverse N2 core 1 + Name (_HID, "ACPI0007") + Name (_UID, 1) + Name (_STA, 0xF) + } + + Device (CP02) { // Neoverse N2 core 2 + Name (_HID, "ACPI0007") + Name (_UID, 2) + Name (_STA, 0xF) + } + + Device (CP03) { // Neoverse N2 core 3 + Name (_HID, "ACPI0007") + Name (_UID, 3) + Name (_STA, 0xF) + } + + Device (CP04) { // Neoverse N2 core 4 + Name (_HID, "ACPI0007") + Name (_UID, 4) + Name (_STA, 0xF) + } + + Device (CP05) { // Neoverse N2 core 5 + Name (_HID, "ACPI0007") + Name (_UID, 5) + Name (_STA, 0xF) + } + + Device (CP06) { // Neoverse N2 core 6 + Name (_HID, "ACPI0007") + Name (_UID, 6) + Name (_STA, 0xF) + } + + Device (CP07) { // Neoverse N2 core 7 + Name (_HID, "ACPI0007") + Name (_UID, 7) + Name (_STA, 0xF) + } + + Device (CP08) { // Neoverse N2 core 8 + Name (_HID, "ACPI0007") + Name (_UID, 8) + Name (_STA, 0xF) + } + + Device (CP09) { // Neoverse N2 core 9 + Name (_HID, "ACPI0007") + Name (_UID, 9) + Name (_STA, 0xF) + } + + Device (CP10) { // Neoverse N2 core 10 + Name (_HID, "ACPI0007") + Name (_UID, 10) + Name (_STA, 0xF) + } + + Device (CP11) { // Neoverse N2 core 11 + Name (_HID, "ACPI0007") + Name (_UID, 11) + Name (_STA, 0xF) + } + + Device (CP12) { // Neoverse N2 core 12 + Name (_HID, "ACPI0007") + Name (_UID, 12) + Name (_STA, 0xF) + } + + Device (CP13) { // Neoverse N2 core 13 + Name (_HID, "ACPI0007") + Name (_UID, 13) + Name (_STA, 0xF) + } + + Device (CP14) { // Neoverse N2 core 14 + Name (_HID, "ACPI0007") + Name (_UID, 14) + Name (_STA, 0xF) + } + + Device (CP15) { // Neoverse N2 core 15 + Name (_HID, "ACPI0007") + Name (_UID, 15) + Name (_STA, 0xF) + } + } // Scope(_SB) +} diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Madt.aslc b/Platform/ARM= /SgiPkg/AcpiTables/RdN2/Madt.aslc new file mode 100644 index 000000000000..dbb23683113a --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Madt.aslc @@ -0,0 +1,137 @@ +/** @file +* Multiple APIC Description Table (MADT) +* +* Copyright (c) 2020, Arm Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" +#include +#include +#include +#include + +#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \ + FixedPcdGet32 (PcdCoreCount)) + +// Multiple APIC Description Table +#pragma pack (1) + +typedef struct { + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; + EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CO= RE_CNT]; + EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; + EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor= ; + EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicIts[6]; +} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE; + +#pragma pack () + +STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt =3D { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE, + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION + ), + // MADT specific fields + 0, // LocalApicAddress + 0 // Flags + }, + { + // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr= , Flags, + // PmuIrq, GicBase, GicVBas= e, + // GicHBase, GsivId, GicRBa= se, + // Efficiency) + // Note: The GIC Structure of the primary CPU must be the first entr= y + // (see note in 5.2.12.14 GICC Structure of ACPI v6.2). + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core0 + 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core1 + 0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core2 + 0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core3 + 0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core4 + 0, 4, GET_MPID(0x400, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core5 + 0, 5, GET_MPID(0x500, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core6 + 0, 6, GET_MPID(0x600, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core7 + 0, 7, GET_MPID(0x700, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core8 + 0, 8, GET_MPID(0x800, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core9 + 0, 9, GET_MPID(0x900, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core10 + 0, 10, GET_MPID(0xa00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core11 + 0, 11, GET_MPID(0xb00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core12 + 0, 12, GET_MPID(0xc00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core13 + 0, 13, GET_MPID(0xd00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core14 + 0, 14, GET_MPID(0xe00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core15 + 0, 15, GET_MPID(0xf00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, + FixedPcdGet32 (PcdGicDistributorBase), + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), + }, + // GIC Distributor Entry + EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorB= ase), + 0, 3), + // GIC Redistributor + EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributor= sBase), + SIZE_16MB), + // GIC ITS + { + EFI_ACPI_6_2_GIC_ITS_INIT(0, 0x30040000), + EFI_ACPI_6_2_GIC_ITS_INIT(1, 0x30080000), + EFI_ACPI_6_2_GIC_ITS_INIT(2, 0x300C0000), + EFI_ACPI_6_2_GIC_ITS_INIT(3, 0x30100000), + EFI_ACPI_6_2_GIC_ITS_INIT(4, 0x30140000), + EFI_ACPI_6_2_GIC_ITS_INIT(5, 0x30180000), + }, +}; + +// +// Reference the table being generated to prevent the optimizer from rem= oving +// the data structure from the executable +// +VOID* CONST ReferenceAcpiTable =3D &Madt; diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf b/Platform= /ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf new file mode 100644 index 000000000000..63fc249bb77b --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf @@ -0,0 +1,60 @@ +## @file +# ACPI table data and ASL sources required to boot the platform. +# +# Copyright (c) 2020, Arm Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D RdN2AcpiTables + FILE_GUID =3D c712719a-0aaf-438c-9cdd-35ab4d60207= d # gArmSgiAcpiTablesGuid + MODULE_TYPE =3D USER_DEFINED + VERSION_STRING =3D 1.0 + +[Sources] + Dbg2.aslc + Fadt.aslc + Gtdt.aslc + Iort.aslc + Mcfg.aslc + RdN2/Dsdt.asl + RdN2/Madt.aslc + Spcr.aslc + Ssdt.asl + SsdtRos.asl + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + Platform/ARM/SgiPkg/SgiPlatform.dec + +[FixedPcd] + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase + gArmPlatformTokenSpaceGuid.PL011UartInterrupt + gArmPlatformTokenSpaceGuid.PcdCoreCount + gArmPlatformTokenSpaceGuid.PcdClusterCount + + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase + gArmTokenSpaceGuid.PcdPciBusMin + gArmTokenSpaceGuid.PcdPciBusMax + + gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress + gArmSgiTokenSpaceGuid.PcdVirtioBlkSize + gArmSgiTokenSpaceGuid.PcdVirtioBlkInterrupt + gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress + gArmSgiTokenSpaceGuid.PcdVirtioNetSize + gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt + + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress --=20 2.17.1