From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) by mx.groups.io with SMTP id smtpd.web11.10539.1608300981232356330 for ; Fri, 18 Dec 2020 06:16:21 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=pvLhrR6Q; spf=pass (domain: nuviainc.com, ip: 209.85.221.52, mailfrom: leif@nuviainc.com) Received: by mail-wr1-f52.google.com with SMTP id 91so2335062wrj.7 for ; Fri, 18 Dec 2020 06:16:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1IEZoQWlRQiJ3uphu35bIAzvNZ1NaR63O010r2dd7Kk=; b=pvLhrR6QWKNTTsQNBLWiy9MWIXx4Edhpgmnb/0Iwuw6KVzZA0iZ1SVDAx33saDKdov Wx5C6d7sCMnKByn+/avCRf6ZJ0lT9Cs/ZaLJgcVxN//lqt/Va+Ta/c6b1kjYmygHmQ9/ jZ8BwRvAEmUL4XAXM77vKE8NFveGbetcMOgwq2tLQ8DUTJLxRFnCbvuGmbXYAD57wSfG G23Xfwn+8vIVrSFg/DyHBDbPNYMnUg8HBVpr8S0WtDCWJRgUOxdzaCG+0QQavFA2CAKR pksXYL7jZ8OzqLuPStTkqu4kpsbHZD42pKDcQpwzYeSfZX9QtTnQpkcjvfNqXanEXVoh unZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1IEZoQWlRQiJ3uphu35bIAzvNZ1NaR63O010r2dd7Kk=; b=sm/eqaFkRYEsIe/wzqcBlRI3/EfecIEwIvkGBCsIa+/JBB0WVTjWhszb197R6sLW07 LRd0XTdt6Q9TPSI5lflacPlD8z3HYxwgAn6+gGHqMdJ1t2GGFRn48dvmuzWJ9zqfVmW4 wC41TpS46+e2gmBY+qIeGJY3cDyu3q3PCHSRxVzDsSjb49M4HgqF+XJNWalZ9rPxIFaG znpnzf0Uladvcb2DMiEqzK1beHhkKPPFAutc0aZUs4kQnkWE4boxNay5WA6cdfhhMcDo CvvkgVn/Vny3QiBer1x5EV5JFYrwHkJq7n44sq+ZuCrdGONAERzkJcE/8nsyl9CUc2uh JrkA== X-Gm-Message-State: AOAM530iyk74B3Wirgs3D2RR6t3+fC5JFcjNI94WeS1e1Si3BFIWIm9f f0BahMqy1Yod4Lyo/R3dYDuFxVxsmWRWsEgRuHna61mThgFuc21Ova4nr7TcWUDUCCLjT+eK6FJ qfNPwNAKerBz5stV+xzreQVGWShbZgFjS1NZpQTgKfmXALEDMM4cKdZcGxqpXjm4L/A== X-Google-Smtp-Source: ABdhPJym+4cZCQTw81pAWmwUmrLykEy9Nhnfcxyc4wU6RCS16XscGk92Dq6adhc9QLR+5o75SGQJtQ== X-Received: by 2002:a5d:5049:: with SMTP id h9mr4954342wrt.404.1608300979527; Fri, 18 Dec 2020 06:16:19 -0800 (PST) Return-Path: Received: from vanye.hemma.eciton.net (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id b12sm18558569wmj.2.2020.12.18.06.16.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Dec 2020 06:16:18 -0800 (PST) From: "Leif Lindholm" To: devel@edk2.groups.io Cc: Ard Biesheuvel Subject: [PATCH 1/9] ArmPkg/ArmLib: add ArmHasGicSystemRegisters () helper function Date: Fri, 18 Dec 2020 14:16:09 +0000 Message-Id: <20201218141617.26947-2-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201218141617.26947-1-leif@nuviainc.com> References: <20201218141617.26947-1-leif@nuviainc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Create a helper function to eliminate direct feature register reading, which gets messy in code shared between ARM/AArch64. Returns BOOLEAN True if the CPU implements the GIC System Register Interface (any version), otherwise returns BOOL False. Cc: Ard Biesheuvel Signed-off-by: Leif Lindholm --- ArmPkg/Include/Library/ArmLib.h | 18 ++++++++++++++++++ ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 16 ++++++++++++++++ ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c | 16 ++++++++++++++++ 3 files changed, 50 insertions(+) diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index 5a27b7c2fc27..8a364f2ca96f 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -2,6 +2,7 @@ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.
+ Copyright (c) 2020, NUVIA Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -715,4 +716,21 @@ ArmGetPhysicalAddressBits ( VOID ); + +/// +/// ID Register Helper functions +/// + +/** + Check whether the CPU supports the GIC system register interface (any version) + + @return Whether GIC System Register Interface is supported + +**/ +BOOLEAN +EFIAPI +ArmHasGicSystemRegisters ( + VOID + ); + #endif // __ARM_LIB__ diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c index 3fbd591192e2..5b10eb33c97d 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c @@ -2,6 +2,7 @@ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
+ Copyright (c) 2020, NUVIA Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -71,3 +72,18 @@ ArmCleanDataCache ( ArmDataSynchronizationBarrier (); AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay); } + +/** + Check whether the CPU supports the GIC system register interface (any version) + + @return Whether GIC System Register Interface is supported + +**/ +BOOLEAN +EFIAPI +ArmHasGicSystemRegisters ( + VOID + ) +{ + return ((ArmReadIdPfr0 () & AARCH64_PFR0_GIC) != 0); +} diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c index 2c4a23e1a1b2..3faada3a6539 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c +++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c @@ -2,6 +2,7 @@ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
Copyright (c) 2011 - 2014, ARM Limited. All rights reserved. + Copyright (c) 2020, NUVIA Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -71,3 +72,18 @@ ArmCleanDataCache ( ArmDataSynchronizationBarrier (); ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay); } + +/** + Check whether the CPU supports the GIC system register interface (any version) + + @return Whether GIC System Register Interface is supported + +**/ +BOOLEAN +EFIAPI +ArmHasGicSystemRegisters ( + VOID + ) +{ + return ((ArmReadIdPfr1 () & ARM_PFR1_GIC) != 0); +} -- 2.20.1