From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) by mx.groups.io with SMTP id smtpd.web11.10547.1608300991999635796 for ; Fri, 18 Dec 2020 06:16:32 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=djr0tjk+; spf=pass (domain: nuviainc.com, ip: 209.85.128.43, mailfrom: leif@nuviainc.com) Received: by mail-wm1-f43.google.com with SMTP id q75so2748813wme.2 for ; Fri, 18 Dec 2020 06:16:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wtvmsbtxXN+0uIuEjEtEktaFcb2WsYONChMmuTlzSog=; b=djr0tjk+az7n1gD6BACZsVdoDoIv9SuOq4F//9lJw0z1n0xPRoQmvJoKZtvmEIw4En XHYIlQUQDbr0i0K5jvfVQrrX8XK77LmcQexRxjH9DYY4ZsLZqnnLU3rC60xo6rCmRWlN 3mRG7tVUeanUVvLZLTQZ6XchOz1oj85gFJrsIuP0C3cGsFNYJYHPG9r4QWirzb51sibg xZDNhK0rkBAMWFDoq/bJDC29YxDq29c+CtlPm7L1nEbTtdP+0inZVDanEC/HzitfuGPN Q+Kn4p7ZVzo4DBxPsuSYhNQLdtWjb/xG/J7rwdf1KH+oV+fY0DRx/ydP8WjzrFaTZSQN hOHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wtvmsbtxXN+0uIuEjEtEktaFcb2WsYONChMmuTlzSog=; b=eEcmetz1hzIoWlfA3Xv3pUdoOsUSHulDdw65N6p3iLNiP3P9zBv3a9gIdb9GDs0Y+9 I3sCkGgrsNMb2ynwuKuOspUNC2cjgjbhMGEr1HKe1NY3Umvv4cFv8d+UBMFku9CU2UQE mqq7I2zq+Wf7Y2Ph4OLqDf7KGfoGNuGsEahCFHWGXM6tyLYcUQyUp4CASoMBTGXlg9PL jlmItuisa0UFRdxaMNcAiQPoV2NRwEDzZbL5zQRu6gLzomz4Vl/7EjP5U/THMOpMBL30 YCY18D40bRvtpVIETDzojlH435CEO4vEqACx6zzu+jKD+DGcLhiX/m10gAzpzeCQFe78 P6tg== X-Gm-Message-State: AOAM532UTEUBxl1u4mkDzL84FktIBUnt33N0TUXKARugKj2XYLL9caJy NMCPRu7UOlqsLiF1iOLs4AraFK2eCDgYdOrDxVzx6y7Rg/yHC81x8DeTFnn2G7GZdwsakhYrd5T KMRTCTU81rmUM8tFQfxU6FaPh+UkoQ6GtBc7WcMflGEnRHXVM862zhAbwDnY/B2iWJg== X-Google-Smtp-Source: ABdhPJz+DOvMebdAfKr96FaaO5AGdWeDR5nD/RqykhBhsLEWm0I8KVpoYe+/lQLjbhOPtI1EmTtf7w== X-Received: by 2002:a7b:c4d5:: with SMTP id g21mr4497851wmk.92.1608300985242; Fri, 18 Dec 2020 06:16:25 -0800 (PST) Return-Path: Received: from vanye.hemma.eciton.net (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id b12sm18558569wmj.2.2020.12.18.06.16.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Dec 2020 06:16:24 -0800 (PST) From: "Leif Lindholm" To: devel@edk2.groups.io Cc: Ard Biesheuvel Subject: [PATCH 8/9] ArmPkg/ArmLib: rename AArch64 variant of ArmReadIdPfr0 Date: Fri, 18 Dec 2020 14:16:16 +0000 Message-Id: <20201218141617.26947-9-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201218141617.26947-1-leif@nuviainc.com> References: <20201218141617.26947-1-leif@nuviainc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit ArmReadIdPfr0 is now used only inside ArmLib. Rename the AArch64 variant ArmReadIdAA64Pfr0 and add a declaration of that only into local header AArch64/AArch64Lib.h. Cc: Ard Biesheuvel Signed-off-by: Leif Lindholm --- ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 6 ++++++ ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 2 +- ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 5 +++-- 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h index b2c8a8ea0b84..85bcecda730f 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h @@ -2,6 +2,7 @@ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
+ Copyright (c) 2020, NUVIA Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -35,5 +36,10 @@ ArmCleanInvalidateDataCacheEntryBySetWay ( IN UINTN SetWayFormat ); +UINTN +EFIAPI +ArmReadIdAA64Pfr0 ( + VOID + ); #endif // __AARCH64_LIB_H__ diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c index 5b10eb33c97d..53e593bc994b 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c @@ -85,5 +85,5 @@ ArmHasGicSystemRegisters ( VOID ) { - return ((ArmReadIdPfr0 () & AARCH64_PFR0_GIC) != 0); + return ((ArmReadIdAA64Pfr0 () & AARCH64_PFR0_GIC) != 0); } diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S index 7f942c29ea66..129205d2ac27 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -3,6 +3,7 @@ # Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved. # Copyright (c) 2016, Linaro Limited. All rights reserved. +# Copyright (c) 2020, NUVIA Inc. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -395,7 +396,7 @@ ASM_FUNC(ArmReadVBar) ASM_FUNC(ArmEnableVFP) // Check whether floating-point is implemented in the processor. mov x1, x30 // Save LR - bl ArmReadIdPfr0 // Read EL1 Processor Feature Register (PFR0) + bl ArmReadIdAA64Pfr0 // Read EL1 Processor Feature Register (PFR0) mov x30, x1 // Restore LR ubfx x0, x0, #16, #4 // Extract the FP bits 16:19 cmp x0, #0xF // Check if FP bits are '1111b', @@ -448,7 +449,7 @@ ASM_FUNC(ArmIsArchTimerImplemented) ret -ASM_FUNC(ArmReadIdPfr0) +ASM_FUNC(ArmReadIdAA64Pfr0) mrs x0, id_aa64pfr0_el1 // Read ID_AA64PFR0 Register ret -- 2.20.1