From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web09.28517.1608492163924026895 for ; Sun, 20 Dec 2020 11:22:44 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: samer.el-haj-mahmoud@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7CD9C1FB; Sun, 20 Dec 2020 11:22:43 -0800 (PST) Received: from U203705.Arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 499DE3F66E; Sun, 20 Dec 2020 11:22:43 -0800 (PST) From: "Samer El-Haj-Mahmoud" To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel Subject: [edk2-platform][PATCH v1 1/1] ArmPlatformPkg/PL011UartLib : Fix SetControl() SCT conformance Date: Sun, 20 Dec 2020 14:22:38 -0500 Message-Id: <20201220192238.26365-1-Samer.El-Haj-Mahmoud@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable REF: https://github.com/pftf/RPi4/issues/87 The PL011UartLib SetControl() is failing the SCT test for SerialIoBBTestConformance (00605CBC-3965-4B61-A254-2B2B723172EA), which is trying to set bits that are not supported per UEFI spec. Add proper argument check for valid bits, and confirm that test passes. Cc: Leif Lindholm Cc: Ard Biesheuvel Signed-off-by: Samer El-Haj-Mahmoud --- ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c b/ArmPlatfo= rmPkg/Library/PL011UartLib/PL011UartLib.c index 3c58a0f39acb..ec6056f5fdfd 100644 --- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c +++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c @@ -269,6 +269,21 @@ PL011UartSetControl ( {=0D UINT32 Bits;=0D =0D +=0D + //=0D + // Per UEFI spec, the control bits that can be set are :=0D + // EFI_SERIAL_DATA_TERMINAL_READY=0D + // EFI_SERIAL_REQUEST_TO_SEND=0D + // EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE=0D + // EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE=0D + // EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE=0D + //=0D + if ((Control & (~(EFI_SERIAL_REQUEST_TO_SEND | EFI_SERIAL_DATA_TERMINAL_= READY |=0D + EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE | EFI_SERIAL_SOFTW= ARE_LOOPBACK_ENABLE |=0D + EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE))) !=3D 0) {=0D + return EFI_UNSUPPORTED;=0D + }=0D +=0D if ((Control & mInvalidControlBits) !=3D 0) {=0D return RETURN_UNSUPPORTED;=0D }=0D --=20 2.25.1