From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web10.36220.1608531956372034049 for ; Sun, 20 Dec 2020 22:25:56 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: aaron.li@intel.com) IronPort-SDR: cDHuIYStAzJnEnpIGXoWeHMkrtATKtA/cAg49HTyQ7YsQs+gKkWY/3PGRnGTm/oZCCwu/A15f1 0zvk2saJP1eg== X-IronPort-AV: E=McAfee;i="6000,8403,9841"; a="163409874" X-IronPort-AV: E=Sophos;i="5.78,436,1599548400"; d="scan'208";a="163409874" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Dec 2020 22:25:52 -0800 IronPort-SDR: myNjZpK7HaS/4nCuxAJ77AcPsbbpDGfIvzvRifMNBlNAXlT73xAoozVTMmJW374HRikfX05D5c b209Q9eHsHGQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,436,1599548400"; d="scan'208";a="342392830" Received: from sh1gapp1015.ccr.corp.intel.com ([10.239.189.85]) by fmsmga008.fm.intel.com with ESMTP; 20 Dec 2020 22:25:50 -0800 From: "Aaron Li" To: devel@edk2.groups.io Cc: Bob Feng , Liming Gao Subject: [PATCH v2 1/1] Silicon/FitGen: Enhance Slot mode support force mode for multiple FV. Date: Mon, 21 Dec 2020 14:25:46 +0800 Message-Id: <20201221062546.10545-1-aaron.li@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3122 Adding "-LF"/"-lf" option to support slot mode without FFS GUID check. It will support the scenario that multiple Microcode FV with different FFS GUID enable slot mode. The size of slot should be 16 byte-aligned, and larger than every microcode. Signed-off-by: Aaron Li Cc: Bob Feng Cc: Liming Gao --- Silicon/Intel/Tools/FitGen/FitGen.c | 39 +++++++++++++------- Silicon/Intel/Tools/FitGen/FitGen.h | 2 +- 2 files changed, 27 insertions(+), 14 deletions(-) diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c b/Silicon/Intel/Tools/FitG= en/FitGen.c index e9541c1e95cb..6f7ddedf7e5f 100644 --- a/Silicon/Intel/Tools/FitGen/FitGen.c +++ b/Silicon/Intel/Tools/FitGen/FitGen.c @@ -333,9 +333,10 @@ Returns: "\t[-F ] [-F ] [-V= ]\n"=0D "\t[-NA]\n"=0D "\t[-A ]\n"=0D - "\t[-REMAP \n"=0D + "\t[-REMAP \n"=0D "\t[-CLEAR]\n"=0D "\t[-L ]\n"=0D + "\t[-LF ]\n"=0D "\t[-I ]\n"=0D "\t[-S |] [-V = ]\n"=0D "\t[-U |]\n"=0D @@ -366,6 +367,7 @@ Returns: printf ("\tMicrocodeGuid - Guid of Microcode Module.\n");=0D printf ("\tMicrocodeSlotSize - Occupied region size of each Microco= de binary.\n");=0D printf ("\tMicrocodeFfsGuid - Guid of FFS which is used to save Mi= crocode binary");=0D + printf ("\t-LF - Microcode Slot mode without FFS chec= k, treat all Microcode FV as slot mode. In this case the Microcode FV shoul= d only contain one FFS.\n");=0D printf ("\t-NA - No 0x800 aligned Microcode requireme= nt. No -NA means Microcode is aligned with option MicrocodeAlignment value.= \n");=0D printf ("\tMicrocodeAlignment - HEX value of Microcode alignment. Ig= nored if \"-NA\" is specified. Default value is 0x800. The Microcode update= data must start at a 16-byte aligned linear address.\n");=0D printf ("\tRecordType - FIT entry record type. User should e= nsure it is ordered.\n");=0D @@ -882,11 +884,13 @@ Returns: UINTN FitEntryNumber;=0D BOOLEAN BiosInfoExist;=0D BOOLEAN SlotMode;=0D + BOOLEAN SlotModeForce;=0D BIOS_INFO_HEADER *BiosInfo;=0D BIOS_INFO_STRUCT *BiosInfoStruct;=0D UINTN BiosInfoIndex;=0D =0D - SlotMode =3D FALSE;=0D + SlotMode =3D FALSE;=0D + SlotModeForce =3D FALSE;=0D =0D //=0D // Init index=0D @@ -1031,7 +1035,9 @@ Returns: //=0D if ((Index + 1 >=3D argc) ||=0D ((strcmp (argv[Index], "-L") !=3D 0) &&=0D - (strcmp (argv[Index], "-l") !=3D 0)) ) {=0D + (strcmp (argv[Index], "-l") !=3D 0) &&=0D + (strcmp (argv[Index], "-LF") !=3D 0) &&=0D + (strcmp (argv[Index], "-lf") !=3D 0))) {=0D //=0D // Bypass=0D //=0D @@ -1039,18 +1045,21 @@ Returns: } else {=0D SlotSize =3D xtoi (argv[Index + 1]);=0D =0D - if (SlotSize =3D=3D 0) {=0D - printf ("Invalid slotsize =3D %d\n", SlotSize);=0D + if (SlotSize & 0xF) {=0D + printf ("Invalid slotsize =3D 0x%x, Microcode data must start at a 1= 6-byte aligned linear address!\n", SlotSize);=0D return 0;=0D }=0D -=0D - SlotMode =3D IsGuidData(argv[Index + 2], &MicrocodeFfsGuid);=0D - if (!SlotMode) {=0D - printf ("Need a ffs GUID for search uCode ffs\n");=0D - return 0;=0D + if (strcmp (argv[Index], "-LF") =3D=3D 0 || strcmp (argv[Index], "-lf"= ) =3D=3D 0) {=0D + SlotModeForce =3D TRUE;=0D + Index +=3D 2;=0D + } else {=0D + SlotMode =3D IsGuidData(argv[Index + 2], &MicrocodeFfsGuid);=0D + if (!SlotMode) {=0D + printf ("Need a ffs GUID for search uCode ffs\n");=0D + return 0;=0D + }=0D + Index +=3D 3;=0D }=0D -=0D - Index +=3D 3;=0D }=0D =0D //=0D @@ -1219,6 +1228,10 @@ Returns: gFitTableContext.FitEntryNumber++;=0D =0D if (SlotSize !=3D 0) {=0D + if (SlotSize < MicrocodeSize) {=0D + printf ("Parameter incorrect, Slot size: %x is too small= for Microcode size: %x!\n", SlotSize, MicrocodeSize);=0D + return 0;=0D + }=0D MicrocodeBuffer +=3D SlotSize;=0D } else {=0D MicrocodeBuffer +=3D MicrocodeSize;=0D @@ -1228,7 +1241,7 @@ Returns: ///=0D /// Check the remaining buffer=0D ///=0D - if (((UINT32)(MicrocodeBuffer - MicrocodeFileBuffer) < Microco= deFileSize) && SlotMode !=3D 0) {=0D + if (((UINT32)(MicrocodeBuffer - MicrocodeFileBuffer) < Microco= deFileSize) && (SlotMode || SlotModeForce)) {=0D for (Walker =3D MicrocodeBuffer; Walker < MicrocodeFileBuffe= r + MicrocodeFileSize; Walker++) {=0D if (*Walker !=3D 0xFF) {=0D printf ("Error: detect non-spare space after uCode array= , please check uCode array!\n");=0D diff --git a/Silicon/Intel/Tools/FitGen/FitGen.h b/Silicon/Intel/Tools/FitG= en/FitGen.h index 435fc26209da..5add6a8870e9 100644 --- a/Silicon/Intel/Tools/FitGen/FitGen.h +++ b/Silicon/Intel/Tools/FitGen/FitGen.h @@ -31,7 +31,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // Utility version information=0D //=0D #define UTILITY_MAJOR_VERSION 0=0D -#define UTILITY_MINOR_VERSION 63=0D +#define UTILITY_MINOR_VERSION 64=0D #define UTILITY_DATE __DATE__=0D =0D //=0D --=20 2.29.2.windows.2