[PATCH 1/1] MdeModulePkg:Pci: Fix for PM1733 U.2 SSD abnormal VF BAR4

[PATCH 1/1] MdeModulePkg:Pci: Fix for PM1733 U.2 SSD abnormal VF BAR4

[Andrew Kim]

Symptom: With PM1733 U.2 SSD on system, there's abnormal VF BAR
alignment 0xFFFFFFFFFFFFFFFF in POST message as below.
 VFBAR[3]: Type = PMem64; Alignment = 0xFFFFFFFFFFFFFFFF;Length = 0x0;Offset = 0x21C

In addition, system might not boot into Yocto. System will output below message and hang.
[   13.225541] zswap: default zpool zbud not available
[   13.230465] zswap: pool creation failed

Rootcause: PM1733 VF BAR4 request for 64bit prefetchable memory resource,
But VF BAR4-5 didn't response any size.
Workaround: In general, higher address of a 64bit BAR should not have
zero size. Reset alignment to be 0 for this special case.

Signed-off-by: Andrew Kim <andrew.kim@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>

---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index 6c68a97d4e46..907a0a9288b8 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -1686,6 +1686,14 @@ PciIovParseVfBar (
                 );
 
       if (EFI_ERROR (Status)) {
+        PciIoDevice->VfPciBar[BarIndex].BaseAddress = 0;
+        PciIoDevice->VfPciBar[BarIndex].Length      = 0;
+        PciIoDevice->VfPciBar[BarIndex].Alignment   = 0;
+
+        //
+        // Scan all the BARs anyway
+        //
+        PciIoDevice->VfPciBar[BarIndex].Offset = (UINT16) Offset;
         return Offset + 4;
       }
 
-- 
2.26.2.windows.1

Re: [edk2-devel] [PATCH 1/1] MdeModulePkg:Pci: Fix for PM1733 U.2 SSD abnormal VF BAR4

[Michael D Kinney]

Hi Andrew,

Is this a workaround for a non-conformant device?  Or do you think this is a general purpose change for all PCI devices?

For non-conformant PCI devices we try to use the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL.

Thanks,

Mike

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Andrew Kim
> Sent: Monday, January 4, 2021 12:10 PM
> To: devel@edk2.groups.io
> Cc: Kim, Andrew <andrew.kim@intel.com>; Wang, Jian J <jian.j.wang@intel.com>; Wu, Hao A <hao.a.wu@intel.com>; Ni, Ray
> <ray.ni@intel.com>
> Subject: [edk2-devel] [PATCH 1/1] MdeModulePkg:Pci: Fix for PM1733 U.2 SSD abnormal VF BAR4
> 
> Symptom: With PM1733 U.2 SSD on system, there's abnormal VF BAR
> alignment 0xFFFFFFFFFFFFFFFF in POST message as below.
>  VFBAR[3]: Type = PMem64; Alignment = 0xFFFFFFFFFFFFFFFF;Length = 0x0;Offset = 0x21C
> 
> In addition, system might not boot into Yocto. System will output below message and hang.
> [   13.225541] zswap: default zpool zbud not available
> [   13.230465] zswap: pool creation failed
> 
> Rootcause: PM1733 VF BAR4 request for 64bit prefetchable memory resource,
> But VF BAR4-5 didn't response any size.
> Workaround: In general, higher address of a 64bit BAR should not have
> zero size. Reset alignment to be 0 for this special case.
> 
> Signed-off-by: Andrew Kim <andrew.kim@intel.com>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Hao A Wu <hao.a.wu@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> 
> ---
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
> index 6c68a97d4e46..907a0a9288b8 100644
> --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
> +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
> @@ -1686,6 +1686,14 @@ PciIovParseVfBar (
>                  );
> 
>        if (EFI_ERROR (Status)) {
> +        PciIoDevice->VfPciBar[BarIndex].BaseAddress = 0;
> +        PciIoDevice->VfPciBar[BarIndex].Length      = 0;
> +        PciIoDevice->VfPciBar[BarIndex].Alignment   = 0;
> +
> +        //
> +        // Scan all the BARs anyway
> +        //
> +        PciIoDevice->VfPciBar[BarIndex].Offset = (UINT16) Offset;
>          return Offset + 4;
>        }
> 
> --
> 2.26.2.windows.1
> 
> 
> 
> 
> 

Re: [edk2-devel] [PATCH 1/1] MdeModulePkg:Pci: Fix for PM1733 U.2 SSD abnormal VF BAR4

[Kim, Andrew]

Hi Mike,

Please hold on reviewing of this.
This is an incompatible pci device so this will be fixed with different way from OpenBoard platform not from Edk2 tree.

-Andrew

-----Original Message-----
From: Kinney, Michael D <michael.d.kinney@intel.com> 
Sent: Monday, January 4, 2021 5:04 PM
To: devel@edk2.groups.io; Kim, Andrew <andrew.kim@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>
Cc: Wang, Jian J <jian.j.wang@intel.com>; Wu, Hao A <hao.a.wu@intel.com>; Ni, Ray <ray.ni@intel.com>
Subject: RE: [edk2-devel] [PATCH 1/1] MdeModulePkg:Pci: Fix for PM1733 U.2 SSD abnormal VF BAR4

Hi Andrew,

Is this a workaround for a non-conformant device?  Or do you think this is a general purpose change for all PCI devices?

For non-conformant PCI devices we try to use the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL.

Thanks,

Mike

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Andrew 
> Kim
> Sent: Monday, January 4, 2021 12:10 PM
> To: devel@edk2.groups.io
> Cc: Kim, Andrew <andrew.kim@intel.com>; Wang, Jian J 
> <jian.j.wang@intel.com>; Wu, Hao A <hao.a.wu@intel.com>; Ni, Ray 
> <ray.ni@intel.com>
> Subject: [edk2-devel] [PATCH 1/1] MdeModulePkg:Pci: Fix for PM1733 U.2 
> SSD abnormal VF BAR4
> 
> Symptom: With PM1733 U.2 SSD on system, there's abnormal VF BAR 
> alignment 0xFFFFFFFFFFFFFFFF in POST message as below.
>  VFBAR[3]: Type = PMem64; Alignment = 0xFFFFFFFFFFFFFFFF;Length = 
> 0x0;Offset = 0x21C
> 
> In addition, system might not boot into Yocto. System will output below message and hang.
> [   13.225541] zswap: default zpool zbud not available
> [   13.230465] zswap: pool creation failed
> 
> Rootcause: PM1733 VF BAR4 request for 64bit prefetchable memory 
> resource, But VF BAR4-5 didn't response any size.
> Workaround: In general, higher address of a 64bit BAR should not have 
> zero size. Reset alignment to be 0 for this special case.
> 
> Signed-off-by: Andrew Kim <andrew.kim@intel.com>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Hao A Wu <hao.a.wu@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> 
> ---
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c 
> b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
> index 6c68a97d4e46..907a0a9288b8 100644
> --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
> +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
> @@ -1686,6 +1686,14 @@ PciIovParseVfBar (
>                  );
> 
>        if (EFI_ERROR (Status)) {
> +        PciIoDevice->VfPciBar[BarIndex].BaseAddress = 0;
> +        PciIoDevice->VfPciBar[BarIndex].Length      = 0;
> +        PciIoDevice->VfPciBar[BarIndex].Alignment   = 0;
> +
> +        //
> +        // Scan all the BARs anyway
> +        //
> +        PciIoDevice->VfPciBar[BarIndex].Offset = (UINT16) Offset;
>          return Offset + 4;
>        }
> 
> --
> 2.26.2.windows.1
> 
> 
> 
> 
>