[PATCH v4 0/7] rpi4: Enable eMMC2 controller

[PATCH v4 0/7] rpi4: Enable eMMC2 controller

[Jeremy Linton]

The rpi4 has a secondary SD controller at offset
0xfe340000. This controller appears to be a mostly
compliant SDHCI controller (a newer more bugfree
Arasan?). So the existing Arasan driver should be 
bound to it. This allows the rpi4 to boot
with its normal eMMC2->SD card, Arasan->wifi 
configuration that is described in the Linux DT.

To achieve this, it appears we should be tweaking
some of the expansion gpios, and probably telling
the firmware to power everything up. To do that
the vpu mailbox headers are synced with a more recent
list of the mailbox commands, then the rpi
firmware dxe is extended to support some futher
gpio/power commands. Once that is complete we tweak
the arasan driver to use an alternate register base,
add a workaround for a known clock crossing bug, and
set the card voltage.

Of note, this set does _NOT_ change the HID/CID's
and add the additional eMMC2 controller to the
DSDT table. That remains an open item waiting
for a proper set of device ids.

v3->v4: Commit message tweaks, variable rename.
v1->v3: Use some mailbox defines rather than opencoded constants

Jeremy Linton (7):
  Platform/RaspberryPi: Update VPU mailbox constants
  Platform/RaspberryPi: Add further mailbox helpers
  Platform/RaspberryPi: Split MMC register definitions
  Platform/RaspberryPi/Arasan: Add write delay and voltage/clock config
  Platform/RaspberryPi/Arasan: Select the correct base frequency
  Platform/RaspberryPi: Power up SD, and tweak GPIOs
  Platform/RaspberryPi: Correct device path removal.

 .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c    | 131 ++++++++---
 .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h    |   1 +
 Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c |   7 +
 .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c        | 240 ++++++++++++++++++++-
 .../RaspberryPi/Include/IndustryStandard/RpiMbox.h |  94 +++++++-
 .../RaspberryPi/Include/Protocol/RpiFirmware.h     |  25 +++
 .../Library/PlatformBootManagerLib/PlatformBm.c    |   2 +-
 .../Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h |  42 ++--
 8 files changed, 484 insertions(+), 58 deletions(-)

-- 
2.13.7

[PATCH v4 1/7] Platform/RaspberryPi: Update VPU mailbox constants

[Jeremy Linton]

Lets sync our mailbox commands with the known/Linux
constants so that we have a more complete view of
what we can request from the VPU.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Andrei Warkentin <awarkentin@vmware.com>
---
 .../RaspberryPi/Include/IndustryStandard/RpiMbox.h | 94 ++++++++++++++++++++--
 1 file changed, 89 insertions(+), 5 deletions(-)

diff --git a/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h b/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h
index 7104068998..551c2b82e5 100644
--- a/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h
+++ b/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h
@@ -45,6 +45,10 @@
 #define RPI_MBOX_GET_BOARD_SERIAL                             0x00010004
 #define RPI_MBOX_GET_ARM_MEMSIZE                              0x00010005
 #define RPI_MBOX_GET_VC_MEMSIZE                               0x00010006
+#define RPI_MBOX_GET_CLOCKS                                   0x00010007
+
+#define RPI_MBOX_GET_POWER_STATE                              0x00020001
+#define RPI_MBOX_GET_TIMING                                   0x00020002
 
 #define RPI_MBOX_SET_POWER_STATE                              0x00028001
 
@@ -58,28 +62,92 @@
 #define RPI_MBOX_POWER_STATE_SPI                              0x00000007
 #define RPI_MBOX_POWER_STATE_CCP2TX                           0x00000008
 
+#define RPI_MBOX_GET_CLOCK_STATE                              0x00030001
 #define RPI_MBOX_GET_CLOCK_RATE                               0x00030002
+#define RPI_MBOX_GET_VOLTAGE                                  0x00030003
 #define RPI_MBOX_GET_MAX_CLOCK_RATE                           0x00030004
+#define RPI_MBOX_GET_MAX_VOLTAGE                              0x00030005
+#define RPI_MBOX_GET_TEMPERATURE                              0x00030006
 #define RPI_MBOX_GET_MIN_CLOCK_RATE                           0x00030007
-
+#define RPI_MBOX_GET_MIN_VOLTAGE                              0x00030008
+#define RPI_MBOX_GET_TURBO                                    0x00030009
+#define RPI_MBOX_GET_MAX_TEMPERATURE                          0x0003000a
+#define RPI_MBOX_GET_STC                                      0x0003000b
+#define RPI_MBOX_ALLOCATE_MEMORY                              0x0003000c
+#define RPI_MBOX_LOCK_MEMORY                                  0x0003000d
+#define RPI_MBOX_UNLOCK_MEMORY                                0x0003000e
+#define RPI_MBOX_RELEASE_MEMORY                               0x0003000f
+#define RPI_MBOX_EXECUTE_CODE                                 0x00030010
+#define RPI_MBOX_EXECUTE_QPU                                  0x00030011
+#define RPI_MBOX_SET_ENABLE_QPU                               0x00030012
+#define RPI_MBOX_GET_DISPMANX_RESOURCE_MEM_HANDLE             0x00030014
+#define RPI_MBOX_GET_EDID_BLOCK                               0x00030020
+#define RPI_MBOX_GET_CUSTOMER_OTP                             0x00030021
+#define RPI_MBOX_GET_DOMAIN_STATE                             0x00030030
+#define RPI_MBOX_GET_GPIO_STATE                               0x00030041
+#define RPI_MBOX_GET_GPIO_CONFIG                              0x00030043
+#define RPI_MBOX_GET_PERIPH_REG                               0x00030045
+#define RPI_MBOX_GET_THROTTLED                                0x00030046
+#define RPI_MBOX_GET_CLOCK_MEASURED                           0x00030047
+#define RPI_MBOX_NOTIFY_REBOOT                                0x00030048
+#define RPI_MBOX_GET_POE_HAT_VAL                              0x00030049
+#define RPI_MBOX_SET_POE_HAT_VAL                              0x00030050
 #define RPI_MBOX_NOTIFY_XHCI_RESET                            0x00030058
 
+#define RPI_MBOX_SET_CLOCK_STATE                              0x00038001
 #define RPI_MBOX_SET_CLOCK_RATE                               0x00038002
+#define RPI_MBOX_SET_VOLTAGE                                  0x00038003
+#define RPI_MBOX_SET_TURBO                                    0x00038009
+#define RPI_MBOX_SET_CUSTOMER_OTP                             0x00038021
+#define RPI_MBOX_SET_DOMAIN_STATE                             0x00038030
 #define RPI_MBOX_SET_GPIO                                     0x00038041
+#define RPI_MBOX_SET_SDHOST_CLOCK                             0x00038042
+#define RPI_MBOX_SET_GPIO_CONFIG                              0x00038043
+#define RPI_MBOX_SET_PERIPH_REG                               0x00038045
 
+#define RPI_MBOX_ALLOC_FB                                     0x00040001
+#define RPI_MBOX_FB_BLANK                                     0x00040002
 #define RPI_MBOX_GET_FB_GEOMETRY                              0x00040003
-#define RPI_MBOX_GET_FB_LINELENGTH                            0x00040008
+#define RPI_MBOX_GET_FB_VIRTUAL_WIDTH_HEIGHT                  0x00040004
 #define RPI_MBOX_GET_FB_COLOR_DEPTH                           0x00040005
-#define RPI_MBOX_GET_FB_REGION                                0x00040001
+#define RPI_MBOX_GET_FB_PIXEL_ORDER                           0x00040006
+#define RPI_MBOX_GET_FB_ALPHA_MODE                            0x00040007
+#define RPI_MBOX_GET_FB_LINELENGTH                            0x00040008
+#define RPI_MBOX_GET_FB_VIRTUAL_OFFSET                        0x00040009
+#define RPI_MBOX_GET_FB_OVERSCAN                              0x0004000a
+#define RPI_MBOX_GET_FB_PALETTE                               0x0004000b
+#define RPI_MBOX_GET_FB_TOUCHBUF                              0x0004000f
+#define RPI_MBOX_GET_FB_GPIOVIRTBUF                           0x00040010
+
+#define RPI_MBOX_TEST_FB_PHYSICAL_WIDTH_HEIGHT                0x00044003
+#define RPI_MBOX_TEST_FB_VIRTUAL_WIDTH_HEIGHT                 0x00044004
+#define RPI_MBOX_TEST_FB_DEPTH                                0x00044005
+#define RPI_MBOX_TEST_FB_PIXEL_ORDER                          0x00044006
+#define RPI_MBOX_TEST_FB_ALPHA_MODE                           0x00044007
+#define RPI_MBOX_TEST_FB_VIRTUAL_OFFSET                       0x00044009
+#define RPI_MBOX_TEST_FB_OVERSCAN                             0x0004400a
+#define RPI_MBOX_TEST_FB_PALETTE                              0x0004400b
+#define RPI_MBOX_TEST_FB_VSYNC                                0x0004400e
 
+#define RPI_MBOX_FREE_FB                                      0x00048001
 #define RPI_MBOX_SET_FB_PGEOM                                 0x00048003
 #define RPI_MBOX_SET_FB_VGEOM                                 0x00048004
 #define RPI_MBOX_SET_FB_DEPTH                                 0x00048005
-#define RPI_MBOX_ALLOC_FB                                     0x00040001
-#define RPI_MBOX_FREE_FB                                      0x00048001
+#define RPI_MBOX_SET_FB_PIXEL_ORDER                           0x00048006
+#define RPI_MBOX_SET_FB_ALPHA_MODE                            0x00048007
+#define RPI_MBOX_SET_FB_VIRTUAL_OFFSET                        0x00048009
+#define RPI_MBOX_SET_FB_OVERSCAN                              0x0004800a
+#define RPI_MBOX_SET_FB_PALET TE                              0x0004800b
+#define RPI_MBOX_VCHIQ_INIT                                   0x00048010
+#define RPI_MBOX_SET_FB_TOUCHBUF                              0x0004801f
+#define RPI_MBOX_SET_FB_GPIOVIRTBUF                           0x00048020
+#define RPI_MBOX_SET_FB_VSYNC                                 0x0004800e
+#define RPI_MBOX_SET_FB_BACKLIGHT                             0x0004800f
 
 #define RPI_MBOX_GET_COMMAND_LINE                             0x00050001
 
+#define RPI_MBOX_GET_DMA_CHANNELS                             0x00060001
+
 #define RPI_MBOX_POWER_STATE_ENABLE                           BIT0
 #define RPI_MBOX_POWER_STATE_WAIT                             BIT1
 
@@ -93,5 +161,21 @@
 #define RPI_MBOX_CLOCK_RATE_SDRAM                             0x000000008
 #define RPI_MBOX_CLOCK_RATE_PIXEL                             0x000000009
 #define RPI_MBOX_CLOCK_RATE_PWM                               0x00000000a
+#define RPI_MBOX_CLOCK_RATE_HEVC                              0x00000000b
+#define RPI_MBOX_CLOCK_RATE_EMMC2                             0x00000000c
+#define RPI_MBOX_CLOCK_RATE_M2MC                              0x00000000d
+#define RPI_MBOX_CLOCK_RATE_PIXEL_BVB                         0x00000000d
+
+#define RPI_EXP_GPIO_DIR_IN                                   0
+#define RPI_EXP_GPIO_DIR_OUT                                  1
+
+#define RPI_EXP_GPIO_BT                                       0
+#define RPI_EXP_GPIO_WIFI                                     1
+#define RPI_EXP_GPIO_LED                                      2
+#define RPI_EXP_GPIO_RESET                                    3
+#define RPI_EXP_GPIO_SD_VOLT                                  4
+#define RPI_EXP_GPIO_CAMERA                                   5
+#define RPI_EXP_GPIO_SD_POWER                                 6
+#define RPI_EXP_GPIO_POWER_LED                                7
 
 #endif /* __RASPBERRY_PI_MAILBOX_H__ */
-- 
2.13.7

[PATCH v4 2/7] Platform/RaspberryPi: Add further mailbox helpers

[Jeremy Linton]

Lets add some further mailbox helpers and convert the existing
RpiFirmwareSetLed into a generic SetGpio() function.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Andrei Warkentin <awarkentin@vmware.com>
---
 .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c        | 240 ++++++++++++++++++++-
 .../RaspberryPi/Include/Protocol/RpiFirmware.h     |  25 +++
 2 files changed, 255 insertions(+), 10 deletions(-)

diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c
index ade91c9f34..bf74148bbb 100644
--- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c
+++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c
@@ -1090,7 +1090,6 @@ RpiFirmwareSetClockRate (
   return EFI_SUCCESS;
 }
 
-
 #pragma pack()
 typedef struct {
   UINT32                    ClockId;
@@ -1152,6 +1151,17 @@ RpiFirmwareGetClockRate (
 STATIC
 EFI_STATUS
 EFIAPI
+RpiFirmwareGetCurrentClockState (
+  IN  UINT32    ClockId,
+  OUT UINT32    *ClockState
+  )
+{
+  return RpiFirmwareGetClockRate (ClockId, RPI_MBOX_GET_CLOCK_STATE, ClockState);
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
 RpiFirmwareGetCurrentClockRate (
   IN  UINT32    ClockId,
   OUT UINT32    *ClockRate
@@ -1181,6 +1191,63 @@ RpiFirmwareGetMinClockRate (
 {
   return RpiFirmwareGetClockRate (ClockId, RPI_MBOX_GET_MIN_CLOCK_RATE, ClockRate);
 }
+
+#pragma pack()
+typedef struct {
+  UINT32                    ClockId;
+  UINT32                    ClockState;
+} RPI_FW_GET_CLOCK_STATE_TAG;
+
+typedef struct {
+  RPI_FW_BUFFER_HEAD         BufferHead;
+  RPI_FW_TAG_HEAD            TagHead;
+  RPI_FW_GET_CLOCK_STATE_TAG TagBody;
+  UINT32                     EndTag;
+} RPI_FW_SET_CLOCK_STATE_CMD;
+#pragma pack()
+
+STATIC
+EFI_STATUS
+RpiFirmwareSetClockState (
+  IN  UINT32 ClockId,
+  IN  UINT32 ClockState
+  )
+{
+  RPI_FW_SET_CLOCK_STATE_CMD  *Cmd;
+  EFI_STATUS                  Status;
+  UINT32                      Result;
+
+  if (!AcquireSpinLockOrFail (&mMailboxLock)) {
+    DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__));
+    return EFI_DEVICE_ERROR;
+  }
+
+  Cmd = mDmaBuffer;
+  ZeroMem (Cmd, sizeof (*Cmd));
+
+  Cmd->BufferHead.BufferSize  = sizeof (*Cmd);
+  Cmd->BufferHead.Response    = 0;
+  Cmd->TagHead.TagId          = RPI_MBOX_SET_CLOCK_STATE;
+  Cmd->TagHead.TagSize        = sizeof (Cmd->TagBody);
+  Cmd->TagHead.TagValueSize   = 0;
+  Cmd->TagBody.ClockId        = ClockId;
+  Cmd->TagBody.ClockState     = ClockState;
+  Cmd->EndTag                 = 0;
+
+  Status = MailboxTransaction (Cmd->BufferHead.BufferSize, RPI_MBOX_VC_CHANNEL, &Result);
+
+  ReleaseSpinLock (&mMailboxLock);
+
+  if (EFI_ERROR (Status) ||
+      Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) {
+    DEBUG ((DEBUG_ERROR,
+      "%a: mailbox transaction error: Status == %r, Response == 0x%x\n",
+      __FUNCTION__, Status, Cmd->BufferHead.Response));
+    return EFI_DEVICE_ERROR;
+  }
+
+  return EFI_SUCCESS;
+}
 
 #pragma pack()
 typedef struct {
@@ -1199,8 +1266,9 @@ typedef struct {
 STATIC
 VOID
 EFIAPI
-RpiFirmwareSetLed (
-  IN  BOOLEAN On
+RpiFirmwareSetGpio (
+  IN  UINT32  Gpio,
+  IN  BOOLEAN State
   )
 {
   RPI_FW_SET_GPIO_CMD *Cmd;
@@ -1220,14 +1288,10 @@ RpiFirmwareSetLed (
   Cmd->TagHead.TagId          = RPI_MBOX_SET_GPIO;
   Cmd->TagHead.TagSize        = sizeof (Cmd->TagBody);
   /*
-   * GPIO_PIN_2 = Activity LED
-   * GPIO_PIN_4 = HDMI Detect (Input / Active Low)
-   * GPIO_PIN_7 = Power LED (Input / Active Low)
-   *
    * There's also a 128 pin offset.
    */
-  Cmd->TagBody.Pin = 128 + 2;
-  Cmd->TagBody.State = On;
+  Cmd->TagBody.Pin = 128 + Gpio;
+  Cmd->TagBody.State = State;
   Cmd->TagHead.TagValueSize   = 0;
   Cmd->EndTag                 = 0;
 
@@ -1242,6 +1306,16 @@ RpiFirmwareSetLed (
       __FUNCTION__, Status, Cmd->BufferHead.Response));
   }
 }
+
+STATIC
+VOID
+EFIAPI
+RpiFirmwareSetLed (
+  IN  BOOLEAN On
+  )
+{
+  RpiFirmwareSetGpio (RPI_EXP_GPIO_LED, On);
+}
 
 #pragma pack()
 typedef struct {
@@ -1299,6 +1373,149 @@ RpiFirmwareNotifyXhciReset (
   return Status;
 }
 
+#pragma pack()
+typedef struct {
+  UINT32                       Gpio;
+  UINT32                       Direction;
+  UINT32                       Polarity;
+  UINT32                       TermEn;
+  UINT32                       TermPullUp;
+} RPI_FW_GPIO_GET_CFG_TAG;
+
+typedef struct {
+  RPI_FW_BUFFER_HEAD           BufferHead;
+  RPI_FW_TAG_HEAD              TagHead;
+  RPI_FW_GPIO_GET_CFG_TAG      TagBody;
+  UINT32                       EndTag;
+} RPI_FW_NOTIFY_GPIO_GET_CFG_CMD;
+#pragma pack()
+
+
+STATIC
+EFI_STATUS
+EFIAPI
+RpiFirmwareNotifyGpioGetCfg (
+  IN UINTN  Gpio,
+  IN UINT32 *Polarity
+  )
+{
+  RPI_FW_NOTIFY_GPIO_GET_CFG_CMD *Cmd;
+  EFI_STATUS                   Status;
+  UINT32                       Result;
+
+  if (!AcquireSpinLockOrFail (&mMailboxLock)) {
+    DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__));
+    return EFI_DEVICE_ERROR;
+  }
+
+  Cmd = mDmaBuffer;
+  ZeroMem (Cmd, sizeof (*Cmd));
+
+  Cmd->BufferHead.BufferSize  = sizeof (*Cmd);
+  Cmd->BufferHead.Response    = 0;
+  Cmd->TagHead.TagId          = RPI_MBOX_GET_GPIO_CONFIG;
+  Cmd->TagHead.TagSize        = sizeof (Cmd->TagBody);
+  Cmd->TagBody.Gpio = 128 + Gpio;
+
+  Cmd->TagHead.TagValueSize   = 0;
+  Cmd->EndTag                 = 0;
+
+  Status = MailboxTransaction (Cmd->BufferHead.BufferSize, RPI_MBOX_VC_CHANNEL, &Result);
+
+  *Polarity = Cmd->TagBody.Polarity;
+
+  ReleaseSpinLock (&mMailboxLock);
+
+  if (EFI_ERROR (Status) ||
+      Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) {
+    DEBUG ((DEBUG_ERROR,
+      "%a: mailbox  transaction error: Status == %r, Response == 0x%x\n",
+      __FUNCTION__, Status, Cmd->BufferHead.Response));
+  }
+
+  return Status;
+}
+
+
+#pragma pack()
+typedef struct {
+  UINT32                       Gpio;
+  UINT32                       Direction;
+  UINT32                       Polarity;
+  UINT32                       TermEn;
+  UINT32                       TermPullUp;
+  UINT32                       State;
+} RPI_FW_GPIO_SET_CFG_TAG;
+
+typedef struct {
+  RPI_FW_BUFFER_HEAD           BufferHead;
+  RPI_FW_TAG_HEAD              TagHead;
+  RPI_FW_GPIO_SET_CFG_TAG      TagBody;
+  UINT32                       EndTag;
+} RPI_FW_NOTIFY_GPIO_SET_CFG_CMD;
+#pragma pack()
+
+
+STATIC
+EFI_STATUS
+EFIAPI
+RpiFirmwareNotifyGpioSetCfg (
+  IN UINTN Gpio,
+  IN UINTN Direction,
+  IN UINTN State
+  )
+{
+  RPI_FW_NOTIFY_GPIO_SET_CFG_CMD *Cmd;
+  EFI_STATUS                   Status;
+  UINT32                       Result;
+
+  Status = RpiFirmwareNotifyGpioGetCfg (Gpio, &Result);
+  if (EFI_ERROR (Status)) {
+	  DEBUG ((DEBUG_ERROR, "%a: Failed to get GPIO polarity\n", __FUNCTION__));
+	  Result = 0; //default polarity
+  }
+
+
+  if (!AcquireSpinLockOrFail (&mMailboxLock)) {
+    DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__));
+    return EFI_DEVICE_ERROR;
+  }
+
+  Cmd = mDmaBuffer;
+  ZeroMem (Cmd, sizeof (*Cmd));
+
+  Cmd->BufferHead.BufferSize  = sizeof (*Cmd);
+  Cmd->BufferHead.Response    = 0;
+  Cmd->TagHead.TagId          = RPI_MBOX_SET_GPIO_CONFIG;
+  Cmd->TagHead.TagSize        = sizeof (Cmd->TagBody);
+
+  Cmd->TagBody.Gpio = 128 + Gpio;
+  Cmd->TagBody.Direction = Direction;
+  Cmd->TagBody.Polarity = Result;
+  Cmd->TagBody.TermEn = 0;
+  Cmd->TagBody.TermPullUp = 0;
+  Cmd->TagBody.State = State;
+
+  Cmd->TagHead.TagValueSize   = 0;
+  Cmd->EndTag                 = 0;
+
+  Status = MailboxTransaction (Cmd->BufferHead.BufferSize, RPI_MBOX_VC_CHANNEL, &Result);
+
+  ReleaseSpinLock (&mMailboxLock);
+
+  if (EFI_ERROR (Status) ||
+      Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) {
+    DEBUG ((DEBUG_ERROR,
+      "%a: mailbox  transaction error: Status == %r, Response == 0x%x\n",
+      __FUNCTION__, Status, Cmd->BufferHead.Response));
+  }
+
+  RpiFirmwareSetGpio (Gpio,!State);
+
+
+  return Status;
+}
+
 STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL mRpiFirmwareProtocol = {
   RpiFirmwareSetPowerState,
   RpiFirmwareGetMacAddress,
@@ -1321,7 +1538,10 @@ STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL mRpiFirmwareProtocol = {
   RpiFirmwareGetCpuName,
   RpiFirmwareGetArmMemory,
   RPiFirmwareGetModelInstalledMB,
-  RpiFirmwareNotifyXhciReset
+  RpiFirmwareNotifyXhciReset,
+  RpiFirmwareGetCurrentClockState,
+  RpiFirmwareSetClockState,
+  RpiFirmwareNotifyGpioSetCfg
 };
 
 /**
diff --git a/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h b/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h
index 56a8d15a38..d841608e57 100644
--- a/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h
+++ b/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h
@@ -37,6 +37,20 @@ EFI_STATUS
 
 typedef
 EFI_STATUS
+(EFIAPI *GET_CLOCK_STATE) (
+  IN  UINT32    ClockId,
+  OUT UINT32    *ClockState
+  );
+
+typedef
+EFI_STATUS
+(EFIAPI *SET_CLOCK_STATE) (
+  IN  UINT32 ClockId,
+  IN  UINT32 ClockState
+  );
+
+typedef
+EFI_STATUS
 (EFIAPI *GET_CLOCK_RATE) (
   IN  UINT32    ClockId,
   OUT UINT32    *ClockRate
@@ -149,6 +163,14 @@ EFI_STATUS
   UINTN FunctionNumber
   );
 
+typedef 
+EFI_STATUS
+(EFIAPI *GPIO_SET_CFG) (
+  UINTN Gpio,
+  UINTN Direction,
+  UINTN State
+  );
+
 typedef struct {
   SET_POWER_STATE        SetPowerState;
   GET_MAC_ADDRESS        GetMacAddress;
@@ -172,6 +194,9 @@ typedef struct {
   GET_ARM_MEM            GetArmMem;
   GET_MODEL_INSTALLED_MB GetModelInstalledMB;
   NOTIFY_XHCI_RESET      NotifyXhciReset;
+  GET_CLOCK_STATE        GetClockState;
+  SET_CLOCK_STATE        SetClockState;
+  GPIO_SET_CFG           SetGpioConfig;
 } RASPBERRY_PI_FIRMWARE_PROTOCOL;
 
 extern EFI_GUID gRaspberryPiFirmwareProtocolGuid;
-- 
2.13.7

[PATCH v4 3/7] Platform/RaspberryPi: Split MMC register definitions

[Jeremy Linton]

The current MMC (really SDHCI) definitions are tied to the
Arasan controller. As we intend to reuse the definitions lets
make the base address configurable when the driver loads.

This assumes we won't ever want to run both the eMMC2
and Arasan SDHCI controller at the same time.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Andrei Warkentin <awarkentin@vmware.com>
---
 .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c    |  9 ++++-
 .../Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h | 42 ++++++++++++----------
 2 files changed, 32 insertions(+), 19 deletions(-)

diff --git a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
index 88e9126e35..c8fdfc193b 100644
--- a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
+++ b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
@@ -16,6 +16,7 @@ STATIC CARD_DETECT_STATE mCardDetectState = CardDetectRequired;
 UINT32 LastExecutedCommand = (UINT32) -1;
 
 STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol;
+STATIC UINTN MmcHsBase;
 
 /**
    These SD commands are optional, according to the SD Spec
@@ -763,7 +764,13 @@ MMCInitialize (
 
   DEBUG ((DEBUG_MMCHOST_SD, "ArasanMMCHost: MMCInitialize()\n"));
 
-  if (!PcdGet32 (PcdSdIsArasan)) {
+  if (PcdGet32 (PcdSdIsArasan)) {
+    DEBUG ((DEBUG_INFO, "SD is routed to Arasan\n"));
+    MmcHsBase = MMCHS1_BASE;
+  } else if (RPI_MODEL == 4) {
+    DEBUG ((DEBUG_INFO, "SD is routed to emmc2\n"));
+    MmcHsBase = MMCHS2_BASE;
+  } else {
     DEBUG ((DEBUG_INFO, "SD is not routed to Arasan\n"));
     return EFI_REQUEST_UNLOAD_IMAGE;
   }
diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h
index fd07b47170..1d38cb3d3f 100644
--- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h
+++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h
@@ -13,15 +13,18 @@
 
 // MMC/SD/SDIO1 register definitions.
 #define MMCHS1_OFFSET     0x00300000
+#define MMCHS2_OFFSET     0x00340000
 #define MMCHS1_BASE       (BCM2836_SOC_REGISTERS + MMCHS1_OFFSET)
+#define MMCHS2_BASE       (BCM2836_SOC_REGISTERS + MMCHS2_OFFSET)
 #define MMCHS1_LENGTH     0x00000100
+#define MMCHS2_LENGTH     0x00000100
 
-#define MMCHS_BLK         (MMCHS1_BASE + 0x4)
+#define MMCHS_BLK         (MmcHsBase + 0x4)
 #define BLEN_512BYTES     (0x200UL << 0)
 
-#define MMCHS_ARG         (MMCHS1_BASE + 0x8)
+#define MMCHS_ARG         (MmcHsBase + 0x8)
 
-#define MMCHS_CMD         (MMCHS1_BASE + 0xC)
+#define MMCHS_CMD         (MmcHsBase + 0xC)
 #define BCE_ENABLE        BIT1
 #define DDIR_READ         BIT4
 #define DDIR_WRITE        (0x0UL << 4)
@@ -43,13 +46,13 @@
 #define INDX(CMD_INDX)       (TYPE(CMD_TYPE_NORMAL) | _INDX(CMD_INDX))
 #define INDX_ABORT(CMD_INDX) (TYPE(CMD_TYPE_ABORT) | _INDX(CMD_INDX))
 
-#define MMCHS_RSP10       (MMCHS1_BASE + 0x10)
-#define MMCHS_RSP32       (MMCHS1_BASE + 0x14)
-#define MMCHS_RSP54       (MMCHS1_BASE + 0x18)
-#define MMCHS_RSP76       (MMCHS1_BASE + 0x1C)
-#define MMCHS_DATA        (MMCHS1_BASE + 0x20)
+#define MMCHS_RSP10       (MmcHsBase + 0x10)
+#define MMCHS_RSP32       (MmcHsBase + 0x14)
+#define MMCHS_RSP54       (MmcHsBase + 0x18)
+#define MMCHS_RSP76       (MmcHsBase + 0x1C)
+#define MMCHS_DATA        (MmcHsBase + 0x20)
 
-#define MMCHS_PRES_STATE  (MMCHS1_BASE + 0x24)
+#define MMCHS_PRES_STATE  (MmcHsBase + 0x24)
 #define CMDI_MASK         BIT0
 #define CMDI_ALLOWED      (0x0UL << 0)
 #define CMDI_NOT_ALLOWED  BIT0
@@ -58,17 +61,19 @@
 #define DATI_NOT_ALLOWED  BIT1
 #define WRITE_PROTECT_OFF BIT19
 
-#define MMCHS_HCTL        (MMCHS1_BASE + 0x28)
+#define MMCHS_HCTL        (MmcHsBase + 0x28)
 #define DTW_1_BIT         (0x0UL << 1)
 #define DTW_4_BIT         BIT1
 #define SDBP_MASK         BIT8
 #define SDBP_OFF          (0x0UL << 8)
 #define SDBP_ON           BIT8
+#define SDVS_MASK         (0x7UL << 9)
 #define SDVS_1_8_V        (0x5UL << 9)
 #define SDVS_3_0_V        (0x6UL << 9)
+#define SDVS_3_3_V        (0x7UL << 9)
 #define IWE               BIT24
 
-#define MMCHS_SYSCTL      (MMCHS1_BASE + 0x2C)
+#define MMCHS_SYSCTL      (MmcHsBase + 0x2C)
 #define ICE               BIT0
 #define ICS_MASK          BIT1
 #define ICS               BIT1
@@ -84,7 +89,7 @@
 #define SRC               BIT25
 #define SRD               BIT26
 
-#define MMCHS_INT_STAT    (MMCHS1_BASE + 0x30)
+#define MMCHS_INT_STAT    (MmcHsBase + 0x30)
 #define CC                BIT0
 #define TC                BIT1
 #define BWR               BIT4
@@ -96,7 +101,7 @@
 #define DCRC              BIT21
 #define DEB               BIT22
 
-#define MMCHS_IE          (MMCHS1_BASE + 0x34)
+#define MMCHS_IE          (MmcHsBase + 0x34)
 #define CC_EN             BIT0
 #define TC_EN             BIT1
 #define BWR_EN            BIT4
@@ -112,7 +117,7 @@
 #define BADA_EN           BIT29
 #define ALL_EN            0xFFFFFFFF
 
-#define MMCHS_ISE         (MMCHS1_BASE + 0x38)
+#define MMCHS_ISE         (MmcHsBase + 0x38)
 #define CC_SIGEN          BIT0
 #define TC_SIGEN          BIT1
 #define BWR_SIGEN         BIT4
@@ -127,14 +132,15 @@
 #define CERR_SIGEN        BIT28
 #define BADA_SIGEN        BIT29
 
-#define MMCHS_AC12        (MMCHS1_BASE + 0x3C)
+#define MMCHS_AC12        (MmcHsBase + 0x3C)
+#define MMCHS_HC2R        (MmcHsBase + 0x3E)
 
-#define MMCHS_CAPA        (MMCHS1_BASE + 0x40)
+#define MMCHS_CAPA        (MmcHsBase + 0x40)
 #define VS30              BIT25
 #define VS18              BIT26
 
-#define MMCHS_CUR_CAPA    (MMCHS1_BASE + 0x48)
-#define MMCHS_REV         (MMCHS1_BASE + 0xFC)
+#define MMCHS_CUR_CAPA    (MmcHsBase + 0x48)
+#define MMCHS_REV         (MmcHsBase + 0xFC)
 
 #define BLOCK_COUNT_SHIFT 16
 #define RCA_SHIFT         16
-- 
2.13.7

[PATCH v4 4/7] Platform/RaspberryPi/Arasan: Add write delay and voltage/clock config

[Jeremy Linton]

The uboot and Linux drivers have notes that there is a clock domain crossing
problem that happens with back to back writes to the SD controllers on the
rpi. Its not clear if this is still applicable to the rpi4/eMMC2 but
it seems wise to add it.

Further, we need to assure that the card voltage is set to 3.3V, and
we should try and follow some of the SDHCI docs when it comes to
changing the clock.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Andrei Warkentin <awarkentin@vmware.com>
---
 .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c    | 112 +++++++++++++++++----
 .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h    |   1 +
 2 files changed, 93 insertions(+), 20 deletions(-)

diff --git a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
index c8fdfc193b..7e7caf40e3 100644
--- a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
+++ b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
@@ -18,6 +18,56 @@ UINT32 LastExecutedCommand = (UINT32) -1;
 STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol;
 STATIC UINTN MmcHsBase;
 
+STATIC
+UINT32
+EFIAPI
+SdMmioWrite32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    Value
+  )
+{
+  UINT32 ret;
+  ret = (UINT32)MmioWrite32 (Address, Value);
+  // There is a bug about clock domain crossing on writes, delay to avoid it
+  gBS->Stall (STALL_AFTER_REG_WRITE_US);
+  return ret;
+}
+
+STATIC
+UINT32
+EFIAPI
+SdMmioOr32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    OrData
+  )
+{
+  return SdMmioWrite32 (Address, MmioRead32 (Address) | OrData);
+}
+
+STATIC
+UINT32
+EFIAPI
+SdMmioAnd32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    AndData
+  )
+{
+  return SdMmioWrite32 (Address, MmioRead32 (Address) & AndData);
+}
+
+STATIC
+UINT32
+EFIAPI
+SdMmioAndThenOr32 (
+  IN      UINTN                     Address,
+  IN      UINT32                    AndData,
+  IN      UINT32                    OrData
+  )
+{
+  return SdMmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);
+}
+
+
 /**
    These SD commands are optional, according to the SD Spec
 **/
@@ -175,7 +225,9 @@ SoftReset (
   IN UINT32 Mask
   )
 {
-  MmioOr32 (MMCHS_SYSCTL, Mask);
+  DEBUG ((DEBUG_MMCHOST_SD, "SoftReset with mask 0x%x\n", Mask));
+
+  SdMmioOr32 (MMCHS_SYSCTL, Mask);
   if (PollRegisterWithMask (MMCHS_SYSCTL, Mask, 0) == EFI_TIMEOUT) {
     DEBUG ((DEBUG_ERROR, "Failed to SoftReset with mask 0x%x\n", Mask));
     return EFI_TIMEOUT;
@@ -326,29 +378,29 @@ MMCSendCommand (
   }
 
   if (IsAppCmd && MmcCmd == ACMD22) {
-    MmioWrite32 (MMCHS_BLK, 4);
+    SdMmioWrite32 (MMCHS_BLK, 4);
   } else if (IsAppCmd && MmcCmd == ACMD51) {
-    MmioWrite32 (MMCHS_BLK, 8);
+    SdMmioWrite32 (MMCHS_BLK, 8);
   } else if (!IsAppCmd && MmcCmd == CMD6) {
-    MmioWrite32 (MMCHS_BLK, 64);
+    SdMmioWrite32 (MMCHS_BLK, 64);
   } else if (IsADTCCmd) {
-    MmioWrite32 (MMCHS_BLK, BLEN_512BYTES);
+    SdMmioWrite32 (MMCHS_BLK, BLEN_512BYTES);
   }
 
   // Set Data timeout counter value to max value.
-  MmioAndThenOr32 (MMCHS_SYSCTL, (UINT32) ~DTO_MASK, DTO_VAL);
+  SdMmioAndThenOr32 (MMCHS_SYSCTL, (UINT32) ~DTO_MASK, DTO_VAL);
 
   //
   // Clear Interrupt Status Register, but not the Card Inserted bit
   // to avoid messing with card detection logic.
   //
-  MmioWrite32 (MMCHS_INT_STAT, ALL_EN & ~(CARD_INS));
+  SdMmioWrite32 (MMCHS_INT_STAT, ALL_EN & ~(CARD_INS));
 
   // Set command argument register
-  MmioWrite32 (MMCHS_ARG, Argument);
+  SdMmioWrite32 (MMCHS_ARG, Argument);
 
   // Send the command
-  MmioWrite32 (MMCHS_CMD, MmcCmd);
+  SdMmioWrite32 (MMCHS_CMD, MmcCmd);
 
   // Check for the command status.
   while (RetryCount < MAX_RETRY_COUNT) {
@@ -373,7 +425,7 @@ MMCSendCommand (
 
     // Check if command is completed.
     if ((MmcStatus & CC) == CC) {
-      MmioWrite32 (MMCHS_INT_STAT, CC);
+      SdMmioWrite32 (MMCHS_INT_STAT, CC);
       break;
     }
 
@@ -428,6 +480,21 @@ MMCNotifyState (
         return Status;
       }
 
+      DEBUG ((DEBUG_MMCHOST_SD, "ArasanMMCHost: CAP %X CAPH %X\n", MmioRead32(MMCHS_CAPA),MmioRead32(MMCHS_CUR_CAPA)));
+
+      // Lets switch to card detect test mode.
+      SdMmioOr32 (MMCHS_HCTL, BIT7|BIT6);
+
+      // set card voltage
+      SdMmioAnd32 (MMCHS_HCTL, ~SDBP_ON);
+      SdMmioAndThenOr32 (MMCHS_HCTL, (UINT32) ~SDBP_MASK, SDVS_3_3_V);
+      SdMmioOr32 (MMCHS_HCTL, SDBP_ON);
+
+      DEBUG ((DEBUG_MMCHOST_SD, "ArasanMMCHost: AC12 %X HCTL %X\n", MmioRead32(MMCHS_AC12),MmioRead32(MMCHS_HCTL)));
+
+      // First turn off the clock
+      SdMmioAnd32 (MMCHS_SYSCTL, ~CEN);
+
       // Attempt to set the clock to 400Khz which is the expected initialization speed
       Status = CalculateClockFrequencyDivisor (400000, &Divisor, NULL);
       if (EFI_ERROR (Status)) {
@@ -436,10 +503,15 @@ MMCNotifyState (
       }
 
       // Set Data Timeout Counter value, set clock frequency, enable internal clock
-      MmioOr32 (MMCHS_SYSCTL, DTO_VAL | Divisor | CEN | ICS | ICE);
+      SdMmioOr32 (MMCHS_SYSCTL, DTO_VAL | Divisor | CEN | ICS | ICE);
+      SdMmioOr32 (MMCHS_HCTL, SDBP_ON);
+      // wait for ICS
+      while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
+
+      DEBUG ((DEBUG_MMCHOST_SD, "ArasanMMCHost: AC12 %X HCTL %X\n", MmioRead32(MMCHS_AC12),MmioRead32(MMCHS_HCTL)));
 
       // Enable interrupts
-      MmioWrite32 (MMCHS_IE, ALL_EN);
+      SdMmioWrite32 (MMCHS_IE, ALL_EN);
     }
     break;
   case MmcIdleState:
@@ -452,7 +524,7 @@ MMCNotifyState (
     ClockFrequency = 25000000;
 
     // First turn off the clock
-    MmioAnd32 (MMCHS_SYSCTL, ~CEN);
+    SdMmioAnd32 (MMCHS_SYSCTL, ~CEN);
 
     Status = CalculateClockFrequencyDivisor (ClockFrequency, &Divisor, NULL);
     if (EFI_ERROR (Status)) {
@@ -462,13 +534,13 @@ MMCNotifyState (
     }
 
     // Setup new divisor
-    MmioAndThenOr32 (MMCHS_SYSCTL, (UINT32) ~CLKD_MASK, Divisor);
+    SdMmioAndThenOr32 (MMCHS_SYSCTL, (UINT32) ~CLKD_MASK, Divisor);
 
     // Wait for the clock to stabilise
     while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
 
     // Set Data Timeout Counter value, set clock frequency, enable internal clock
-    MmioOr32 (MMCHS_SYSCTL, CEN);
+    SdMmioOr32 (MMCHS_SYSCTL, CEN);
     break;
   case MmcTransferState:
     break;
@@ -635,7 +707,7 @@ MMCReadBlockData (
     while (RetryCount < MAX_RETRY_COUNT) {
       MmcStatus = MmioRead32 (MMCHS_INT_STAT);
       if ((MmcStatus & BRR) != 0) {
-        MmioWrite32 (MMCHS_INT_STAT, BRR);
+        SdMmioWrite32 (MMCHS_INT_STAT, BRR);
         /*
          * Data is ready.
          */
@@ -662,7 +734,7 @@ MMCReadBlockData (
     gBS->Stall (STALL_AFTER_READ_US);
   }
 
-  MmioWrite32 (MMCHS_INT_STAT, BRR);
+  SdMmioWrite32 (MMCHS_INT_STAT, BRR);
   return EFI_SUCCESS;
 }
 
@@ -699,13 +771,13 @@ MMCWriteBlockData (
     while (RetryCount < MAX_RETRY_COUNT) {
       MmcStatus = MmioRead32 (MMCHS_INT_STAT);
       if ((MmcStatus & BWR) != 0) {
-        MmioWrite32 (MMCHS_INT_STAT, BWR);
+        SdMmioWrite32 (MMCHS_INT_STAT, BWR);
         /*
          * Can write data.
          */
         mFwProtocol->SetLed (TRUE);
         for (Count = 0; Count < BlockLen; Count += 4, Buffer++) {
-          MmioWrite32 (MMCHS_DATA, *Buffer);
+          SdMmioWrite32 (MMCHS_DATA, *Buffer);
         }
 
         mFwProtocol->SetLed (FALSE);
@@ -726,7 +798,7 @@ MMCWriteBlockData (
     gBS->Stall (STALL_AFTER_WRITE_US);
   }
 
-  MmioWrite32 (MMCHS_INT_STAT, BWR);
+  SdMmioWrite32 (MMCHS_INT_STAT, BWR);
   return EFI_SUCCESS;
 }
 
diff --git a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h
index 6cd600f738..e94606cc5b 100644
--- a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h
+++ b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h
@@ -37,6 +37,7 @@
 #define STALL_AFTER_REC_RESP_US (50)
 #define STALL_AFTER_WRITE_US (200)
 #define STALL_AFTER_READ_US (20)
+#define STALL_AFTER_REG_WRITE_US (10)
 #define STALL_AFTER_RETRY_US (20)
 
 #define MAX_DIVISOR_VALUE 1023
-- 
2.13.7

[PATCH v4 5/7] Platform/RaspberryPi/Arasan: Select the correct base frequency

[Jeremy Linton]

The firmware reports the eMMC2 frequency with a slightly
different mailbox command, lets select the correct one
based on which controller we are binding to.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Andrei Warkentin <awarkentin@vmware.com>
---
 .../RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c    | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
index 7e7caf40e3..9adc5c53d8 100644
--- a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
+++ b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
@@ -250,7 +250,11 @@ CalculateClockFrequencyDivisor (
   UINT32 Divisor;
   UINT32 BaseFrequency = 0;
 
-  Status = mFwProtocol->GetClockRate (RPI_MBOX_CLOCK_RATE_EMMC, &BaseFrequency);
+  if (PcdGet32 (PcdSdIsArasan)) {
+    Status = mFwProtocol->GetClockRate (RPI_MBOX_CLOCK_RATE_EMMC, &BaseFrequency);
+  } else {
+    Status = mFwProtocol->GetClockRate (RPI_MBOX_CLOCK_RATE_EMMC2, &BaseFrequency);
+  }
   if (EFI_ERROR (Status)) {
     DEBUG ((DEBUG_ERROR, "Couldn't get RPI_MBOX_CLOCK_RATE_EMMC\n"));
     return Status;
@@ -472,8 +476,8 @@ MMCNotifyState (
   switch (State) {
   case MmcHwInitializationState:
     {
-      EFI_STATUS Status;
-      UINT32 Divisor;
+
+      DEBUG ((DEBUG_MMCHOST_SD, "ArasanMMCHost: current divisor %x\n", MmioRead32(MMCHS_SYSCTL)));
 
       Status = SoftReset (SRA);
       if (EFI_ERROR (Status)) {
-- 
2.13.7

[PATCH v4 6/7] Platform/RaspberryPi: Power up SD, and tweak GPIOs

[Jeremy Linton]

It seems we should be powering up the SD cards, and possibly
the clocks as well to assure they are setup properly before
we attempt to access the controller.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Andrei Warkentin <awarkentin@vmware.com>
---
 Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
index 28f57438c5..aa9ba7d76f 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
@@ -552,6 +552,13 @@ ApplyVariables (
       GpioPinFuncSet (37, GPIO_FSEL_ALT3);
       GpioPinFuncSet (38, GPIO_FSEL_ALT3);
       GpioPinFuncSet (39, GPIO_FSEL_ALT3);
+
+      Status = mFwProtocol->SetPowerState (RPI_MBOX_POWER_STATE_SDHCI,
+                                           TRUE, TRUE); //SD on with wait
+      Status = mFwProtocol->SetGpioConfig (RPI_EXP_GPIO_SD_VOLT, 
+                                           RPI_EXP_GPIO_DIR_OUT, TRUE); //3.3v
+      Status = mFwProtocol->SetClockState (RPI_MBOX_CLOCK_RATE_EMMC2, TRUE);
+      Status = mFwProtocol->SetClockState (RPI_MBOX_CLOCK_RATE_EMMC, TRUE);
     }
   } else {
     DEBUG ((DEBUG_ERROR, "Model Family %d not supported...\n", mModelFamily));
-- 
2.13.7

[PATCH v4 7/7] Platform/RaspberryPi: Correct device path removal.

[Jeremy Linton]

The Arasan driver now works with the eMMC2 device.
This means that both the PcdSdIsArasan and the
!PcdSdIsArasan result in valid SD controllers on the rpi4.

Lets avoid removing the "stale" boot entry, in this case
which also has the side effect of avoiding a boot assert
when eMMC2 is selected.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Andrei Warkentin <awarkentin@vmware.com>
---
 Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c
index fa46be7917..c2fc40b8ea 100644
--- a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c
+++ b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c
@@ -431,7 +431,7 @@ RemoveStaleBootOptions (
     EFI_DEVICE_PATH_PROTOCOL *DevicePath = BootOptions[Index].FilePath;
 
     if (CompareMem (&mArasan, DevicePath, GetDevicePathSize (DevicePath)) == 0) {
-      if (PcdGet32 (PcdSdIsArasan)) {
+      if (PcdGet32 (PcdSdIsArasan) || RPI_MODEL == 4) {
         continue;
       }
     } else if (CompareMem (&mSDHost, DevicePath, GetDevicePathSize (DevicePath)) == 0) {
-- 
2.13.7

Re: [edk2-devel] [PATCH v4 3/7] Platform/RaspberryPi: Split MMC register definitions

[Philippe Mathieu-Daudé]

On 1/5/21 5:34 PM, Jeremy Linton wrote:
> The current MMC (really SDHCI) definitions are tied to the
> Arasan controller. As we intend to reuse the definitions lets
> make the base address configurable when the driver loads.
> 
> This assumes we won't ever want to run both the eMMC2
> and Arasan SDHCI controller at the same time.
> 
> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
> Reviewed-by: Andrei Warkentin <awarkentin@vmware.com>
> ---
>  .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c    |  9 ++++-
>  .../Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h | 42 ++++++++++++----------
>  2 files changed, 32 insertions(+), 19 deletions(-)
> 
> diff --git a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
> index 88e9126e35..c8fdfc193b 100644
> --- a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
> +++ b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c
> @@ -16,6 +16,7 @@ STATIC CARD_DETECT_STATE mCardDetectState = CardDetectRequired;
>  UINT32 LastExecutedCommand = (UINT32) -1;
>  
>  STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol;
> +STATIC UINTN MmcHsBase;

I expect EDK2 style to ask for 'mMmcHsBase'.

With it:
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>

Re: [PATCH v4 0/7] rpi4: Enable eMMC2 controller

[Ard Biesheuvel]

On 1/5/21 5:34 PM, Jeremy Linton wrote:
> The rpi4 has a secondary SD controller at offset
> 0xfe340000. This controller appears to be a mostly
> compliant SDHCI controller (a newer more bugfree
> Arasan?). So the existing Arasan driver should be 
> bound to it. This allows the rpi4 to boot
> with its normal eMMC2->SD card, Arasan->wifi 
> configuration that is described in the Linux DT.
> 

Could you please explain why this is an advantage? Is it related to ACPI
OSes not needing to change pinmuxing etc?


> To achieve this, it appears we should be tweaking
> some of the expansion gpios, and probably telling
> the firmware to power everything up. To do that
> the vpu mailbox headers are synced with a more recent
> list of the mailbox commands, then the rpi
> firmware dxe is extended to support some futher
> gpio/power commands. Once that is complete we tweak
> the arasan driver to use an alternate register base,
> add a workaround for a known clock crossing bug, and
> set the card voltage.
> 
> Of note, this set does _NOT_ change the HID/CID's
> and add the additional eMMC2 controller to the
> DSDT table. That remains an open item waiting
> for a proper set of device ids.
> 
> v3->v4: Commit message tweaks, variable rename.
> v1->v3: Use some mailbox defines rather than opencoded constants
> 
> Jeremy Linton (7):
>   Platform/RaspberryPi: Update VPU mailbox constants
>   Platform/RaspberryPi: Add further mailbox helpers
>   Platform/RaspberryPi: Split MMC register definitions
>   Platform/RaspberryPi/Arasan: Add write delay and voltage/clock config
>   Platform/RaspberryPi/Arasan: Select the correct base frequency
>   Platform/RaspberryPi: Power up SD, and tweak GPIOs
>   Platform/RaspberryPi: Correct device path removal.
> 
>  .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c    | 131 ++++++++---
>  .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h    |   1 +
>  Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c |   7 +
>  .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c        | 240 ++++++++++++++++++++-
>  .../RaspberryPi/Include/IndustryStandard/RpiMbox.h |  94 +++++++-
>  .../RaspberryPi/Include/Protocol/RpiFirmware.h     |  25 +++
>  .../Library/PlatformBootManagerLib/PlatformBm.c    |   2 +-
>  .../Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h |  42 ++--
>  8 files changed, 484 insertions(+), 58 deletions(-)
> 

Re: [PATCH v4 0/7] rpi4: Enable eMMC2 controller

[Andrei Warkentin]

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Ard: IIRC eMMC2 is a better SDHCI-like controller. It supports more high-speed modes (e.g. 1.8V ones), resulting in better I/O performance,

A
________________________________
From: Ard Biesheuvel <ard.biesheuvel@arm.com>
Sent: Wednesday, January 6, 2021 3:11 AM
To: Jeremy Linton <jeremy.linton@arm.com>; devel@edk2.groups.io <devel@edk2.groups.io>
Cc: leif@nuviainc.com <leif@nuviainc.com>; pete@akeo.ie <pete@akeo.ie>; samer.el-haj-mahmoud@arm.com <samer.el-haj-mahmoud@arm.com>; Andrei Warkentin <awarkentin@vmware.com>
Subject: Re: [PATCH v4 0/7] rpi4: Enable eMMC2 controller

On 1/5/21 5:34 PM, Jeremy Linton wrote:
> The rpi4 has a secondary SD controller at offset
> 0xfe340000. This controller appears to be a mostly
> compliant SDHCI controller (a newer more bugfree
> Arasan?). So the existing Arasan driver should be
> bound to it. This allows the rpi4 to boot
> with its normal eMMC2->SD card, Arasan->wifi
> configuration that is described in the Linux DT.
>

Could you please explain why this is an advantage? Is it related to ACPI
OSes not needing to change pinmuxing etc?


> To achieve this, it appears we should be tweaking
> some of the expansion gpios, and probably telling
> the firmware to power everything up. To do that
> the vpu mailbox headers are synced with a more recent
> list of the mailbox commands, then the rpi
> firmware dxe is extended to support some futher
> gpio/power commands. Once that is complete we tweak
> the arasan driver to use an alternate register base,
> add a workaround for a known clock crossing bug, and
> set the card voltage.
>
> Of note, this set does _NOT_ change the HID/CID's
> and add the additional eMMC2 controller to the
> DSDT table. That remains an open item waiting
> for a proper set of device ids.
>
> v3->v4: Commit message tweaks, variable rename.
> v1->v3: Use some mailbox defines rather than opencoded constants
>
> Jeremy Linton (7):
>   Platform/RaspberryPi: Update VPU mailbox constants
>   Platform/RaspberryPi: Add further mailbox helpers
>   Platform/RaspberryPi: Split MMC register definitions
>   Platform/RaspberryPi/Arasan: Add write delay and voltage/clock config
>   Platform/RaspberryPi/Arasan: Select the correct base frequency
>   Platform/RaspberryPi: Power up SD, and tweak GPIOs
>   Platform/RaspberryPi: Correct device path removal.
>
>  .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c    | 131 ++++++++---
>  .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h    |   1 +
>  Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c |   7 +
>  .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c        | 240 ++++++++++++++++++++-
>  .../RaspberryPi/Include/IndustryStandard/RpiMbox.h |  94 +++++++-
>  .../RaspberryPi/Include/Protocol/RpiFirmware.h     |  25 +++
>  .../Library/PlatformBootManagerLib/PlatformBm.c    |   2 +-
>  .../Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h |  42 ++--
>  8 files changed, 484 insertions(+), 58 deletions(-)
>


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Re: [edk2-devel] [PATCH v4 0/7] rpi4: Enable eMMC2 controller

[Jeremy Linton]

Hi,

On 1/6/21 3:11 AM, Ard Biesheuvel via groups.io wrote:
> On 1/5/21 5:34 PM, Jeremy Linton wrote:
>> The rpi4 has a secondary SD controller at offset
>> 0xfe340000. This controller appears to be a mostly
>> compliant SDHCI controller (a newer more bugfree
>> Arasan?). So the existing Arasan driver should be
>> bound to it. This allows the rpi4 to boot
>> with its normal eMMC2->SD card, Arasan->wifi
>> configuration that is described in the Linux DT.
>>
> 
> Could you please explain why this is an advantage? Is it related to ACPI
> OSes not needing to change pinmuxing etc?

As Andrei mentions, there is a perf advantage to having the SD on the 
"emmc", but IMHO a larger issue is that we don't appear to have 
sufficient information to get the SDIO/Wifi routed properly to the 
emmc2. Meaning the only way I've been able to get the wifi to work is 
when its attached to the "arasan". That is true for both DT, and ACPI. 
The latter of course is working and I will hopefully post those fairly 
trivial changes RSN.

Further, this set fixes a rather annoying bug in the current firmware, 
that if the controller is changed to "emmc" in the BDS, then the machine 
is forever stuck, unable to persist any further uefi variable changes.

BTW: For those not on discord, these controllers actually seem to be 
working with the linux sdhci_acpi driver, when the standard PNP id is 
used. Which is a pretty large victory in itself, but that driver doesn't 
have the write delay quirking, or the cmd12 quirking so it throws a 
number of warnings when using the wifi in ACPI mode. So, the best plan 
appears to be a custom HID, and adding the acpi bindings to the 
sdhci_iproc driver which contains those quirks.

> 
> 
>> To achieve this, it appears we should be tweaking
>> some of the expansion gpios, and probably telling
>> the firmware to power everything up. To do that
>> the vpu mailbox headers are synced with a more recent
>> list of the mailbox commands, then the rpi
>> firmware dxe is extended to support some futher
>> gpio/power commands. Once that is complete we tweak
>> the arasan driver to use an alternate register base,
>> add a workaround for a known clock crossing bug, and
>> set the card voltage.
>>
>> Of note, this set does _NOT_ change the HID/CID's
>> and add the additional eMMC2 controller to the
>> DSDT table. That remains an open item waiting
>> for a proper set of device ids.
>>
>> v3->v4: Commit message tweaks, variable rename.
>> v1->v3: Use some mailbox defines rather than opencoded constants
>>
>> Jeremy Linton (7):
>>    Platform/RaspberryPi: Update VPU mailbox constants
>>    Platform/RaspberryPi: Add further mailbox helpers
>>    Platform/RaspberryPi: Split MMC register definitions
>>    Platform/RaspberryPi/Arasan: Add write delay and voltage/clock config
>>    Platform/RaspberryPi/Arasan: Select the correct base frequency
>>    Platform/RaspberryPi: Power up SD, and tweak GPIOs
>>    Platform/RaspberryPi: Correct device path removal.
>>
>>   .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c    | 131 ++++++++---
>>   .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h    |   1 +
>>   Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c |   7 +
>>   .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c        | 240 ++++++++++++++++++++-
>>   .../RaspberryPi/Include/IndustryStandard/RpiMbox.h |  94 +++++++-
>>   .../RaspberryPi/Include/Protocol/RpiFirmware.h     |  25 +++
>>   .../Library/PlatformBootManagerLib/PlatformBm.c    |   2 +-
>>   .../Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h |  42 ++--
>>   8 files changed, 484 insertions(+), 58 deletions(-)
>>
> 
> 
> 
> 
> 
>