* [PATCH v5 01/23] ArmPkg: Add ARM SMC Architecture functions to ArmStdSmc.h
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-04 22:58 ` [PATCH v5 02/23] MdePkg: Update IndustryStandard/SmBios.h with processor status data Rebecca Cran
` (22 subsequent siblings)
23 siblings, 0 replies; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu, Sami Mujawar
The ARM SMC Architecture functions were missing from ArmStdSmc.h.
Add them, based on the SMC Calling Convention version 1.2 specification.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---
ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
index 3509eb680f18..9e0a3a3960d5 100644
--- a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
+++ b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
@@ -1,9 +1,13 @@
/** @file
*
+* Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
* Copyright (c) 2012-2017, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
+* @par Revision Reference:
+* - SMC Calling Convention version 1.2
+* (https://developer.arm.com/documentation/den0028/c/?lang=en)
**/
#ifndef __ARM_STD_SMC_H__
@@ -52,6 +56,18 @@
#define ARM_SMC_MM_RET_DENIED -3
#define ARM_SMC_MM_RET_NO_MEMORY -4
+// ARM Architecture Calls
+#define SMCCC_VERSION 0x80000000
+#define SMCCC_ARCH_FEATURES 0x80000001
+#define SMCCC_ARCH_SOC_ID 0x80000002
+#define SMCCC_ARCH_WORKAROUND_1 0x80008000
+#define SMCCC_ARCH_WORKAROUND_2 0x80007FFF
+
+#define SMC_ARCH_CALL_SUCCESS 0
+#define SMC_ARCH_CALL_NOT_SUPPORTED -1
+#define SMC_ARCH_CALL_NOT_REQUIRED -2
+#define SMC_ARCH_CALL_INVALID_PARAMETER -3
+
/*
* Power State Coordination Interface (PSCI) calls cover a subset of the
* Standard Service Call range.
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH v5 02/23] MdePkg: Update IndustryStandard/SmBios.h with processor status data
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
2021-01-04 22:58 ` [PATCH v5 01/23] ArmPkg: Add ARM SMC Architecture functions to ArmStdSmc.h Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-04 22:58 ` [PATCH v5 03/23] ArmPkg: Add register encoding definition for MMFR2 Rebecca Cran
` (21 subsequent siblings)
23 siblings, 0 replies; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu, Sami Mujawar
Add a bitfield that describes the structure of the byte in the Status
field of the SMBIOS Type 4 Processor Information table.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Acked-by: Sami Mujawar <sami.mujawar@arm.com>
---
MdePkg/Include/IndustryStandard/SmBios.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h
index 3bc8732eef99..cc023b73692a 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -875,6 +875,19 @@ typedef struct {
UINT16 ProcessorReserved2 :6;
} PROCESSOR_CHARACTERISTIC_FLAGS;
+///
+/// Processor Information - Status
+///
+typedef union {
+ struct {
+ UINT8 CpuStatus :3; ///< Indicates the status of the processor.
+ UINT8 Reserved1 :3; ///< Reserved for future use. Must be set to zero.
+ UINT8 SocketPopulated :1; ///< Indicates if the processor socket is populated or not.
+ UINT8 Reserved2 :1; ///< Reserved for future use. Must be set to zero.
+ } Bits;
+ UINT8 Data;
+} PROCESSOR_STATUS_DATA;
+
typedef struct {
PROCESSOR_SIGNATURE Signature;
PROCESSOR_FEATURE_FLAGS FeatureFlags;
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH v5 03/23] ArmPkg: Add register encoding definition for MMFR2
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
2021-01-04 22:58 ` [PATCH v5 01/23] ArmPkg: Add ARM SMC Architecture functions to ArmStdSmc.h Rebecca Cran
2021-01-04 22:58 ` [PATCH v5 02/23] MdePkg: Update IndustryStandard/SmBios.h with processor status data Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-05 19:34 ` [edk2-devel] " Sami Mujawar
2021-01-10 1:26 ` Leif Lindholm
2021-01-04 22:58 ` [PATCH v5 04/23] ArmPkg: Add helper to read the Memory Model Features Register 2 Rebecca Cran
` (20 subsequent siblings)
23 siblings, 2 replies; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
Add register encoding definition for Memory Model Feature Register 2.
We need to define it here because we build for ARMv8.0, which doesn't
have it.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Include/Chipset/AArch64.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index 0ade5cce91c3..7c2b592f92ee 100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -112,6 +112,10 @@
#define ARM_VECTOR_LOW_A32_FIQ 0x700
#define ARM_VECTOR_LOW_A32_SERR 0x780
+// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we
+// build for ARMv8.0, we need to define the register here.
+#define ID_AA64MMFR2_EL1 S3_0_C0_C7_2
+
#define VECTOR_BASE(tbl) \
.section .text.##tbl##,"ax"; \
.align 11; \
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 03/23] ArmPkg: Add register encoding definition for MMFR2
2021-01-04 22:58 ` [PATCH v5 03/23] ArmPkg: Add register encoding definition for MMFR2 Rebecca Cran
@ 2021-01-05 19:34 ` Sami Mujawar
2021-01-10 1:26 ` Leif Lindholm
1 sibling, 0 replies; 55+ messages in thread
From: Sami Mujawar @ 2021-01-05 19:34 UTC (permalink / raw)
To: Rebecca Cran, devel
[-- Attachment #1: Type: text/plain, Size: 78 bytes --]
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Regards,
Sami Mujawar
[-- Attachment #2: Type: text/html, Size: 100 bytes --]
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH v5 03/23] ArmPkg: Add register encoding definition for MMFR2
2021-01-04 22:58 ` [PATCH v5 03/23] ArmPkg: Add register encoding definition for MMFR2 Rebecca Cran
2021-01-05 19:34 ` [edk2-devel] " Sami Mujawar
@ 2021-01-10 1:26 ` Leif Lindholm
1 sibling, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 1:26 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:10 -0700, Rebecca Cran wrote:
> Add register encoding definition for Memory Model Feature Register 2.
> We need to define it here because we build for ARMv8.0, which doesn't
> have it.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
> ---
> ArmPkg/Include/Chipset/AArch64.h | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
> index 0ade5cce91c3..7c2b592f92ee 100644
> --- a/ArmPkg/Include/Chipset/AArch64.h
> +++ b/ArmPkg/Include/Chipset/AArch64.h
> @@ -112,6 +112,10 @@
> #define ARM_VECTOR_LOW_A32_FIQ 0x700
> #define ARM_VECTOR_LOW_A32_SERR 0x780
>
> +// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we
> +// build for ARMv8.0, we need to define the register here.
> +#define ID_AA64MMFR2_EL1 S3_0_C0_C7_2
> +
> #define VECTOR_BASE(tbl) \
> .section .text.##tbl##,"ax"; \
> .align 11; \
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 04/23] ArmPkg: Add helper to read the Memory Model Features Register 2
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (2 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 03/23] ArmPkg: Add register encoding definition for MMFR2 Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-06 8:55 ` [edk2-devel] " Sami Mujawar
2021-01-10 1:23 ` Leif Lindholm
2021-01-04 22:58 ` [PATCH v5 05/23] ArmPkg: Add helper function to read the Memory Model Feature Register 4 Rebecca Cran
` (19 subsequent siblings)
23 siblings, 2 replies; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
Add helper function to read the MMFR2 register. We will need this to
determine CCIDX support.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 11 +++++++++++
ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 3 +++
2 files changed, 14 insertions(+)
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h
index 85bcecda730f..cfc0c878a415 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h
@@ -41,5 +41,16 @@ EFIAPI
ArmReadIdAA64Pfr0 (
VOID
);
+
+/** Reads the ID_AA64MMFR2_EL1 register.
+
+ @return The contents of the ID_AA64MMFR2_EL1 register.
+**/
+UINTN
+EFIAPI
+ArmReadIdAA64Mmfr2 (
+ VOID
+ );
+
#endif // __AARCH64_LIB_H__
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
index 129205d2ac27..d3cc1e86716b 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
@@ -425,6 +425,9 @@ ASM_FUNC(ArmCallWFI)
wfi
ret
+ASM_FUNC(ArmReadIdAA64Mmfr2)
+ mrs x0, ID_AA64MMFR2_EL1 // read EL1 MMFR2
+ ret
ASM_FUNC(ArmReadMpidr)
mrs x0, mpidr_el1 // read EL1 MPIDR
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 04/23] ArmPkg: Add helper to read the Memory Model Features Register 2
2021-01-04 22:58 ` [PATCH v5 04/23] ArmPkg: Add helper to read the Memory Model Features Register 2 Rebecca Cran
@ 2021-01-06 8:55 ` Sami Mujawar
2021-01-10 1:23 ` Leif Lindholm
1 sibling, 0 replies; 55+ messages in thread
From: Sami Mujawar @ 2021-01-06 8:55 UTC (permalink / raw)
To: Rebecca Cran, devel
[-- Attachment #1: Type: text/plain, Size: 78 bytes --]
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Regards,
Sami Mujawar
[-- Attachment #2: Type: text/html, Size: 100 bytes --]
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH v5 04/23] ArmPkg: Add helper to read the Memory Model Features Register 2
2021-01-04 22:58 ` [PATCH v5 04/23] ArmPkg: Add helper to read the Memory Model Features Register 2 Rebecca Cran
2021-01-06 8:55 ` [edk2-devel] " Sami Mujawar
@ 2021-01-10 1:23 ` Leif Lindholm
1 sibling, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 1:23 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:11 -0700, Rebecca Cran wrote:
> Add helper function to read the MMFR2 register. We will need this to
> determine CCIDX support.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
> ---
> ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 11 +++++++++++
> ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 3 +++
> 2 files changed, 14 insertions(+)
>
> diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h
> index 85bcecda730f..cfc0c878a415 100644
> --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h
> +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h
> @@ -41,5 +41,16 @@ EFIAPI
> ArmReadIdAA64Pfr0 (
> VOID
> );
> +
> +/** Reads the ID_AA64MMFR2_EL1 register.
> +
> + @return The contents of the ID_AA64MMFR2_EL1 register.
> +**/
> +UINTN
> +EFIAPI
> +ArmReadIdAA64Mmfr2 (
> + VOID
> + );
> +
> #endif // __AARCH64_LIB_H__
>
> diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> index 129205d2ac27..d3cc1e86716b 100644
> --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> @@ -425,6 +425,9 @@ ASM_FUNC(ArmCallWFI)
> wfi
> ret
>
> +ASM_FUNC(ArmReadIdAA64Mmfr2)
> + mrs x0, ID_AA64MMFR2_EL1 // read EL1 MMFR2
> + ret
>
> ASM_FUNC(ArmReadMpidr)
> mrs x0, mpidr_el1 // read EL1 MPIDR
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 05/23] ArmPkg: Add helper function to read the Memory Model Feature Register 4
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (3 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 04/23] ArmPkg: Add helper to read the Memory Model Features Register 2 Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-10 1:26 ` Leif Lindholm
2021-01-04 22:58 ` [PATCH v5 06/23] ArmPkg: Fix the return type of the ReadCCSIDR function Rebecca Cran
` (18 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu, Sami Mujawar
In AARCH32, CCIDX support is indicated in the MMFR4 register - unlike
under AARCH64 where it's in MMFR2. Add a helper function to read it.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---
ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h | 8 ++++++--
ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S | 4 ++++
ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm | 4 ++++
3 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h
index bb7bda0a3aeb..dcf6723b803b 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h
+++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h
@@ -48,9 +48,13 @@ ArmCleanInvalidateDataCacheEntryBySetWay (
IN UINTN SetWayFormat
);
-UINTN
+/** Reads the ID_MMFR4 register.
+
+ @return The contents of the ID_MMFR4 register.
+**/
+UINT32
EFIAPI
-ArmReadIdPfr0 (
+ArmReadIdMmfr4 (
VOID
);
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
index 01c91b10fcb7..a60a2f634132 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
+++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
@@ -60,6 +60,10 @@ ASM_FUNC(ArmDisableInterrupts)
isb
bx LR
+ASM_FUNC(ArmReadIdMmfr4)
+ mrc p15,0,r0,c0,c2,6 @ Read ID_MMFR4 Register
+ bx lr
+
// UINT32
// ReadCCSIDR (
// IN UINT32 CSSELR
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
index 26ffa331b929..1679b09b797a 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
+++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
@@ -64,6 +64,10 @@
isb
bx LR
+ RVCT_ASM_EXPORT ArmReadIdMmfr4
+ mrc p15,0,r0,c0,c2,6 ; Read ID_MMFR4 Register
+ bx LR
+
// UINT32
// ReadCCSIDR (
// IN UINT32 CSSELR
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH v5 05/23] ArmPkg: Add helper function to read the Memory Model Feature Register 4
2021-01-04 22:58 ` [PATCH v5 05/23] ArmPkg: Add helper function to read the Memory Model Feature Register 4 Rebecca Cran
@ 2021-01-10 1:26 ` Leif Lindholm
0 siblings, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 1:26 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:12 -0700, Rebecca Cran wrote:
> In AARCH32, CCIDX support is indicated in the MMFR4 register - unlike
> under AARCH64 where it's in MMFR2. Add a helper function to read it.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
However, and I say this as someone who usually tells people to split
their patches up: this one could be squashed with the preceding two.
> ---
> ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h | 8 ++++++--
> ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S | 4 ++++
> ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm | 4 ++++
> 3 files changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h
> index bb7bda0a3aeb..dcf6723b803b 100644
> --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h
> +++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h
> @@ -48,9 +48,13 @@ ArmCleanInvalidateDataCacheEntryBySetWay (
> IN UINTN SetWayFormat
> );
>
> -UINTN
> +/** Reads the ID_MMFR4 register.
> +
> + @return The contents of the ID_MMFR4 register.
> +**/
> +UINT32
> EFIAPI
> -ArmReadIdPfr0 (
> +ArmReadIdMmfr4 (
> VOID
> );
>
> diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
> index 01c91b10fcb7..a60a2f634132 100644
> --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
> +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
> @@ -60,6 +60,10 @@ ASM_FUNC(ArmDisableInterrupts)
> isb
> bx LR
>
> +ASM_FUNC(ArmReadIdMmfr4)
> + mrc p15,0,r0,c0,c2,6 @ Read ID_MMFR4 Register
> + bx lr
> +
> // UINT32
> // ReadCCSIDR (
> // IN UINT32 CSSELR
> diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
> index 26ffa331b929..1679b09b797a 100644
> --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
> +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
> @@ -64,6 +64,10 @@
> isb
> bx LR
>
> + RVCT_ASM_EXPORT ArmReadIdMmfr4
> + mrc p15,0,r0,c0,c2,6 ; Read ID_MMFR4 Register
> + bx LR
> +
> // UINT32
> // ReadCCSIDR (
> // IN UINT32 CSSELR
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 06/23] ArmPkg: Fix the return type of the ReadCCSIDR function
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (4 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 05/23] ArmPkg: Add helper function to read the Memory Model Feature Register 4 Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-04 22:58 ` [PATCH v5 07/23] ArmPkg: Update ArmLibPrivate.h with cache register definitions Rebecca Cran
` (17 subsequent siblings)
23 siblings, 0 replies; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu, Sami Mujawar
When CCIDX is supported, the Current Cache Size ID Register contains
data above 32 bits: namely the number of sets. Avoid truncating this
by returning a UINTN instead of UINT32. On AARCH32, the expanded
number of sets data can be read via the CCSIDR2 register.
Also, add Doxygen comments for the function.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
---
ArmPkg/Library/ArmLib/ArmLibPrivate.h | 9 ++++++++-
ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S | 2 +-
ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S | 2 +-
ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm | 2 +-
4 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/ArmPkg/Library/ArmLib/ArmLibPrivate.h b/ArmPkg/Library/ArmLib/ArmLibPrivate.h
index 2e90739eb858..8959bdd9d73c 100644
--- a/ArmPkg/Library/ArmLib/ArmLibPrivate.h
+++ b/ArmPkg/Library/ArmLib/ArmLibPrivate.h
@@ -61,7 +61,14 @@ CPSRRead (
VOID
);
-UINT32
+/** Reads the CCSIDR register for the specified cache.
+
+ @param CSSELR The CSSELR cache selection register value.
+
+ @return The contents of the CCSIDR_EL1 register for the specified cache, when in AARCH64 mode.
+ Returns the contents of the CCSIDR register in AARCH32 mode.
+**/
+UINTN
ReadCCSIDR (
IN UINT32 CSSELR
);
diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
index 0e8d21e2264f..0ae75e4cb9f9 100644
--- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
+++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
@@ -84,7 +84,7 @@ ASM_FUNC(ArmDisableAllExceptions)
ret
-// UINT32
+// UINTN
// ReadCCSIDR (
// IN UINT32 CSSELR
// )
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
index a60a2f634132..af61dbee5261 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
+++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
@@ -64,7 +64,7 @@ ASM_FUNC(ArmReadIdMmfr4)
mrc p15,0,r0,c0,c2,6 @ Read ID_MMFR4 Register
bx lr
-// UINT32
+// UINTN
// ReadCCSIDR (
// IN UINT32 CSSELR
// )
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
index 1679b09b797a..81f3cb79994c 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
+++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
@@ -68,7 +68,7 @@
mrc p15,0,r0,c0,c2,6 ; Read ID_MMFR4 Register
bx LR
-// UINT32
+// UINTN
// ReadCCSIDR (
// IN UINT32 CSSELR
// )
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH v5 07/23] ArmPkg: Update ArmLibPrivate.h with cache register definitions
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (5 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 06/23] ArmPkg: Fix the return type of the ReadCCSIDR function Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-06 9:14 ` [edk2-devel] " Sami Mujawar
2021-01-04 22:58 ` [PATCH v5 08/23] ArmPkg: Add definition of the maximum cache level in ARMv8-A Rebecca Cran
` (16 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
Update the cache definitions in ArmLibPrivate.h based on current
ARMv8 documentation.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
---
ArmPkg/Library/ArmLib/ArmLibPrivate.h | 97 ++++++++++++++++++++
1 file changed, 97 insertions(+)
diff --git a/ArmPkg/Library/ArmLib/ArmLibPrivate.h b/ArmPkg/Library/ArmLib/ArmLibPrivate.h
index 8959bdd9d73c..5d0224080f3f 100644
--- a/ArmPkg/Library/ArmLib/ArmLibPrivate.h
+++ b/ArmPkg/Library/ArmLib/ArmLibPrivate.h
@@ -1,5 +1,7 @@
/** @file
+ ArmLibPrivate.h
+ Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -50,6 +52,101 @@
#define CACHE_ARCHITECTURE_UNIFIED (0UL)
#define CACHE_ARCHITECTURE_SEPARATE (1UL)
+
+/// Defines the structure of the CSSELR (Cache Size Selection) register
+typedef union {
+ struct {
+ UINT32 InD :1; ///< Instruction not Data bit
+ UINT32 Level :3; ///< Cache level (zero based)
+ UINT32 TnD :1; ///< Allocation not Data bit
+ UINT32 Reserved :27; ///< Reserved, RES0
+ } Bits; ///< Bitfield definition of the register
+ UINT32 Data; ///< The entire 32-bit value
+} CSSELR_DATA;
+
+/// The cache type values for the InD field of the CSSELR register
+typedef enum
+{
+ /// Select the data or unified cache
+ CsselrCacheTypeDataOrUnified = 0,
+ /// Select the instruction cache
+ CsselrCacheTypeInstruction,
+ CsselrCacheTypeMax
+} CSSELR_CACHE_TYPE;
+
+/// Defines the structure of the CCSIDR (Current Cache Size ID) register
+typedef union {
+ struct {
+ UINT64 LineSize :3; ///< Line size (Log2(Num bytes in cache) - 4)
+ UINT64 Associativity :10; ///< Associativity - 1
+ UINT64 NumSets :15; ///< Number of sets in the cache -1
+ UINT64 Unknown :4; ///< Reserved, UNKNOWN
+ UINT64 Reserved :32; ///< Reserved, RES0
+ } BitsNonCcidx; ///< Bitfield definition of the register when FEAT_CCIDX is not supported.
+ struct {
+ UINT64 LineSize :3; ///< Line size (Log2(Num bytes in cache) - 4)
+ UINT64 Associativity :21; ///< Associativity - 1
+ UINT64 Reserved1 :8; ///< Reserved, RES0
+ UINT64 NumSets :24; ///< Number of sets in the cache -1
+ UINT64 Reserved2 :8; ///< Reserved, RES0
+ } BitsCcidxAA64; ///< Bitfield definition of the register when FEAT_IDX is supported.
+ struct {
+ UINT64 LineSize : 3;
+ UINT64 Associativity : 21;
+ UINT64 Reserved : 9;
+ UINT64 Unallocated : 32;
+ } BitsCcidxAA32;
+ UINT64 Data; ///< The entire 64-bit value
+} CCSIDR_DATA;
+
+/// Defines the structure of the AARCH32 CCSIDR2 register.
+typedef union {
+ struct {
+ UINT32 NumSets :24; ///< Number of sets in the cache - 1
+ UINT32 Reserved :8; ///< Reserved, RES0
+ } Bits; ///< Bitfield definition of the register
+ UINT32 Data; ///< The entire 32-bit value
+} CSSIDR2_DATA;
+
+/** Defines the structure of the CLIDR (Cache Level ID) register.
+ *
+ * The lower 32 bits are the same for both AARCH32 and AARCH64
+ * so we can use the same structure for both.
+**/
+typedef union {
+ struct {
+ UINT32 Ctype1 : 3; ///< Level 1 cache type
+ UINT32 Ctype2 : 3; ///< Level 2 cache type
+ UINT32 Ctype3 : 3; ///< Level 3 cache type
+ UINT32 Ctype4 : 3; ///< Level 4 cache type
+ UINT32 Ctype5 : 3; ///< Level 5 cache type
+ UINT32 Ctype6 : 3; ///< Level 6 cache type
+ UINT32 Ctype7 : 3; ///< Level 7 cache type
+ UINT32 LoUIS : 3; ///< Level of Unification Inner Shareable
+ UINT32 LoC : 3; ///< Level of Coherency
+ UINT32 LoUU : 3; ///< Level of Unification Uniprocessor
+ UINT32 Icb : 3; ///< Inner Cache Boundary
+ } Bits; ///< Bitfield definition of the register
+ UINT32 Data; ///< The entire 32-bit value
+} CLIDR_DATA;
+
+/// The cache types reported in the CLIDR register.
+typedef enum {
+ /// No cache is present
+ ClidrCacheTypeNone = 0,
+ /// There is only an instruction cache
+ ClidrCacheTypeInstructionOnly,
+ /// There is only a data cache
+ ClidrCacheTypeDataOnly,
+ /// There are separate data and instruction caches
+ ClidrCacheTypeSeparate,
+ /// There is a unified cache
+ ClidrCacheTypeUnified,
+ ClidrCacheTypeMax
+} CLIDR_CACHE_TYPE;
+
+#define CLIDR_GET_CACHE_TYPE(x, level) ((x >> (3 * level)) & 0b111)
+
VOID
CPSRMaskInsert (
IN UINT32 Mask,
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 07/23] ArmPkg: Update ArmLibPrivate.h with cache register definitions
2021-01-04 22:58 ` [PATCH v5 07/23] ArmPkg: Update ArmLibPrivate.h with cache register definitions Rebecca Cran
@ 2021-01-06 9:14 ` Sami Mujawar
0 siblings, 0 replies; 55+ messages in thread
From: Sami Mujawar @ 2021-01-06 9:14 UTC (permalink / raw)
To: Rebecca Cran, devel
[-- Attachment #1: Type: text/plain, Size: 365 bytes --]
Hi Rebecca,
On Mon, Jan 4, 2021 at 02:58 PM, Rebecca Cran wrote:
>
> + struct {
> + UINT64 LineSize : 3;
> + UINT64 Associativity : 21;
> + UINT64 Reserved : 9;
This should be Reserved : 8;
>
> + UINT64 Unallocated : 32;
> + } BitsCcidxAA32;
With that changed,
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Regards,
Sami Mujawar
[-- Attachment #2: Type: text/html, Size: 459 bytes --]
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 08/23] ArmPkg: Add definition of the maximum cache level in ARMv8-A
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (6 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 07/23] ArmPkg: Update ArmLibPrivate.h with cache register definitions Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-04 22:58 ` [PATCH v5 09/23] ArmPkg: Add helper to read CCIDX status Rebecca Cran
` (15 subsequent siblings)
23 siblings, 0 replies; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu, Sami Mujawar
The ARM Architecture Reference Manual for ARMv8-A defines up to
seven levels of cache, L1 through L7.
Define MAX_ARM_CACHE_LEVEL to be 7.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---
ArmPkg/Include/Library/ArmLib.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 26cb05def0a2..fd4f06d24274 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -109,6 +109,10 @@ typedef enum {
#define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId))
#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
+// The ARM Architecture Reference Manual for ARMv8-A defines up
+// to 7 levels of cache, L1 through L7.
+#define MAX_ARM_CACHE_LEVEL 7
+
UINTN
EFIAPI
ArmDataCacheLineLength (
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH v5 09/23] ArmPkg: Add helper to read CCIDX status
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (7 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 08/23] ArmPkg: Add definition of the maximum cache level in ARMv8-A Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-10 1:28 ` Leif Lindholm
2021-01-04 22:58 ` [PATCH v5 10/23] ArmPkg: Add helper to read the CCSIDR2 register Rebecca Cran
` (14 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu, Sami Mujawar
Add a helper function to determine CCIDX support.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
---
ArmPkg/Include/Library/ArmLib.h | 11 +++++++++++
ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 17 +++++++++++++++++
ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c | 17 +++++++++++++++++
3 files changed, 45 insertions(+)
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index fd4f06d24274..70b9d816b74c 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -725,6 +725,17 @@ ArmHasGicSystemRegisters (
VOID
);
+/** Checks if CCIDX is implemented.
+
+ @retval TRUE CCIDX is implemented.
+ @retval FALSE CCIDX is not implemented.
+**/
+BOOLEAN
+EFIAPI
+ArmHasCcidx (
+ VOID
+ );
+
#ifdef MDE_CPU_ARM
///
/// AArch32-only ID Register Helper functions
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
index 53e593bc994b..f0bf897da2a6 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
@@ -87,3 +87,20 @@ ArmHasGicSystemRegisters (
{
return ((ArmReadIdAA64Pfr0 () & AARCH64_PFR0_GIC) != 0);
}
+
+/** Checks if CCIDX is implemented.
+
+ @retval TRUE CCIDX is implemented.
+ @retval FALSE CCIDX is not implemented.
+**/
+BOOLEAN
+EFIAPI
+ArmHasCcidx (
+ VOID
+ )
+{
+ UINTN Mmfr2;
+
+ Mmfr2 = ArmReadIdAA64Mmfr2 ();
+ return (((Mmfr2 >> 20) & 0xF) == 1) ? TRUE : FALSE;
+}
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
index 9f81a7223732..f5f1939c8fa4 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
+++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
@@ -102,3 +102,20 @@ ArmHasSecurityExtensions (
{
return ((ArmReadIdPfr1 () & ARM_PFR1_SEC) != 0);
}
+
+/** Checks if CCIDX is implemented.
+
+ @retval TRUE CCIDX is implemented.
+ @retval FALSE CCIDX is not implemented.
+**/
+BOOLEAN
+EFIAPI
+ArmHasCcidx (
+ VOID
+ )
+{
+ UINTN Mmfr4;
+
+ Mmfr4 = ArmReadIdMmfr4 ();
+ return (((Mmfr4 >> 24) & 0xF) == 1) ? TRUE : FALSE;
+}
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH v5 09/23] ArmPkg: Add helper to read CCIDX status
2021-01-04 22:58 ` [PATCH v5 09/23] ArmPkg: Add helper to read CCIDX status Rebecca Cran
@ 2021-01-10 1:28 ` Leif Lindholm
0 siblings, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 1:28 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:16 -0700, Rebecca Cran wrote:
> Add a helper function to determine CCIDX support.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
> ---
> ArmPkg/Include/Library/ArmLib.h | 11 +++++++++++
> ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 17 +++++++++++++++++
> ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c | 17 +++++++++++++++++
> 3 files changed, 45 insertions(+)
>
> diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
> index fd4f06d24274..70b9d816b74c 100644
> --- a/ArmPkg/Include/Library/ArmLib.h
> +++ b/ArmPkg/Include/Library/ArmLib.h
> @@ -725,6 +725,17 @@ ArmHasGicSystemRegisters (
> VOID
> );
>
> +/** Checks if CCIDX is implemented.
> +
> + @retval TRUE CCIDX is implemented.
> + @retval FALSE CCIDX is not implemented.
> +**/
> +BOOLEAN
> +EFIAPI
> +ArmHasCcidx (
> + VOID
> + );
> +
> #ifdef MDE_CPU_ARM
> ///
> /// AArch32-only ID Register Helper functions
> diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
> index 53e593bc994b..f0bf897da2a6 100644
> --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
> +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
> @@ -87,3 +87,20 @@ ArmHasGicSystemRegisters (
> {
> return ((ArmReadIdAA64Pfr0 () & AARCH64_PFR0_GIC) != 0);
> }
> +
> +/** Checks if CCIDX is implemented.
> +
> + @retval TRUE CCIDX is implemented.
> + @retval FALSE CCIDX is not implemented.
> +**/
> +BOOLEAN
> +EFIAPI
> +ArmHasCcidx (
> + VOID
> + )
> +{
> + UINTN Mmfr2;
> +
> + Mmfr2 = ArmReadIdAA64Mmfr2 ();
> + return (((Mmfr2 >> 20) & 0xF) == 1) ? TRUE : FALSE;
> +}
> diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
> index 9f81a7223732..f5f1939c8fa4 100644
> --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
> +++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
> @@ -102,3 +102,20 @@ ArmHasSecurityExtensions (
> {
> return ((ArmReadIdPfr1 () & ARM_PFR1_SEC) != 0);
> }
> +
> +/** Checks if CCIDX is implemented.
> +
> + @retval TRUE CCIDX is implemented.
> + @retval FALSE CCIDX is not implemented.
> +**/
> +BOOLEAN
> +EFIAPI
> +ArmHasCcidx (
> + VOID
> + )
> +{
> + UINTN Mmfr4;
> +
> + Mmfr4 = ArmReadIdMmfr4 ();
> + return (((Mmfr4 >> 24) & 0xF) == 1) ? TRUE : FALSE;
> +}
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 10/23] ArmPkg: Add helper to read the CCSIDR2 register
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (8 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 09/23] ArmPkg: Add helper to read CCIDX status Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-06 9:55 ` [edk2-devel] " Sami Mujawar
2021-01-10 1:31 ` Leif Lindholm
2021-01-04 22:58 ` [PATCH v5 11/23] ArmPkg: Add Universal/Smbios/ProcessorSubClassDxe Rebecca Cran
` (13 subsequent siblings)
23 siblings, 2 replies; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
Add helper function to read the CCSIDR2 register.
This is used when CCIDX is supported in AARCH32 mode.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Library/ArmLib/ArmLibPrivate.h | 11 +++++++++++
ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S | 10 ++++++++++
ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm | 10 ++++++++++
3 files changed, 31 insertions(+)
diff --git a/ArmPkg/Library/ArmLib/ArmLibPrivate.h b/ArmPkg/Library/ArmLib/ArmLibPrivate.h
index 5d0224080f3f..e0ec065f1f4a 100644
--- a/ArmPkg/Library/ArmLib/ArmLibPrivate.h
+++ b/ArmPkg/Library/ArmLib/ArmLibPrivate.h
@@ -170,6 +170,17 @@ ReadCCSIDR (
IN UINT32 CSSELR
);
+/** Reads the CCSIDR2 for the specified cache.
+
+ @param CSSELR The CSSELR cache selection register value
+
+ @return The contents of the CCSIDR2 register for the specified cache.
+**/
+UINT32
+ReadCCSIDR2 (
+ IN UINT32 CSSELR
+ );
+
UINT32
ReadCLIDR (
VOID
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
index af61dbee5261..8f75f5051083 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
+++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
@@ -74,6 +74,16 @@ ASM_FUNC(ReadCCSIDR)
mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
bx lr
+// UINT32
+// ReadCCSIDR2 (
+// IN UINT32 CSSELR
+// )
+ASM_FUNC(ReadCCSIDR2)
+ mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
+ isb
+ mrc p15,1,r0,c0,c2,0 @ Read current CP15 Cache Size ID Register (CCSIDR2)
+ bx lr
+
// UINT32
// ReadCLIDR (
// IN UINT32 CSSELR
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
index 81f3cb79994c..2fa7a046c0c6 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
+++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
@@ -78,6 +78,16 @@
mrc p15,1,r0,c0,c0,0 ; Read current CP15 Cache Size ID Register (CCSIDR)
bx lr
+// UINT32
+// ReadCCSIDR2 (
+// IN UINT32 CSSELR
+// )
+ RVCT_ASM_EXPORT ReadCCSIDR2
+ mcr p15,2,r0,c0,c0,0 ; Write Cache Size Selection Register (CSSELR)
+ isb
+ mrc p15,1,r0,c0,c2,0 ; Read current CP15 Cache Size ID Register (CCSIDR2)
+ bx lr
+
// UINT32
// ReadCLIDR (
// IN UINT32 CSSELR
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 10/23] ArmPkg: Add helper to read the CCSIDR2 register
2021-01-04 22:58 ` [PATCH v5 10/23] ArmPkg: Add helper to read the CCSIDR2 register Rebecca Cran
@ 2021-01-06 9:55 ` Sami Mujawar
2021-01-10 1:31 ` Leif Lindholm
1 sibling, 0 replies; 55+ messages in thread
From: Sami Mujawar @ 2021-01-06 9:55 UTC (permalink / raw)
To: Rebecca Cran, devel
[-- Attachment #1: Type: text/plain, Size: 513 bytes --]
Hi Rebecca,
On Mon, Jan 4, 2021 at 02:58 PM, Rebecca Cran wrote:
>
> +// UINT32
> +// ReadCCSIDR2 (
> +// IN UINT32 CSSELR
> +// )
> +ASM_FUNC(ReadCCSIDR2)
> + mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
> + isb
> + mrc p15,1,r0,c0,c2,0 @ Read current CP15 Cache Size ID Register
> (CCSIDR2)
I believe the instruction encoding for CCSIDR2 should be mrc p15,1,r0,c0,c0,2
Similar change is needed in ArmLibSupportV7.asm
>
> + bx lr
> +
Regards,
Sami Mujawar
[-- Attachment #2: Type: text/html, Size: 612 bytes --]
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH v5 10/23] ArmPkg: Add helper to read the CCSIDR2 register
2021-01-04 22:58 ` [PATCH v5 10/23] ArmPkg: Add helper to read the CCSIDR2 register Rebecca Cran
2021-01-06 9:55 ` [edk2-devel] " Sami Mujawar
@ 2021-01-10 1:31 ` Leif Lindholm
1 sibling, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 1:31 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:17 -0700, Rebecca Cran wrote:
> Add helper function to read the CCSIDR2 register.
> This is used when CCIDX is supported in AARCH32 mode.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
> ---
> ArmPkg/Library/ArmLib/ArmLibPrivate.h | 11 +++++++++++
> ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S | 10 ++++++++++
> ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm | 10 ++++++++++
> 3 files changed, 31 insertions(+)
>
> diff --git a/ArmPkg/Library/ArmLib/ArmLibPrivate.h b/ArmPkg/Library/ArmLib/ArmLibPrivate.h
> index 5d0224080f3f..e0ec065f1f4a 100644
> --- a/ArmPkg/Library/ArmLib/ArmLibPrivate.h
> +++ b/ArmPkg/Library/ArmLib/ArmLibPrivate.h
> @@ -170,6 +170,17 @@ ReadCCSIDR (
> IN UINT32 CSSELR
> );
>
> +/** Reads the CCSIDR2 for the specified cache.
> +
> + @param CSSELR The CSSELR cache selection register value
> +
> + @return The contents of the CCSIDR2 register for the specified cache.
> +**/
> +UINT32
> +ReadCCSIDR2 (
> + IN UINT32 CSSELR
> + );
> +
> UINT32
> ReadCLIDR (
> VOID
> diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
> index af61dbee5261..8f75f5051083 100644
> --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
> +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S
> @@ -74,6 +74,16 @@ ASM_FUNC(ReadCCSIDR)
> mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
> bx lr
>
> +// UINT32
> +// ReadCCSIDR2 (
> +// IN UINT32 CSSELR
> +// )
> +ASM_FUNC(ReadCCSIDR2)
> + mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
> + isb
> + mrc p15,1,r0,c0,c2,0 @ Read current CP15 Cache Size ID Register (CCSIDR2)
> + bx lr
> +
> // UINT32
> // ReadCLIDR (
> // IN UINT32 CSSELR
> diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
> index 81f3cb79994c..2fa7a046c0c6 100644
> --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
> +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm
> @@ -78,6 +78,16 @@
> mrc p15,1,r0,c0,c0,0 ; Read current CP15 Cache Size ID Register (CCSIDR)
> bx lr
>
> +// UINT32
> +// ReadCCSIDR2 (
> +// IN UINT32 CSSELR
> +// )
> + RVCT_ASM_EXPORT ReadCCSIDR2
> + mcr p15,2,r0,c0,c0,0 ; Write Cache Size Selection Register (CSSELR)
> + isb
> + mrc p15,1,r0,c0,c2,0 ; Read current CP15 Cache Size ID Register (CCSIDR2)
> + bx lr
> +
> // UINT32
> // ReadCLIDR (
> // IN UINT32 CSSELR
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 11/23] ArmPkg: Add Universal/Smbios/ProcessorSubClassDxe
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (9 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 10/23] ArmPkg: Add helper to read the CCSIDR2 register Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-05 22:06 ` [edk2-devel] " Samer El-Haj-Mahmoud
2021-01-04 22:58 ` [PATCH v5 12/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type00 Rebecca Cran
` (12 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
ProcessorSubClassDxe provides SMBIOS CPU information using generic
methods combined with calls into OemMiscLib.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf | 57 ++
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 863 ++++++++++++++++++++
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassStrings.uni | 23 +
3 files changed, 943 insertions(+)
diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
new file mode 100644
index 000000000000..2e99f5d1f50b
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
@@ -0,0 +1,57 @@
+#/** @file
+# ProcessorSubClassDxe.inf
+#
+# Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2015, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = ProcessorSubClass
+ FILE_GUID = f3fe0e33-ea38-4069-9fb5-be23407207c7
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = ProcessorSubClassEntryPoint
+
+[Sources]
+ ProcessorSubClass.c
+ ProcessorSubClassStrings.uni
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmLib
+ ArmSmcLib
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ HiiLib
+ IoLib
+ MemoryAllocationLib
+ OemMiscLib
+ PcdLib
+ PrintLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED
+
+[Pcd]
+ gArmTokenSpaceGuid.PcdProcessorManufacturer
+ gArmTokenSpaceGuid.PcdProcessorVersion
+ gArmTokenSpaceGuid.PcdProcessorSerialNumber
+ gArmTokenSpaceGuid.PcdProcessorAssetTag
+ gArmTokenSpaceGuid.PcdProcessorPartNumber
+
+[Guids]
+
+
+[Depex]
+ gEfiSmbiosProtocolGuid
diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
new file mode 100644
index 000000000000..7bf390b023ba
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
@@ -0,0 +1,863 @@
+/** @file
+ ProcessorSubClass.c
+
+ Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+ Copyright (c) 2015, Linaro Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Protocol/Smbios.h>
+#include <IndustryStandard/ArmStdSmc.h>
+#include <IndustryStandard/SmBios.h>
+#include <Library/ArmLib.h>
+#include <Library/ArmSmcLib.h>
+#include <Library/ArmLib/ArmLibPrivate.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HiiLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/OemMiscLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PrintLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+
+extern UINT8 ProcessorSubClassStrings[];
+
+#define CACHE_SOCKETED_SHIFT 3
+#define CACHE_LOCATION_SHIFT 5
+#define CACHE_ENABLED_SHIFT 7
+#define CACHE_OPERATION_MODE_SHIFT 8
+
+// Sets the HII variable `x` if `pcd` isn't empty
+#define SET_HII_STRING_IF_PCD_NOT_EMPTY(pcd, x) \
+ x##Str = (CHAR16 *)PcdGetPtr (pcd); \
+ if (StrLen (x##Str) > 0) { \
+ HiiSetString (mHiiHandle, x, x##Str, NULL); \
+ } \
+
+typedef enum {
+ CacheModeWriteThrough = 0, ///< Cache is write-through
+ CacheModeWriteBack, ///< Cache is write-back
+ CacheModeVariesWithAddress, ///< Cache mode varies by address
+ CacheModeUnknown, ///< Cache mode is unknown
+ CacheModeMax
+} CACHE_OPERATION_MODE;
+
+typedef enum {
+ CacheLocationInternal = 0, ///< Cache is internal to the processor
+ CacheLocationExternal, ///< Cache is external to the processor
+ CacheLocationReserved, ///< Reserved
+ CacheLocationUnknown, ///< Cache location is unknown
+ CacheLocationMax
+} CACHE_LOCATION;
+
+EFI_HII_HANDLE mHiiHandle;
+
+EFI_SMBIOS_PROTOCOL *mSmbios;
+
+SMBIOS_TABLE_TYPE4 mSmbiosProcessorTableTemplate = {
+ { // Hdr
+ EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // Type
+ sizeof (SMBIOS_TABLE_TYPE4), // Length
+ 0 // Handle
+ },
+ 1, // Socket
+ CentralProcessor, // ProcessorType
+ ProcessorFamilyIndicatorFamily2, // ProcessorFamily
+ 2, // ProcessorManufacture
+ { // ProcessorId
+ { // Signature
+ 0
+ },
+ { // FeatureFlags
+ 0
+ }
+ },
+ 3, // ProcessorVersion
+ { // Voltage
+ 0
+ },
+ 0, // ExternalClock
+ 0, // MaxSpeed
+ 0, // CurrentSpeed
+ 0, // Status
+ ProcessorUpgradeUnknown, // ProcessorUpgrade
+ 0xFFFF, // L1CacheHandle
+ 0xFFFF, // L2CacheHandle
+ 0xFFFF, // L3CacheHandle
+ 4, // SerialNumber
+ 5, // AssetTag
+ 6, // PartNumber
+ 0, // CoreCount
+ 0, //EnabledCoreCount
+ 0, // ThreadCount
+ 0, // ProcessorCharacteristics
+ ProcessorFamilyARM, // ProcessorFamily2
+ 0, // CoreCount2
+ 0, // EnabledCoreCount2
+ 0 // ThreadCount2
+};
+
+
+/** Fetches the specified processor's frequency in Hz.
+
+ @param ProcessorNumber The processor number
+
+ @return The clock frequency in MHz
+
+**/
+UINT16
+GetCpuFrequency (
+ IN UINT8 ProcessorNumber
+ )
+{
+ return (UINT16)(OemGetCpuFreq (ProcessorNumber) / 1000 / 1000);
+}
+
+/** Gets a description of the specified cache.
+
+ @param[in] CacheLevel Zero-based cache level (e.g. L1 cache is 0)
+ @param[in] InstructionOrUnifiedCache Whether this is an instruction or unified
+ cache, or a data cache
+ @param[out] CacheSocketStr The description of the specified cache
+
+ @return The number of Unicode characters in CacheSocketStr not including the
+ terminating NUL
+**/
+UINTN
+GetCacheSocketStr (
+ IN UINT8 CacheLevel,
+ IN BOOLEAN InstructionOrUnifiedCache,
+ OUT CHAR16 *CacheSocketStr
+ )
+{
+ UINTN CacheSocketStrLen;
+
+ if (CacheLevel == CpuCacheL1
+ && InstructionOrUnifiedCache) {
+ CacheSocketStrLen = UnicodeSPrint (
+ CacheSocketStr,
+ SMBIOS_STRING_MAX_LENGTH - 1,
+ L"L%x Instruction Cache",
+ CacheLevel + 1);
+ } else if (CacheLevel == CpuCacheL1 && !InstructionOrUnifiedCache) {
+ CacheSocketStrLen = UnicodeSPrint (CacheSocketStr,
+ SMBIOS_STRING_MAX_LENGTH - 1,
+ L"L%x Data Cache",
+ CacheLevel + 1);
+ } else {
+ CacheSocketStrLen = UnicodeSPrint (CacheSocketStr,
+ SMBIOS_STRING_MAX_LENGTH - 1,
+ L"L%x Cache",
+ CacheLevel + 1);
+ }
+
+ return CacheSocketStrLen;
+}
+
+/** Fills in the Type 7 record with the cache architecture information
+ read from the CPU registers.
+
+ @param[in] CacheLevel Cache level (e.g. L1)
+ @param[in] InstructionOrUnifiedCache Cache type is instruction or
+ unified, not data cache
+ @param[in] CcidxSupported Whether CCIDX is supported
+ @param[in] CacheType The type of cache supported at this cache level
+ @param[out] Type7Record The Type 7 record to fill in
+
+**/
+VOID
+SetCacheArchitectureInformation (
+ IN UINT8 CacheLevel,
+ IN BOOLEAN InstructionOrUnifiedCache,
+ IN BOOLEAN CcidxSupported,
+ IN CLIDR_CACHE_TYPE CacheType,
+ OUT SMBIOS_TABLE_TYPE7 *Type7Record
+ )
+{
+ CSSELR_DATA Csselr;
+ CCSIDR_DATA Ccsidr;
+#if defined(MDE_CPU_ARM)
+ CSSIDR2_DATA Ccsidr2;
+#endif
+ UINT8 Associativity;
+ UINT32 CacheSize32;
+ UINT16 CacheSize16;
+ UINT64 CacheSize64;
+
+ Csselr.Data = 0;
+ Csselr.Bits.Level = CacheLevel;
+
+ if (InstructionOrUnifiedCache) {
+ if (CacheType == ClidrCacheTypeInstructionOnly ||
+ CacheType == ClidrCacheTypeSeparate) {
+
+ Csselr.Bits.InD = CsselrCacheTypeInstruction;
+ Type7Record->SystemCacheType = CacheTypeInstruction;
+ } else {
+ Csselr.Bits.InD = CsselrCacheTypeDataOrUnified;
+ if (CacheType == ClidrCacheTypeDataOnly) {
+ Type7Record->SystemCacheType = CacheTypeData;
+ } else {
+ Type7Record->SystemCacheType = CacheTypeUnified;
+ }
+ }
+ } else {
+ Type7Record->SystemCacheType = CacheTypeData;
+ Csselr.Bits.InD = CsselrCacheTypeDataOrUnified;
+ }
+
+ // Read the CCSIDR register to get the cache architecture
+ Ccsidr.Data = ReadCCSIDR (Csselr.Data);
+
+ if (CcidxSupported) {
+#if defined(MDE_CPU_ARM)
+ Ccsidr2.Data = ReadCCSIDR2 (Csselr.Data);
+ CacheSize64 = (UINT64)(1 << (Ccsidr.BitsCcidxAA32.LineSize + 4)) *
+ (Ccsidr.BitsCcidxAA32.Associativity + 1) *
+ (Ccsidr2.Bits.NumSets + 1);
+ Associativity = Ccsidr.BitsCcidxAA32.Associativity;
+#else
+ CacheSize64 = (UINT64)(1 << (Ccsidr.BitsCcidxAA64.LineSize + 4)) *
+ (Ccsidr.BitsCcidxAA64.Associativity + 1) *
+ (Ccsidr.BitsCcidxAA64.NumSets + 1);
+ Associativity = Ccsidr.BitsCcidxAA64.Associativity;
+#endif
+ } else {
+ CacheSize64 = (1 << (Ccsidr.BitsNonCcidx.LineSize + 4)) *
+ (Ccsidr.BitsNonCcidx.Associativity + 1) *
+ (Ccsidr.BitsNonCcidx.NumSets + 1);
+ Associativity = Ccsidr.BitsNonCcidx.Associativity;
+ }
+
+ CacheSize64 /= 1024; // Minimum granularity is 1K
+
+ // Encode the cache size into the format SMBIOS wants
+ if (CacheSize64 < MAX_INT16) {
+ CacheSize16 = CacheSize64;
+ CacheSize32 = CacheSize16;
+ } else if ((CacheSize64 / 64) < MAX_INT16) {
+ CacheSize16 = (1 << 15) | (CacheSize64 / 64);
+ CacheSize32 = CacheSize16;
+ } else {
+ if ((CacheSize64 / 1024) <= 2047) {
+ CacheSize32 = CacheSize64;
+ } else {
+ CacheSize32 = (1 << 31) | (CacheSize64 / 64);
+ }
+
+ CacheSize16 = -1;
+ }
+
+ Type7Record->Associativity = Associativity + 1;
+ Type7Record->MaximumCacheSize = CacheSize16;
+ Type7Record->InstalledSize = CacheSize16;
+ Type7Record->MaximumCacheSize2 = CacheSize32;
+ Type7Record->InstalledSize2 = CacheSize32;
+
+ switch (Associativity + 1) {
+ case 2:
+ Type7Record->Associativity = CacheAssociativity2Way;
+ break;
+ case 4:
+ Type7Record->Associativity = CacheAssociativity4Way;
+ break;
+ case 8:
+ Type7Record->Associativity = CacheAssociativity8Way;
+ break;
+ case 16:
+ Type7Record->Associativity = CacheAssociativity16Way;
+ break;
+ case 12:
+ Type7Record->Associativity = CacheAssociativity12Way;
+ break;
+ case 24:
+ Type7Record->Associativity = CacheAssociativity24Way;
+ break;
+ case 32:
+ Type7Record->Associativity = CacheAssociativity32Way;
+ break;
+ case 48:
+ Type7Record->Associativity = CacheAssociativity48Way;
+ break;
+ case 64:
+ Type7Record->Associativity = CacheAssociativity64Way;
+ break;
+ case 20:
+ Type7Record->Associativity = CacheAssociativity20Way;
+ break;
+ default:
+ Type7Record->Associativity = CacheAssociativityOther;
+ break;
+ }
+
+ Type7Record->CacheConfiguration = (CacheModeUnknown << CACHE_OPERATION_MODE_SHIFT) |
+ (1 << CACHE_ENABLED_SHIFT) |
+ (CacheLocationUnknown << CACHE_LOCATION_SHIFT) |
+ (0 << CACHE_SOCKETED_SHIFT) |
+ CacheLevel;
+}
+
+
+/** Allocates and initializes an SMBIOS_TABLE_TYPE7 structure
+
+ @param[in] CacheLevel The cache level (L1-L7)
+ @param[in] InstructionOrUnifiedCache The cache type is instruction or
+ unified, not a data cache.
+
+ @return A pointer to the Type 7 structure. Returns NULL on failure.
+
+**/
+SMBIOS_TABLE_TYPE7 *
+AllocateAndInitCacheInformation (
+ IN UINT8 CacheLevel,
+ IN BOOLEAN InstructionOrUnifiedCache
+ )
+{
+ SMBIOS_TABLE_TYPE7 *Type7Record;
+ EFI_STRING CacheSocketStr;
+ UINTN CacheSocketStrLen;
+ UINTN StringBufferSize;
+ CHAR8 *OptionalStrStart;
+ UINTN TableSize;
+
+ // Allocate and fetch the cache description
+ StringBufferSize = sizeof (CHAR16) * SMBIOS_STRING_MAX_LENGTH;
+ CacheSocketStr = AllocateZeroPool (StringBufferSize);
+ if (CacheSocketStr == NULL) {
+ return NULL;
+ }
+
+ CacheSocketStrLen = GetCacheSocketStr (CacheLevel,
+ InstructionOrUnifiedCache,
+ CacheSocketStr);
+
+ TableSize = sizeof (SMBIOS_TABLE_TYPE7) + CacheSocketStrLen + 1 + 1;
+ Type7Record = AllocateZeroPool (TableSize);
+ if (Type7Record == NULL) {
+ FreePool(CacheSocketStr);
+ return NULL;
+ }
+
+ Type7Record->Hdr.Type = EFI_SMBIOS_TYPE_CACHE_INFORMATION;
+ Type7Record->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE7);
+ Type7Record->Hdr.Handle = SMBIOS_HANDLE_PI_RESERVED;
+
+ Type7Record->SocketDesignation = 1;
+
+ Type7Record->SupportedSRAMType.Unknown = 1;
+ Type7Record->CurrentSRAMType.Unknown = 1;
+ Type7Record->CacheSpeed = 0;
+ Type7Record->ErrorCorrectionType = CacheErrorUnknown;
+
+ OptionalStrStart = (CHAR8 *)(Type7Record + 1);
+ UnicodeStrToAsciiStrS (CacheSocketStr, OptionalStrStart, CacheSocketStrLen + 1);
+ FreePool (CacheSocketStr);
+
+ return Type7Record;
+}
+
+
+/**
+ Add Type 7 SMBIOS Record for Cache Information.
+
+ @param[in] ProcessorIndex Processor number of specified processor.
+ @param[out] L1CacheHandle Pointer to the handle of the L1 Cache SMBIOS record.
+ @param[out] L2CacheHandle Pointer to the handle of the L2 Cache SMBIOS record.
+ @param[out] L3CacheHandle Pointer to the handle of the L3 Cache SMBIOS record.
+
+**/
+VOID
+AddSmbiosCacheTypeTable (
+ IN UINTN ProcessorIndex,
+ OUT EFI_SMBIOS_HANDLE *L1CacheHandle,
+ OUT EFI_SMBIOS_HANDLE *L2CacheHandle,
+ OUT EFI_SMBIOS_HANDLE *L3CacheHandle
+ )
+{
+ EFI_STATUS Status;
+ SMBIOS_TABLE_TYPE7 *Type7Record;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ UINT8 CacheLevel;
+ UINT8 CacheSubLevel;
+ CLIDR_DATA Clidr;
+ BOOLEAN CcidxSupported;
+ UINT8 MaxCacheLevel;
+ CLIDR_CACHE_TYPE CacheType;
+
+ Status = EFI_SUCCESS;
+
+ MaxCacheLevel = 0;
+
+ // Read the CLIDR register to find out what caches are present.
+ Clidr.Data = ReadCLIDR ();
+
+ // Get the cache type for the L1 cache. If it's 0, there are no caches.
+ if (CLIDR_GET_CACHE_TYPE (Clidr.Data, 0) == ClidrCacheTypeNone) {
+ return;
+ }
+
+ for (CacheLevel = 1; CacheLevel < MAX_ARM_CACHE_LEVEL; CacheLevel++) {
+ if (CLIDR_GET_CACHE_TYPE (Clidr.Data, CacheLevel) == ClidrCacheTypeNone) {
+ MaxCacheLevel = CacheLevel;
+ break;
+ }
+ }
+
+ CcidxSupported = ArmHasCcidx ();
+
+ for (CacheLevel = 0; CacheLevel < MaxCacheLevel; CacheLevel++) {
+ Type7Record = NULL;
+
+ CacheType = CLIDR_GET_CACHE_TYPE (Clidr.Data, CacheLevel);
+
+ // At each level of cache, we can have a single type (unified, instruction or data),
+ // or two types - separate data and instruction caches. If we have separate
+ // instruction and data caches, then on the first iteration (CacheSubLevel = 0)
+ // process the instruction cache.
+ for (CacheSubLevel = 0; CacheSubLevel <= 1; CacheSubLevel++) {
+ // If there's no separate data/instruction cache, skip the second iteration
+ if (CacheSubLevel > 0 && CacheType != ClidrCacheTypeSeparate) {
+ continue;
+ }
+
+ Type7Record = AllocateAndInitCacheInformation (CacheLevel,
+ (CacheSubLevel == 0));
+ if (Type7Record == NULL) {
+ continue;
+ }
+
+ SetCacheArchitectureInformation(CacheLevel,
+ (CacheSubLevel == 0),
+ CcidxSupported,
+ CacheType,
+ Type7Record);
+
+ // Allow the platform to fill in other information such as speed, SRAM type etc.
+ if (!OemGetCacheInformation (ProcessorIndex, CacheLevel,
+ (CacheSubLevel == 0), Type7Record)) {
+ continue;
+ }
+
+ SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
+ // Finally, install the table
+ Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)Type7Record);
+ if (EFI_ERROR (Status)) {
+ continue;
+ }
+
+ // Config L1/L2/L3 Cache Handle
+ switch (CacheLevel) {
+ case CpuCacheL1:
+ *L1CacheHandle = SmbiosHandle;
+ break;
+ case CpuCacheL2:
+ *L2CacheHandle = SmbiosHandle;
+ break;
+ case CpuCacheL3:
+ *L3CacheHandle = SmbiosHandle;
+ break;
+ default:
+ break;
+ }
+ }
+ }
+}
+
+/** Fills in the Type 4 CPU processor ID field.
+
+ @param[out] Type4Record The SMBIOS Type 4 record to fill in
+
+**/
+VOID
+SetProcessorIdField (
+ OUT SMBIOS_TABLE_TYPE4 *Type4Record
+)
+{
+ ARM_SMC_ARGS Args;
+ INT32 SmcCallStatus;
+ INT32 Jep106Code;
+ INT32 SocRevision;
+ BOOLEAN Arm64SocIdSupported;
+ UINT64 *ProcessorId;
+ PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristicFlags;
+
+ Arm64SocIdSupported = FALSE;
+
+ Args.Arg0 = SMCCC_VERSION;
+ ArmCallSmc (&Args);
+ SmcCallStatus = (INT32)Args.Arg0;
+
+ if (SmcCallStatus < 0 || (SmcCallStatus >> 16) >= 1) {
+ Args.Arg0 = SMCCC_ARCH_FEATURES;
+ Args.Arg1 = SMCCC_ARCH_SOC_ID;
+ ArmCallSmc (&Args);
+
+ if (Args.Arg0 >= 0) {
+ ProcessorCharacteristicFlags =
+ (PROCESSOR_CHARACTERISTIC_FLAGS*)&Type4Record->ProcessorCharacteristics;
+ Args.Arg0 = SMCCC_ARCH_SOC_ID;
+ Args.Arg1 = 0;
+ ArmCallSmc (&Args);
+ SmcCallStatus = (int)Args.Arg0;
+
+ if (SmcCallStatus >= 0) {
+ Arm64SocIdSupported = TRUE;
+ ProcessorCharacteristicFlags->ProcessorArm64SocId = 1;
+ Jep106Code = (int)Args.Arg0;
+ } else {
+ ProcessorCharacteristicFlags->ProcessorArm64SocId = 0;
+ }
+ Args.Arg0 = SMCCC_ARCH_SOC_ID;
+ Args.Arg1 = 1;
+ ArmCallSmc (&Args);
+ SmcCallStatus = (int)Args.Arg0;
+
+ if (SmcCallStatus >= 0) {
+ SocRevision = (int)Args.Arg0;
+ }
+ }
+ }
+
+ ProcessorId = (UINT64 *)&Type4Record->ProcessorId;
+
+ if (Arm64SocIdSupported) {
+ *ProcessorId = ((UINT64)Jep106Code << 32) | SocRevision;
+ } else {
+ *ProcessorId = ArmReadMidr ();
+ }
+}
+
+
+/** Allocates a Type 4 Processor Information structure and sets the
+ strings following the data fields.
+
+ @param[out] Type4Record The Type 4 structure to allocate and initialize
+ @param[in] ProcessorIndex The index of the processor socket
+ @param[in] Populated Whether the specified processor socket is
+ populated.
+
+ @retval EFI_SUCCESS The Type 4 structure was successfully
+ allocated and the strings initialized.
+ @retval EFI_OUT_OF_RESOURCES Could not allocate memory needed.
+**/
+EFI_STATUS
+AllocateType4AndSetProcessorInformationStrings (
+ SMBIOS_TABLE_TYPE4 **Type4Record,
+ UINT8 ProcessorIndex,
+ BOOLEAN Populated
+ )
+{
+ EFI_STATUS Status;
+ EFI_STRING_ID ProcessorManu;
+ EFI_STRING_ID ProcessorVersion;
+ EFI_STRING_ID SerialNumber;
+ EFI_STRING_ID AssetTag;
+ EFI_STRING_ID PartNumber;
+ EFI_STRING ProcessorSocketStr;
+ EFI_STRING ProcessorManuStr;
+ EFI_STRING ProcessorVersionStr;
+ EFI_STRING SerialNumberStr;
+ EFI_STRING AssetTagStr;
+ EFI_STRING PartNumberStr;
+ CHAR8 *OptionalStrStart;
+ CHAR8 *StrStart;
+ UINTN ProcessorSocketStrLen;
+ UINTN ProcessorManuStrLen;
+ UINTN ProcessorVersionStrLen;
+ UINTN SerialNumberStrLen;
+ UINTN AssetTagStrLen;
+ UINTN PartNumberStrLen;
+ UINTN TotalSize;
+ UINTN StringBufferSize;
+
+ Status = EFI_SUCCESS;
+
+ ProcessorManuStr = NULL;
+ ProcessorVersionStr = NULL;
+ SerialNumberStr = NULL;
+ AssetTagStr = NULL;
+ PartNumberStr = NULL;
+
+ if (Populated) {
+ ProcessorManu = STRING_TOKEN (STR_PROCESSOR_MANUFACTURE);
+ ProcessorVersion = STRING_TOKEN (STR_PROCESSOR_VERSION);
+ SerialNumber = STRING_TOKEN (STR_PROCESSOR_SERIAL_NUMBER);
+ AssetTag = STRING_TOKEN (STR_PROCESSOR_ASSET_TAG);
+ PartNumber = STRING_TOKEN (STR_PROCESSOR_PART_NUMBER);
+
+ SET_HII_STRING_IF_PCD_NOT_EMPTY(PcdProcessorManufacturer, ProcessorManu);
+ SET_HII_STRING_IF_PCD_NOT_EMPTY(PcdProcessorVersion, ProcessorVersion);
+ SET_HII_STRING_IF_PCD_NOT_EMPTY(PcdProcessorSerialNumber, SerialNumber);
+ SET_HII_STRING_IF_PCD_NOT_EMPTY(PcdProcessorAssetTag, AssetTag);
+ SET_HII_STRING_IF_PCD_NOT_EMPTY(PcdProcessorPartNumber, PartNumber);
+ } else {
+ ProcessorManu = STRING_TOKEN (STR_PROCESSOR_UNKNOWN);
+ ProcessorVersion = STRING_TOKEN (STR_PROCESSOR_UNKNOWN);
+ SerialNumber = STRING_TOKEN (STR_PROCESSOR_UNKNOWN);
+ AssetTag = STRING_TOKEN (STR_PROCESSOR_UNKNOWN);
+ PartNumber = STRING_TOKEN (STR_PROCESSOR_UNKNOWN);
+ }
+
+ // Processor Socket Designation
+ StringBufferSize = sizeof (CHAR16) * SMBIOS_STRING_MAX_LENGTH;
+ ProcessorSocketStr = AllocateZeroPool (StringBufferSize);
+ if (ProcessorSocketStr == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ ProcessorSocketStrLen = UnicodeSPrint (ProcessorSocketStr, StringBufferSize,
+ L"CPU%02d", ProcessorIndex + 1);
+
+ // Processor Manufacture
+ ProcessorManuStr = HiiGetPackageString (&gEfiCallerIdGuid, ProcessorManu, NULL);
+ ProcessorManuStrLen = StrLen (ProcessorManuStr);
+
+ // Processor Version
+ ProcessorVersionStr = HiiGetPackageString (&gEfiCallerIdGuid, ProcessorVersion, NULL);
+ ProcessorVersionStrLen = StrLen (ProcessorVersionStr);
+
+ // Serial Number
+ SerialNumberStr = HiiGetPackageString (&gEfiCallerIdGuid, SerialNumber, NULL);
+ SerialNumberStrLen = StrLen (SerialNumberStr);
+
+ // Asset Tag
+ AssetTagStr = HiiGetPackageString (&gEfiCallerIdGuid, AssetTag, NULL);
+ AssetTagStrLen = StrLen (AssetTagStr);
+
+ // Part Number
+ PartNumberStr = HiiGetPackageString (&gEfiCallerIdGuid, PartNumber, NULL);
+ PartNumberStrLen = StrLen (PartNumberStr);
+
+ TotalSize = sizeof (SMBIOS_TABLE_TYPE4) +
+ ProcessorSocketStrLen + 1 +
+ ProcessorManuStrLen + 1 +
+ ProcessorVersionStrLen + 1 +
+ SerialNumberStrLen + 1 +
+ AssetTagStrLen + 1 +
+ PartNumberStrLen + 1 + 1;
+
+ *Type4Record = AllocateZeroPool (TotalSize);
+ if (*Type4Record == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Exit;
+ }
+
+ CopyMem (*Type4Record, &mSmbiosProcessorTableTemplate, sizeof (SMBIOS_TABLE_TYPE4));
+
+ OptionalStrStart = (CHAR8 *)(*Type4Record + 1);
+ UnicodeStrToAsciiStrS (
+ ProcessorSocketStr,
+ OptionalStrStart,
+ ProcessorSocketStrLen + 1
+ );
+
+ StrStart = OptionalStrStart + ProcessorSocketStrLen + 1;
+ UnicodeStrToAsciiStrS (
+ ProcessorManuStr,
+ StrStart,
+ ProcessorManuStrLen + 1
+ );
+
+ StrStart += ProcessorManuStrLen + 1;
+ UnicodeStrToAsciiStrS (
+ ProcessorVersionStr,
+ StrStart,
+ ProcessorVersionStrLen + 1
+ );
+
+ StrStart += ProcessorVersionStrLen + 1;
+ UnicodeStrToAsciiStrS (
+ SerialNumberStr,
+ StrStart,
+ SerialNumberStrLen + 1
+ );
+
+ StrStart += SerialNumberStrLen + 1;
+ UnicodeStrToAsciiStrS (
+ AssetTagStr,
+ StrStart,
+ AssetTagStrLen + 1
+ );
+
+ StrStart += AssetTagStrLen + 1;
+ UnicodeStrToAsciiStrS (
+ PartNumberStr,
+ StrStart,
+ PartNumberStrLen + 1
+ );
+
+Exit:
+ FreePool (ProcessorSocketStr);
+ FreePool (ProcessorManuStr);
+ FreePool (ProcessorVersionStr);
+ FreePool (SerialNumberStr);
+ FreePool (AssetTagStr);
+ FreePool (PartNumberStr);
+
+ return Status;
+}
+
+/**
+ Add Type 4 SMBIOS Record for Processor Information.
+
+ @param[in] ProcessorIndex Processor index of specified processor.
+
+**/
+EFI_STATUS
+AddSmbiosProcessorTypeTable (
+ IN UINTN ProcessorIndex
+ )
+{
+ EFI_STATUS Status;
+ SMBIOS_TABLE_TYPE4 *Type4Record;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ EFI_SMBIOS_HANDLE L1CacheHandle;
+ EFI_SMBIOS_HANDLE L2CacheHandle;
+ EFI_SMBIOS_HANDLE L3CacheHandle;
+ UINT8 *LegacyVoltage;
+ PROCESSOR_STATUS_DATA ProcessorStatus;
+ MISC_PROCESSOR_DATA MiscProcessorData;
+ BOOLEAN SocketPopulated;
+ UINTN MainIdRegister;
+
+ Type4Record = NULL;
+
+ MiscProcessorData.Voltage = 0;
+ MiscProcessorData.CurrentSpeed = 0;
+ MiscProcessorData.CoreCount = 0;
+ MiscProcessorData.CoresEnabled = 0;
+ MiscProcessorData.ThreadCount = 0;
+ MiscProcessorData.MaxSpeed = 0;
+ L1CacheHandle = 0xFFFF;
+ L2CacheHandle = 0xFFFF;
+ L3CacheHandle = 0xFFFF;
+
+ SocketPopulated = OemIsSocketPresent(ProcessorIndex);
+
+ Status = AllocateType4AndSetProcessorInformationStrings (
+ &Type4Record,
+ ProcessorIndex,
+ SocketPopulated
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ OemGetProcessorInformation (ProcessorIndex,
+ &ProcessorStatus,
+ (PROCESSOR_CHARACTERISTIC_FLAGS*)
+ &Type4Record->ProcessorCharacteristics,
+ &MiscProcessorData);
+
+ if (SocketPopulated) {
+ AddSmbiosCacheTypeTable (ProcessorIndex, &L1CacheHandle,
+ &L2CacheHandle, &L3CacheHandle);
+ }
+
+ LegacyVoltage = (UINT8*)&Type4Record->Voltage;
+
+ *LegacyVoltage = MiscProcessorData.Voltage;
+ Type4Record->CurrentSpeed = MiscProcessorData.CurrentSpeed;
+ Type4Record->MaxSpeed = MiscProcessorData.MaxSpeed;
+ Type4Record->Status = ProcessorStatus.Data;
+ Type4Record->L1CacheHandle = L1CacheHandle;
+ Type4Record->L2CacheHandle = L2CacheHandle;
+ Type4Record->L3CacheHandle = L3CacheHandle;
+ Type4Record->CoreCount = MiscProcessorData.CoreCount;
+ Type4Record->CoreCount2 = MiscProcessorData.CoreCount;
+ Type4Record->EnabledCoreCount = MiscProcessorData.CoresEnabled;
+ Type4Record->EnabledCoreCount2 = MiscProcessorData.CoresEnabled;
+ Type4Record->ThreadCount = MiscProcessorData.ThreadCount;
+ Type4Record->ThreadCount2 = MiscProcessorData.ThreadCount;
+
+ Type4Record->CurrentSpeed = GetCpuFrequency (ProcessorIndex);
+ Type4Record->ExternalClock = (UINT16)(ArmReadCntFrq () / 1000 / 1000);
+
+ SetProcessorIdField (Type4Record);
+
+ MainIdRegister = ArmReadMidr ();
+ if (((MainIdRegister >> 16) & 0xF) < 8) {
+ Type4Record->ProcessorFamily2 = ProcessorFamilyARM;
+ } else {
+ if (sizeof (VOID*) == 4) {
+ Type4Record->ProcessorFamily2 = ProcessorFamilyARMv7;
+ } else {
+ Type4Record->ProcessorFamily2 = ProcessorFamilyARMv8;
+ }
+ }
+
+ SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
+ Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle, (EFI_SMBIOS_TABLE_HEADER *)Type4Record);
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type04 Table Log Failed! %r \n",
+ __FUNCTION__, __LINE__, Status));
+ }
+ FreePool (Type4Record);
+
+ return Status;
+}
+
+/**
+ Standard EFI driver point. This driver locates the ProcessorConfigurationData Variable,
+ if it exists, add the related SMBIOS tables by PI SMBIOS protocol.
+
+ @param ImageHandle Handle for the image of this driver
+ @param SystemTable Pointer to the EFI System Table
+
+ @retval EFI_SUCCESS The data was successfully stored.
+
+**/
+EFI_STATUS
+EFIAPI
+ProcessorSubClassEntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINT32 SocketIndex;
+
+ //
+ // Locate dependent protocols
+ //
+ Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID**)&mSmbios);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol. %r\n", Status));
+ return Status;
+ }
+
+ //
+ // Add our default strings to the HII database. They will be modified later.
+ //
+ mHiiHandle = HiiAddPackages (&gEfiCallerIdGuid,
+ NULL,
+ ProcessorSubClassStrings,
+ NULL,
+ NULL
+ );
+ if (mHiiHandle == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Add SMBIOS tables for populated sockets.
+ //
+ for (SocketIndex = 0; SocketIndex < OemGetProcessorMaxSockets(); SocketIndex++) {
+ Status = AddSmbiosProcessorTypeTable (SocketIndex);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Add Processor Type Table Failed! %r.\n", Status));
+ return Status;
+ }
+ }
+
+ return Status;
+}
diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassStrings.uni b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassStrings.uni
new file mode 100644
index 000000000000..17da6178e88f
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassStrings.uni
@@ -0,0 +1,23 @@
+/** @file
+ SMBIOS Type 4 strings
+
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+ Copyright (c) 2015, Linaro Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+/=#
+
+#langdef en-US "English"
+
+//
+// Processor Information
+//
+#string STR_PROCESSOR_SOCKET_DESIGNATION #language en-US "Not Specified"
+#string STR_PROCESSOR_MANUFACTURE #language en-US "Not Specified"
+#string STR_PROCESSOR_VERSION #language en-US "Not Specified"
+#string STR_PROCESSOR_SERIAL_NUMBER #language en-US "Not Specified"
+#string STR_PROCESSOR_ASSET_TAG #language en-US "Not Specified"
+#string STR_PROCESSOR_PART_NUMBER #language en-US "Not Specified"
+#string STR_PROCESSOR_UNKNOWN #language en-US "Unknown"
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 11/23] ArmPkg: Add Universal/Smbios/ProcessorSubClassDxe
2021-01-04 22:58 ` [PATCH v5 11/23] ArmPkg: Add Universal/Smbios/ProcessorSubClassDxe Rebecca Cran
@ 2021-01-05 22:06 ` Samer El-Haj-Mahmoud
0 siblings, 0 replies; 55+ messages in thread
From: Samer El-Haj-Mahmoud @ 2021-01-05 22:06 UTC (permalink / raw)
To: devel@edk2.groups.io, rebecca@nuviainc.com
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu, Samer El-Haj-Mahmoud
Thanks for implementing the SMCCC SoCID!!
Reviewed-By: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Rebecca
> Cran via groups.io
> Sent: Monday, January 4, 2021 5:58 PM
> To: devel@edk2.groups.io
> Cc: Rebecca Cran <rebecca@nuviainc.com>; Leif Lindholm
> <leif@nuviainc.com>; Ard Biesheuvel <Ard.Biesheuvel@arm.com>; Sami
> Mujawar <Sami.Mujawar@arm.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Michael D Kinney
> <michael.d.kinney@intel.com>; Zhiguang Liu <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [PATCH v5 11/23] ArmPkg: Add
> Universal/Smbios/ProcessorSubClassDxe
>
> ProcessorSubClassDxe provides SMBIOS CPU information using generic
> methods combined with calls into OemMiscLib.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
> ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
> | 57 ++
> ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> | 863 ++++++++++++++++++++
>
> ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassStrings.
> uni | 23 +
> 3 files changed, 943 insertions(+)
>
> diff --git
> a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.i
> nf
> b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.i
> nf
> new file mode 100644
> index 000000000000..2e99f5d1f50b
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.
> +++ inf
> @@ -0,0 +1,57 @@
> +#/** @file
> +# ProcessorSubClassDxe.inf
> +#
> +# Copyright (c) 2015, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2015, Linaro Limited. All rights reserved.
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#**/
> +
> +
> +[Defines]
> + INF_VERSION = 1.29
> + BASE_NAME = ProcessorSubClass
> + FILE_GUID = f3fe0e33-ea38-4069-9fb5-be23407207c7
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = ProcessorSubClassEntryPoint
> +
> +[Sources]
> + ProcessorSubClass.c
> + ProcessorSubClassStrings.uni
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> +
> +[LibraryClasses]
> + ArmLib
> + ArmSmcLib
> + BaseLib
> + BaseMemoryLib
> + DebugLib
> + HiiLib
> + IoLib
> + MemoryAllocationLib
> + OemMiscLib
> + PcdLib
> + PrintLib
> + UefiDriverEntryPoint
> +
> +[Protocols]
> + gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED
> +
> +[Pcd]
> + gArmTokenSpaceGuid.PcdProcessorManufacturer
> + gArmTokenSpaceGuid.PcdProcessorVersion
> + gArmTokenSpaceGuid.PcdProcessorSerialNumber
> + gArmTokenSpaceGuid.PcdProcessorAssetTag
> + gArmTokenSpaceGuid.PcdProcessorPartNumber
> +
> +[Guids]
> +
> +
> +[Depex]
> + gEfiSmbiosProtocolGuid
> diff --git
> a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> new file mode 100644
> index 000000000000..7bf390b023ba
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> @@ -0,0 +1,863 @@
> +/** @file
> + ProcessorSubClass.c
> +
> + Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR> Copyright
> + (c) 2015, Hisilicon Limited. All rights reserved.
> + Copyright (c) 2015, Linaro Limited. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include <Uefi.h>
> +#include <Protocol/Smbios.h>
> +#include <IndustryStandard/ArmStdSmc.h> #include
> +<IndustryStandard/SmBios.h> #include <Library/ArmLib.h> #include
> +<Library/ArmSmcLib.h> #include <Library/ArmLib/ArmLibPrivate.h>
> +#include <Library/BaseLib.h> #include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h> #include <Library/HiiLib.h> #include
> +<Library/IoLib.h> #include <Library/MemoryAllocationLib.h> #include
> +<Library/OemMiscLib.h> #include <Library/PcdLib.h> #include
> +<Library/PrintLib.h> #include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +
> +extern UINT8 ProcessorSubClassStrings[];
> +
> +#define CACHE_SOCKETED_SHIFT 3
> +#define CACHE_LOCATION_SHIFT 5
> +#define CACHE_ENABLED_SHIFT 7
> +#define CACHE_OPERATION_MODE_SHIFT 8
> +
> +// Sets the HII variable `x` if `pcd` isn't empty
> +#define SET_HII_STRING_IF_PCD_NOT_EMPTY(pcd, x) \
> + x##Str = (CHAR16 *)PcdGetPtr (pcd); \
> + if (StrLen (x##Str) > 0) { \
> + HiiSetString (mHiiHandle, x, x##Str, NULL); \
> + } \
> +
> +typedef enum {
> + CacheModeWriteThrough = 0, ///< Cache is write-through
> + CacheModeWriteBack, ///< Cache is write-back
> + CacheModeVariesWithAddress, ///< Cache mode varies by address
> + CacheModeUnknown, ///< Cache mode is unknown
> + CacheModeMax
> +} CACHE_OPERATION_MODE;
> +
> +typedef enum {
> + CacheLocationInternal = 0, ///< Cache is internal to the processor
> + CacheLocationExternal, ///< Cache is external to the processor
> + CacheLocationReserved, ///< Reserved
> + CacheLocationUnknown, ///< Cache location is unknown
> + CacheLocationMax
> +} CACHE_LOCATION;
> +
> +EFI_HII_HANDLE mHiiHandle;
> +
> +EFI_SMBIOS_PROTOCOL *mSmbios;
> +
> +SMBIOS_TABLE_TYPE4 mSmbiosProcessorTableTemplate = {
> + { // Hdr
> + EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // Type
> + sizeof (SMBIOS_TABLE_TYPE4), // Length
> + 0 // Handle
> + },
> + 1, // Socket
> + CentralProcessor, // ProcessorType
> + ProcessorFamilyIndicatorFamily2, // ProcessorFamily
> + 2, // ProcessorManufacture
> + { // ProcessorId
> + { // Signature
> + 0
> + },
> + { // FeatureFlags
> + 0
> + }
> + },
> + 3, // ProcessorVersion
> + { // Voltage
> + 0
> + },
> + 0, // ExternalClock
> + 0, // MaxSpeed
> + 0, // CurrentSpeed
> + 0, // Status
> + ProcessorUpgradeUnknown, // ProcessorUpgrade
> + 0xFFFF, // L1CacheHandle
> + 0xFFFF, // L2CacheHandle
> + 0xFFFF, // L3CacheHandle
> + 4, // SerialNumber
> + 5, // AssetTag
> + 6, // PartNumber
> + 0, // CoreCount
> + 0, //EnabledCoreCount
> + 0, // ThreadCount
> + 0, // ProcessorCharacteristics
> + ProcessorFamilyARM, // ProcessorFamily2
> + 0, // CoreCount2
> + 0, // EnabledCoreCount2
> + 0 // ThreadCount2
> +};
> +
> +
> +/** Fetches the specified processor's frequency in Hz.
> +
> + @param ProcessorNumber The processor number
> +
> + @return The clock frequency in MHz
> +
> +**/
> +UINT16
> +GetCpuFrequency (
> + IN UINT8 ProcessorNumber
> + )
> +{
> + return (UINT16)(OemGetCpuFreq (ProcessorNumber) / 1000 / 1000); }
> +
> +/** Gets a description of the specified cache.
> +
> + @param[in] CacheLevel Zero-based cache level (e.g. L1 cache is 0)
> + @param[in] InstructionOrUnifiedCache Whether this is an instruction or
> unified
> + cache, or a data cache
> + @param[out] CacheSocketStr The description of the specified cache
> +
> + @return The number of Unicode characters in CacheSocketStr not
> including the
> + terminating NUL
> +**/
> +UINTN
> +GetCacheSocketStr (
> + IN UINT8 CacheLevel,
> + IN BOOLEAN InstructionOrUnifiedCache,
> + OUT CHAR16 *CacheSocketStr
> + )
> +{
> + UINTN CacheSocketStrLen;
> +
> + if (CacheLevel == CpuCacheL1
> + && InstructionOrUnifiedCache) {
> + CacheSocketStrLen = UnicodeSPrint (
> + CacheSocketStr,
> + SMBIOS_STRING_MAX_LENGTH - 1,
> + L"L%x Instruction Cache",
> + CacheLevel + 1); } else if (CacheLevel ==
> + CpuCacheL1 && !InstructionOrUnifiedCache) {
> + CacheSocketStrLen = UnicodeSPrint (CacheSocketStr,
> + SMBIOS_STRING_MAX_LENGTH - 1,
> + L"L%x Data Cache",
> + CacheLevel + 1); } else {
> + CacheSocketStrLen = UnicodeSPrint (CacheSocketStr,
> + SMBIOS_STRING_MAX_LENGTH - 1,
> + L"L%x Cache",
> + CacheLevel + 1); }
> +
> + return CacheSocketStrLen;
> +}
> +
> +/** Fills in the Type 7 record with the cache architecture information
> + read from the CPU registers.
> +
> + @param[in] CacheLevel Cache level (e.g. L1)
> + @param[in] InstructionOrUnifiedCache Cache type is instruction or
> + unified, not data cache
> + @param[in] CcidxSupported Whether CCIDX is supported
> + @param[in] CacheType The type of cache supported at this cache
> level
> + @param[out] Type7Record The Type 7 record to fill in
> +
> +**/
> +VOID
> +SetCacheArchitectureInformation (
> + IN UINT8 CacheLevel,
> + IN BOOLEAN InstructionOrUnifiedCache,
> + IN BOOLEAN CcidxSupported,
> + IN CLIDR_CACHE_TYPE CacheType,
> + OUT SMBIOS_TABLE_TYPE7 *Type7Record
> + )
> +{
> + CSSELR_DATA Csselr;
> + CCSIDR_DATA Ccsidr;
> +#if defined(MDE_CPU_ARM)
> + CSSIDR2_DATA Ccsidr2;
> +#endif
> + UINT8 Associativity;
> + UINT32 CacheSize32;
> + UINT16 CacheSize16;
> + UINT64 CacheSize64;
> +
> + Csselr.Data = 0;
> + Csselr.Bits.Level = CacheLevel;
> +
> + if (InstructionOrUnifiedCache) {
> + if (CacheType == ClidrCacheTypeInstructionOnly ||
> + CacheType == ClidrCacheTypeSeparate) {
> +
> + Csselr.Bits.InD = CsselrCacheTypeInstruction;
> + Type7Record->SystemCacheType = CacheTypeInstruction;
> + } else {
> + Csselr.Bits.InD = CsselrCacheTypeDataOrUnified;
> + if (CacheType == ClidrCacheTypeDataOnly) {
> + Type7Record->SystemCacheType = CacheTypeData;
> + } else {
> + Type7Record->SystemCacheType = CacheTypeUnified;
> + }
> + }
> + } else {
> + Type7Record->SystemCacheType = CacheTypeData;
> + Csselr.Bits.InD = CsselrCacheTypeDataOrUnified; }
> +
> + // Read the CCSIDR register to get the cache architecture
> + Ccsidr.Data = ReadCCSIDR (Csselr.Data);
> +
> + if (CcidxSupported) {
> +#if defined(MDE_CPU_ARM)
> + Ccsidr2.Data = ReadCCSIDR2 (Csselr.Data);
> + CacheSize64 = (UINT64)(1 << (Ccsidr.BitsCcidxAA32.LineSize + 4)) *
> + (Ccsidr.BitsCcidxAA32.Associativity + 1) *
> + (Ccsidr2.Bits.NumSets + 1);
> + Associativity = Ccsidr.BitsCcidxAA32.Associativity;
> +#else
> + CacheSize64 = (UINT64)(1 << (Ccsidr.BitsCcidxAA64.LineSize + 4)) *
> + (Ccsidr.BitsCcidxAA64.Associativity + 1) *
> + (Ccsidr.BitsCcidxAA64.NumSets + 1);
> + Associativity = Ccsidr.BitsCcidxAA64.Associativity;
> +#endif
> + } else {
> + CacheSize64 = (1 << (Ccsidr.BitsNonCcidx.LineSize + 4)) *
> + (Ccsidr.BitsNonCcidx.Associativity + 1) *
> + (Ccsidr.BitsNonCcidx.NumSets + 1);
> + Associativity = Ccsidr.BitsNonCcidx.Associativity;
> + }
> +
> + CacheSize64 /= 1024; // Minimum granularity is 1K
> +
> + // Encode the cache size into the format SMBIOS wants if
> + (CacheSize64 < MAX_INT16) {
> + CacheSize16 = CacheSize64;
> + CacheSize32 = CacheSize16;
> + } else if ((CacheSize64 / 64) < MAX_INT16) {
> + CacheSize16 = (1 << 15) | (CacheSize64 / 64);
> + CacheSize32 = CacheSize16;
> + } else {
> + if ((CacheSize64 / 1024) <= 2047) {
> + CacheSize32 = CacheSize64;
> + } else {
> + CacheSize32 = (1 << 31) | (CacheSize64 / 64);
> + }
> +
> + CacheSize16 = -1;
> + }
> +
> + Type7Record->Associativity = Associativity + 1;
> + Type7Record->MaximumCacheSize = CacheSize16;
> + Type7Record->InstalledSize = CacheSize16;
> + Type7Record->MaximumCacheSize2 = CacheSize32;
> + Type7Record->InstalledSize2 = CacheSize32;
> +
> + switch (Associativity + 1) {
> + case 2:
> + Type7Record->Associativity = CacheAssociativity2Way;
> + break;
> + case 4:
> + Type7Record->Associativity = CacheAssociativity4Way;
> + break;
> + case 8:
> + Type7Record->Associativity = CacheAssociativity8Way;
> + break;
> + case 16:
> + Type7Record->Associativity = CacheAssociativity16Way;
> + break;
> + case 12:
> + Type7Record->Associativity = CacheAssociativity12Way;
> + break;
> + case 24:
> + Type7Record->Associativity = CacheAssociativity24Way;
> + break;
> + case 32:
> + Type7Record->Associativity = CacheAssociativity32Way;
> + break;
> + case 48:
> + Type7Record->Associativity = CacheAssociativity48Way;
> + break;
> + case 64:
> + Type7Record->Associativity = CacheAssociativity64Way;
> + break;
> + case 20:
> + Type7Record->Associativity = CacheAssociativity20Way;
> + break;
> + default:
> + Type7Record->Associativity = CacheAssociativityOther;
> + break;
> + }
> +
> + Type7Record->CacheConfiguration = (CacheModeUnknown <<
> CACHE_OPERATION_MODE_SHIFT) |
> + (1 << CACHE_ENABLED_SHIFT) |
> + (CacheLocationUnknown << CACHE_LOCATION_SHIFT) |
> + (0 << CACHE_SOCKETED_SHIFT) |
> + CacheLevel; }
> +
> +
> +/** Allocates and initializes an SMBIOS_TABLE_TYPE7 structure
> +
> + @param[in] CacheLevel The cache level (L1-L7)
> + @param[in] InstructionOrUnifiedCache The cache type is instruction or
> + unified, not a data cache.
> +
> + @return A pointer to the Type 7 structure. Returns NULL on failure.
> +
> +**/
> +SMBIOS_TABLE_TYPE7 *
> +AllocateAndInitCacheInformation (
> + IN UINT8 CacheLevel,
> + IN BOOLEAN InstructionOrUnifiedCache
> + )
> +{
> + SMBIOS_TABLE_TYPE7 *Type7Record;
> + EFI_STRING CacheSocketStr;
> + UINTN CacheSocketStrLen;
> + UINTN StringBufferSize;
> + CHAR8 *OptionalStrStart;
> + UINTN TableSize;
> +
> + // Allocate and fetch the cache description StringBufferSize =
> + sizeof (CHAR16) * SMBIOS_STRING_MAX_LENGTH; CacheSocketStr =
> + AllocateZeroPool (StringBufferSize); if (CacheSocketStr == NULL) {
> + return NULL;
> + }
> +
> + CacheSocketStrLen = GetCacheSocketStr (CacheLevel,
> + InstructionOrUnifiedCache,
> + CacheSocketStr);
> +
> + TableSize = sizeof (SMBIOS_TABLE_TYPE7) + CacheSocketStrLen + 1 + 1;
> + Type7Record = AllocateZeroPool (TableSize); if (Type7Record == NULL)
> + {
> + FreePool(CacheSocketStr);
> + return NULL;
> + }
> +
> + Type7Record->Hdr.Type = EFI_SMBIOS_TYPE_CACHE_INFORMATION;
> + Type7Record->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE7);
> + Type7Record->Hdr.Handle = SMBIOS_HANDLE_PI_RESERVED;
> +
> + Type7Record->SocketDesignation = 1;
> +
> + Type7Record->SupportedSRAMType.Unknown = 1;
> + Type7Record->CurrentSRAMType.Unknown = 1; Type7Record-
> >CacheSpeed =
> + 0; Type7Record->ErrorCorrectionType = CacheErrorUnknown;
> +
> + OptionalStrStart = (CHAR8 *)(Type7Record + 1); UnicodeStrToAsciiStrS
> + (CacheSocketStr, OptionalStrStart, CacheSocketStrLen + 1); FreePool
> + (CacheSocketStr);
> +
> + return Type7Record;
> +}
> +
> +
> +/**
> + Add Type 7 SMBIOS Record for Cache Information.
> +
> + @param[in] ProcessorIndex Processor number of specified processor.
> + @param[out] L1CacheHandle Pointer to the handle of the L1 Cache
> SMBIOS record.
> + @param[out] L2CacheHandle Pointer to the handle of the L2 Cache
> SMBIOS record.
> + @param[out] L3CacheHandle Pointer to the handle of the L3 Cache
> SMBIOS record.
> +
> +**/
> +VOID
> +AddSmbiosCacheTypeTable (
> + IN UINTN ProcessorIndex,
> + OUT EFI_SMBIOS_HANDLE *L1CacheHandle,
> + OUT EFI_SMBIOS_HANDLE *L2CacheHandle,
> + OUT EFI_SMBIOS_HANDLE *L3CacheHandle
> + )
> +{
> + EFI_STATUS Status;
> + SMBIOS_TABLE_TYPE7 *Type7Record;
> + EFI_SMBIOS_HANDLE SmbiosHandle;
> + UINT8 CacheLevel;
> + UINT8 CacheSubLevel;
> + CLIDR_DATA Clidr;
> + BOOLEAN CcidxSupported;
> + UINT8 MaxCacheLevel;
> + CLIDR_CACHE_TYPE CacheType;
> +
> + Status = EFI_SUCCESS;
> +
> + MaxCacheLevel = 0;
> +
> + // Read the CLIDR register to find out what caches are present.
> + Clidr.Data = ReadCLIDR ();
> +
> + // Get the cache type for the L1 cache. If it's 0, there are no caches.
> + if (CLIDR_GET_CACHE_TYPE (Clidr.Data, 0) == ClidrCacheTypeNone) {
> + return;
> + }
> +
> + for (CacheLevel = 1; CacheLevel < MAX_ARM_CACHE_LEVEL;
> CacheLevel++) {
> + if (CLIDR_GET_CACHE_TYPE (Clidr.Data, CacheLevel) ==
> ClidrCacheTypeNone) {
> + MaxCacheLevel = CacheLevel;
> + break;
> + }
> + }
> +
> + CcidxSupported = ArmHasCcidx ();
> +
> + for (CacheLevel = 0; CacheLevel < MaxCacheLevel; CacheLevel++) {
> + Type7Record = NULL;
> +
> + CacheType = CLIDR_GET_CACHE_TYPE (Clidr.Data, CacheLevel);
> +
> + // At each level of cache, we can have a single type (unified, instruction or
> data),
> + // or two types - separate data and instruction caches. If we have
> separate
> + // instruction and data caches, then on the first iteration (CacheSubLevel
> = 0)
> + // process the instruction cache.
> + for (CacheSubLevel = 0; CacheSubLevel <= 1; CacheSubLevel++) {
> + // If there's no separate data/instruction cache, skip the second iteration
> + if (CacheSubLevel > 0 && CacheType != ClidrCacheTypeSeparate) {
> + continue;
> + }
> +
> + Type7Record = AllocateAndInitCacheInformation (CacheLevel,
> + (CacheSubLevel == 0));
> + if (Type7Record == NULL) {
> + continue;
> + }
> +
> + SetCacheArchitectureInformation(CacheLevel,
> + (CacheSubLevel == 0),
> + CcidxSupported,
> + CacheType,
> + Type7Record);
> +
> + // Allow the platform to fill in other information such as speed, SRAM
> type etc.
> + if (!OemGetCacheInformation (ProcessorIndex, CacheLevel,
> + (CacheSubLevel == 0), Type7Record)) {
> + continue;
> + }
> +
> + SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
> + // Finally, install the table
> + Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle,
> + (EFI_SMBIOS_TABLE_HEADER *)Type7Record);
> + if (EFI_ERROR (Status)) {
> + continue;
> + }
> +
> + // Config L1/L2/L3 Cache Handle
> + switch (CacheLevel) {
> + case CpuCacheL1:
> + *L1CacheHandle = SmbiosHandle;
> + break;
> + case CpuCacheL2:
> + *L2CacheHandle = SmbiosHandle;
> + break;
> + case CpuCacheL3:
> + *L3CacheHandle = SmbiosHandle;
> + break;
> + default:
> + break;
> + }
> + }
> + }
> +}
> +
> +/** Fills in the Type 4 CPU processor ID field.
> +
> + @param[out] Type4Record The SMBIOS Type 4 record to fill in
> +
> +**/
> +VOID
> +SetProcessorIdField (
> + OUT SMBIOS_TABLE_TYPE4 *Type4Record
> +)
> +{
> + ARM_SMC_ARGS Args;
> + INT32 SmcCallStatus;
> + INT32 Jep106Code;
> + INT32 SocRevision;
> + BOOLEAN Arm64SocIdSupported;
> + UINT64 *ProcessorId;
> + PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristicFlags;
> +
> + Arm64SocIdSupported = FALSE;
> +
> + Args.Arg0 = SMCCC_VERSION;
> + ArmCallSmc (&Args);
> + SmcCallStatus = (INT32)Args.Arg0;
> +
> + if (SmcCallStatus < 0 || (SmcCallStatus >> 16) >= 1) {
> + Args.Arg0 = SMCCC_ARCH_FEATURES;
> + Args.Arg1 = SMCCC_ARCH_SOC_ID;
> + ArmCallSmc (&Args);
> +
> + if (Args.Arg0 >= 0) {
> + ProcessorCharacteristicFlags =
> + (PROCESSOR_CHARACTERISTIC_FLAGS*)&Type4Record-
> >ProcessorCharacteristics;
> + Args.Arg0 = SMCCC_ARCH_SOC_ID;
> + Args.Arg1 = 0;
> + ArmCallSmc (&Args);
> + SmcCallStatus = (int)Args.Arg0;
> +
> + if (SmcCallStatus >= 0) {
> + Arm64SocIdSupported = TRUE;
> + ProcessorCharacteristicFlags->ProcessorArm64SocId = 1;
> + Jep106Code = (int)Args.Arg0;
> + } else {
> + ProcessorCharacteristicFlags->ProcessorArm64SocId = 0;
> + }
> + Args.Arg0 = SMCCC_ARCH_SOC_ID;
> + Args.Arg1 = 1;
> + ArmCallSmc (&Args);
> + SmcCallStatus = (int)Args.Arg0;
> +
> + if (SmcCallStatus >= 0) {
> + SocRevision = (int)Args.Arg0;
> + }
> + }
> + }
> +
> + ProcessorId = (UINT64 *)&Type4Record->ProcessorId;
> +
> + if (Arm64SocIdSupported) {
> + *ProcessorId = ((UINT64)Jep106Code << 32) | SocRevision;
> + } else {
> + *ProcessorId = ArmReadMidr ();
> + }
> +}
> +
> +
> +/** Allocates a Type 4 Processor Information structure and sets the
> + strings following the data fields.
> +
> + @param[out] Type4Record The Type 4 structure to allocate and initialize
> + @param[in] ProcessorIndex The index of the processor socket
> + @param[in] Populated Whether the specified processor socket is
> + populated.
> +
> + @retval EFI_SUCCESS The Type 4 structure was successfully
> + allocated and the strings initialized.
> + @retval EFI_OUT_OF_RESOURCES Could not allocate memory needed.
> +**/
> +EFI_STATUS
> +AllocateType4AndSetProcessorInformationStrings (
> + SMBIOS_TABLE_TYPE4 **Type4Record,
> + UINT8 ProcessorIndex,
> + BOOLEAN Populated
> + )
> +{
> + EFI_STATUS Status;
> + EFI_STRING_ID ProcessorManu;
> + EFI_STRING_ID ProcessorVersion;
> + EFI_STRING_ID SerialNumber;
> + EFI_STRING_ID AssetTag;
> + EFI_STRING_ID PartNumber;
> + EFI_STRING ProcessorSocketStr;
> + EFI_STRING ProcessorManuStr;
> + EFI_STRING ProcessorVersionStr;
> + EFI_STRING SerialNumberStr;
> + EFI_STRING AssetTagStr;
> + EFI_STRING PartNumberStr;
> + CHAR8 *OptionalStrStart;
> + CHAR8 *StrStart;
> + UINTN ProcessorSocketStrLen;
> + UINTN ProcessorManuStrLen;
> + UINTN ProcessorVersionStrLen;
> + UINTN SerialNumberStrLen;
> + UINTN AssetTagStrLen;
> + UINTN PartNumberStrLen;
> + UINTN TotalSize;
> + UINTN StringBufferSize;
> +
> + Status = EFI_SUCCESS;
> +
> + ProcessorManuStr = NULL;
> + ProcessorVersionStr = NULL;
> + SerialNumberStr = NULL;
> + AssetTagStr = NULL;
> + PartNumberStr = NULL;
> +
> + if (Populated) {
> + ProcessorManu = STRING_TOKEN (STR_PROCESSOR_MANUFACTURE);
> + ProcessorVersion = STRING_TOKEN (STR_PROCESSOR_VERSION);
> + SerialNumber = STRING_TOKEN (STR_PROCESSOR_SERIAL_NUMBER);
> + AssetTag = STRING_TOKEN (STR_PROCESSOR_ASSET_TAG);
> + PartNumber = STRING_TOKEN (STR_PROCESSOR_PART_NUMBER);
> +
> + SET_HII_STRING_IF_PCD_NOT_EMPTY(PcdProcessorManufacturer,
> ProcessorManu);
> + SET_HII_STRING_IF_PCD_NOT_EMPTY(PcdProcessorVersion,
> ProcessorVersion);
> + SET_HII_STRING_IF_PCD_NOT_EMPTY(PcdProcessorSerialNumber,
> SerialNumber);
> + SET_HII_STRING_IF_PCD_NOT_EMPTY(PcdProcessorAssetTag, AssetTag);
> + SET_HII_STRING_IF_PCD_NOT_EMPTY(PcdProcessorPartNumber,
> + PartNumber); } else {
> + ProcessorManu = STRING_TOKEN (STR_PROCESSOR_UNKNOWN);
> + ProcessorVersion = STRING_TOKEN (STR_PROCESSOR_UNKNOWN);
> + SerialNumber = STRING_TOKEN (STR_PROCESSOR_UNKNOWN);
> + AssetTag = STRING_TOKEN (STR_PROCESSOR_UNKNOWN);
> + PartNumber = STRING_TOKEN (STR_PROCESSOR_UNKNOWN);
> + }
> +
> + // Processor Socket Designation
> + StringBufferSize = sizeof (CHAR16) * SMBIOS_STRING_MAX_LENGTH;
> + ProcessorSocketStr = AllocateZeroPool (StringBufferSize); if
> + (ProcessorSocketStr == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + ProcessorSocketStrLen = UnicodeSPrint (ProcessorSocketStr,
> StringBufferSize,
> + L"CPU%02d", ProcessorIndex +
> + 1);
> +
> + // Processor Manufacture
> + ProcessorManuStr = HiiGetPackageString (&gEfiCallerIdGuid,
> + ProcessorManu, NULL); ProcessorManuStrLen = StrLen
> + (ProcessorManuStr);
> +
> + // Processor Version
> + ProcessorVersionStr = HiiGetPackageString (&gEfiCallerIdGuid,
> + ProcessorVersion, NULL); ProcessorVersionStrLen = StrLen
> + (ProcessorVersionStr);
> +
> + // Serial Number
> + SerialNumberStr = HiiGetPackageString (&gEfiCallerIdGuid,
> + SerialNumber, NULL); SerialNumberStrLen = StrLen (SerialNumberStr);
> +
> + // Asset Tag
> + AssetTagStr = HiiGetPackageString (&gEfiCallerIdGuid, AssetTag,
> + NULL); AssetTagStrLen = StrLen (AssetTagStr);
> +
> + // Part Number
> + PartNumberStr = HiiGetPackageString (&gEfiCallerIdGuid, PartNumber,
> + NULL); PartNumberStrLen = StrLen (PartNumberStr);
> +
> + TotalSize = sizeof (SMBIOS_TABLE_TYPE4) +
> + ProcessorSocketStrLen + 1 +
> + ProcessorManuStrLen + 1 +
> + ProcessorVersionStrLen + 1 +
> + SerialNumberStrLen + 1 +
> + AssetTagStrLen + 1 +
> + PartNumberStrLen + 1 + 1;
> +
> + *Type4Record = AllocateZeroPool (TotalSize); if (*Type4Record ==
> + NULL) {
> + Status = EFI_OUT_OF_RESOURCES;
> + goto Exit;
> + }
> +
> + CopyMem (*Type4Record, &mSmbiosProcessorTableTemplate, sizeof
> + (SMBIOS_TABLE_TYPE4));
> +
> + OptionalStrStart = (CHAR8 *)(*Type4Record + 1);
> + UnicodeStrToAsciiStrS (
> + ProcessorSocketStr,
> + OptionalStrStart,
> + ProcessorSocketStrLen + 1
> + );
> +
> + StrStart = OptionalStrStart + ProcessorSocketStrLen + 1;
> + UnicodeStrToAsciiStrS (
> + ProcessorManuStr,
> + StrStart,
> + ProcessorManuStrLen + 1
> + );
> +
> + StrStart += ProcessorManuStrLen + 1;
> + UnicodeStrToAsciiStrS (
> + ProcessorVersionStr,
> + StrStart,
> + ProcessorVersionStrLen + 1
> + );
> +
> + StrStart += ProcessorVersionStrLen + 1; UnicodeStrToAsciiStrS (
> + SerialNumberStr,
> + StrStart,
> + SerialNumberStrLen + 1
> + );
> +
> + StrStart += SerialNumberStrLen + 1;
> + UnicodeStrToAsciiStrS (
> + AssetTagStr,
> + StrStart,
> + AssetTagStrLen + 1
> + );
> +
> + StrStart += AssetTagStrLen + 1;
> + UnicodeStrToAsciiStrS (
> + PartNumberStr,
> + StrStart,
> + PartNumberStrLen + 1
> + );
> +
> +Exit:
> + FreePool (ProcessorSocketStr);
> + FreePool (ProcessorManuStr);
> + FreePool (ProcessorVersionStr);
> + FreePool (SerialNumberStr);
> + FreePool (AssetTagStr);
> + FreePool (PartNumberStr);
> +
> + return Status;
> +}
> +
> +/**
> + Add Type 4 SMBIOS Record for Processor Information.
> +
> + @param[in] ProcessorIndex Processor index of specified processor.
> +
> +**/
> +EFI_STATUS
> +AddSmbiosProcessorTypeTable (
> + IN UINTN ProcessorIndex
> + )
> +{
> + EFI_STATUS Status;
> + SMBIOS_TABLE_TYPE4 *Type4Record;
> + EFI_SMBIOS_HANDLE SmbiosHandle;
> + EFI_SMBIOS_HANDLE L1CacheHandle;
> + EFI_SMBIOS_HANDLE L2CacheHandle;
> + EFI_SMBIOS_HANDLE L3CacheHandle;
> + UINT8 *LegacyVoltage;
> + PROCESSOR_STATUS_DATA ProcessorStatus;
> + MISC_PROCESSOR_DATA MiscProcessorData;
> + BOOLEAN SocketPopulated;
> + UINTN MainIdRegister;
> +
> + Type4Record = NULL;
> +
> + MiscProcessorData.Voltage = 0;
> + MiscProcessorData.CurrentSpeed = 0;
> + MiscProcessorData.CoreCount = 0;
> + MiscProcessorData.CoresEnabled = 0;
> + MiscProcessorData.ThreadCount = 0;
> + MiscProcessorData.MaxSpeed = 0;
> + L1CacheHandle = 0xFFFF;
> + L2CacheHandle = 0xFFFF;
> + L3CacheHandle = 0xFFFF;
> +
> + SocketPopulated = OemIsSocketPresent(ProcessorIndex);
> +
> + Status = AllocateType4AndSetProcessorInformationStrings (
> + &Type4Record,
> + ProcessorIndex,
> + SocketPopulated
> + );
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + OemGetProcessorInformation (ProcessorIndex,
> + &ProcessorStatus,
> + (PROCESSOR_CHARACTERISTIC_FLAGS*)
> + &Type4Record->ProcessorCharacteristics,
> + &MiscProcessorData);
> +
> + if (SocketPopulated) {
> + AddSmbiosCacheTypeTable (ProcessorIndex, &L1CacheHandle,
> + &L2CacheHandle, &L3CacheHandle); }
> +
> + LegacyVoltage = (UINT8*)&Type4Record->Voltage;
> +
> + *LegacyVoltage = MiscProcessorData.Voltage;
> + Type4Record->CurrentSpeed = MiscProcessorData.CurrentSpeed;
> + Type4Record->MaxSpeed = MiscProcessorData.MaxSpeed;
> + Type4Record->Status = ProcessorStatus.Data;
> + Type4Record->L1CacheHandle = L1CacheHandle;
> + Type4Record->L2CacheHandle = L2CacheHandle;
> + Type4Record->L3CacheHandle = L3CacheHandle;
> + Type4Record->CoreCount = MiscProcessorData.CoreCount;
> + Type4Record->CoreCount2 = MiscProcessorData.CoreCount;
> + Type4Record->EnabledCoreCount = MiscProcessorData.CoresEnabled;
> + Type4Record->EnabledCoreCount2 = MiscProcessorData.CoresEnabled;
> + Type4Record->ThreadCount = MiscProcessorData.ThreadCount;
> + Type4Record->ThreadCount2 = MiscProcessorData.ThreadCount;
> +
> + Type4Record->CurrentSpeed = GetCpuFrequency (ProcessorIndex);
> + Type4Record->ExternalClock = (UINT16)(ArmReadCntFrq () / 1000 /
> 1000);
> +
> + SetProcessorIdField (Type4Record);
> +
> + MainIdRegister = ArmReadMidr ();
> + if (((MainIdRegister >> 16) & 0xF) < 8) {
> + Type4Record->ProcessorFamily2 = ProcessorFamilyARM; } else {
> + if (sizeof (VOID*) == 4) {
> + Type4Record->ProcessorFamily2 = ProcessorFamilyARMv7;
> + } else {
> + Type4Record->ProcessorFamily2 = ProcessorFamilyARMv8;
> + }
> + }
> +
> + SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED; Status = mSmbios->Add
> + (mSmbios, NULL, &SmbiosHandle, (EFI_SMBIOS_TABLE_HEADER
> + *)Type4Record);
> +
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type04 Table Log Failed! %r
> \n",
> + __FUNCTION__, __LINE__, Status)); } FreePool
> + (Type4Record);
> +
> + return Status;
> +}
> +
> +/**
> + Standard EFI driver point. This driver locates the
> ProcessorConfigurationData Variable,
> + if it exists, add the related SMBIOS tables by PI SMBIOS protocol.
> +
> + @param ImageHandle Handle for the image of this driver
> + @param SystemTable Pointer to the EFI System Table
> +
> + @retval EFI_SUCCESS The data was successfully stored.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +ProcessorSubClassEntryPoint(
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + EFI_STATUS Status;
> + UINT32 SocketIndex;
> +
> + //
> + // Locate dependent protocols
> + //
> + Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL,
> + (VOID**)&mSmbios); if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol. %r\n",
> Status));
> + return Status;
> + }
> +
> + //
> + // Add our default strings to the HII database. They will be modified later.
> + //
> + mHiiHandle = HiiAddPackages (&gEfiCallerIdGuid,
> + NULL,
> + ProcessorSubClassStrings,
> + NULL,
> + NULL
> + );
> + if (mHiiHandle == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + //
> + // Add SMBIOS tables for populated sockets.
> + //
> + for (SocketIndex = 0; SocketIndex < OemGetProcessorMaxSockets();
> SocketIndex++) {
> + Status = AddSmbiosProcessorTypeTable (SocketIndex);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "Add Processor Type Table Failed! %r.\n",
> Status));
> + return Status;
> + }
> + }
> +
> + return Status;
> +}
> diff --git
> a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassStrin
> gs.uni
> b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassStrin
> gs.uni
> new file mode 100644
> index 000000000000..17da6178e88f
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassStri
> +++ ngs.uni
> @@ -0,0 +1,23 @@
> +/** @file
> + SMBIOS Type 4 strings
> +
> + Copyright (c) 2015, Hisilicon Limited. All rights reserved.
> + Copyright (c) 2015, Linaro Limited. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +/=#
> +
> +#langdef en-US "English"
> +
> +//
> +// Processor Information
> +//
> +#string STR_PROCESSOR_SOCKET_DESIGNATION #language en-US "Not
> Specified"
> +#string STR_PROCESSOR_MANUFACTURE #language en-US "Not
> Specified"
> +#string STR_PROCESSOR_VERSION #language en-US "Not Specified"
> +#string STR_PROCESSOR_SERIAL_NUMBER #language en-US "Not
> Specified"
> +#string STR_PROCESSOR_ASSET_TAG #language en-US "Not
> Specified"
> +#string STR_PROCESSOR_PART_NUMBER #language en-US "Not
> Specified"
> +#string STR_PROCESSOR_UNKNOWN #language en-US "Unknown"
> --
> 2.26.2
>
>
>
>
>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 12/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type00
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (10 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 11/23] ArmPkg: Add Universal/Smbios/ProcessorSubClassDxe Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-05 21:42 ` [edk2-devel] " Samer El-Haj-Mahmoud
2021-01-04 22:58 ` [PATCH v5 13/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type01 Rebecca Cran
` (11 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
This code provides information for the SMBIOS Type 0 table.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c | 92 +++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c | 281 ++++++++++++++++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni | 17 ++
3 files changed, 390 insertions(+)
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c
new file mode 100644
index 000000000000..3b0d907c3996
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c
@@ -0,0 +1,92 @@
+/** @file
+ This file provides Smbios Type0 Data
+
+ Based on the files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#include "SmbiosMisc.h"
+
+
+//
+// Static (possibly build generated) Bios Vendor data.
+//
+MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE0, MiscBiosVendor) = {
+ { // Hdr
+ EFI_SMBIOS_TYPE_BIOS_INFORMATION, // Type,
+ 0, // Length,
+ 0 // Handle
+ },
+ 1, // Vendor
+ 2, // BiosVersion
+ 0xE000, // BiosSegment
+ 3, // BiosReleaseDate
+ 0, // BiosSize
+ { // BiosCharacteristics
+ 0, // Reserved :2
+ 0, // Unknown :1
+ 0, // BiosCharacteristicsNotSupported :1
+ 0, // IsaIsSupported :1
+ 0, // McaIsSupported :1
+ 0, // EisaIsSupported :1
+ 1, // PciIsSupported :1
+ 0, // PcmciaIsSupported :1
+ 1, // PlugAndPlayIsSupported :1
+ 0, // ApmIsSupported :1
+ 1, // BiosIsUpgradable :1
+ 1, // BiosShadowingAllowed :1
+ 0, // VlVesaIsSupported :1
+ 0, // EscdSupportIsAvailable :1
+ 1, // BootFromCdIsSupported :1
+ 1, // SelectableBootIsSupported :1
+ 0, // RomBiosIsSocketed :1
+ 0, // BootFromPcmciaIsSupported :1
+ 1, // EDDSpecificationIsSupported :1
+ 0, // JapaneseNecFloppyIsSupported :1
+ 0, // JapaneseToshibaFloppyIsSupported :1
+ 0, // Floppy525_360IsSupported :1
+ 0, // Floppy525_12IsSupported :1
+ 0, // Floppy35_720IsSupported :1
+ 0, // Floppy35_288IsSupported :1
+ 0, // PrintScreenIsSupported :1
+ 0, // Keyboard8042IsSupported :1
+ 0, // SerialIsSupported :1
+ 0, // PrinterIsSupported :1
+ 0, // CgaMonoIsSupported :1
+ 0, // NecPc98 :1
+ 0 // ReservedForVendor :32
+ },
+
+ {
+ 0x03, // BIOSCharacteristicsExtensionBytes[0]
+ // { // BiosReserved
+ // 1, // AcpiIsSupported :1
+ // 1, // UsbLegacyIsSupported :1
+ // 0, // AgpIsSupported :1
+ // 0, // I20BootIsSupported :1
+ // 0, // Ls120BootIsSupported :1
+ // 0, // AtapiZipDriveBootIsSupported :1
+ // 0, // Boot1394IsSupported :1
+ // 0 // SmartBatteryIsSupported :1
+ // },
+ 0x0D //BIOSCharacteristicsExtensionBytes[1]
+ // { //SystemReserved
+ // 1, //BiosBootSpecIsSupported :1
+ // 0, //FunctionKeyNetworkBootIsSupported :1
+ // 1, //TargetContentDistributionEnabled :1
+ // 1, //UefiSpecificationSupported :1
+ // 0, //VirtualMachineSupported :1
+ // 0 //ExtensionByte2Reserved :3
+ // },
+ },
+ 0xFF, // SystemBiosMajorRelease;
+ 0xFF, // SystemBiosMinorRelease;
+ 0xFF, // EmbeddedControllerFirmwareMajorRelease;
+ 0xFF // EmbeddedControllerFirmwareMinorRelease;
+};
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c
new file mode 100644
index 000000000000..4074b10d70f2
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c
@@ -0,0 +1,281 @@
+/** @file
+ This driver parses the mMiscSubclassDataTable structure and reports
+ any generated data to the DataHub.
+
+ Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+typedef struct {
+ CONST CHAR8* MonthStr;
+ UINT32 MonthInt;
+} MONTH_DESCRIPTION;
+
+STATIC CONST
+MONTH_DESCRIPTION mMonthDescription[] = {
+ { "Jan", 1 },
+ { "Feb", 2 },
+ { "Mar", 3 },
+ { "Apr", 4 },
+ { "May", 5 },
+ { "Jun", 6 },
+ { "Jul", 7 },
+ { "Aug", 8 },
+ { "Sep", 9 },
+ { "Oct", 10 },
+ { "Nov", 11 },
+ { "Dec", 12 },
+ { "???", 1 }, // Use 1 as default month
+};
+
+/**
+ Field Filling Function. Transform an EFI_EXP_BASE2_DATA to a byte, with '64k'
+ as the unit.
+
+ @param Value Pointer to Base2_Data
+
+ @retval
+
+**/
+UINT8
+Base2ToByteWith64KUnit (
+ IN UINTN Value
+ )
+{
+ UINT8 Size;
+
+ Size = ((Value + (SIZE_64KB - 1)) >> 16);
+
+ return Size;
+}
+
+/**
+ Returns the date and time this file (and firmware) was built.
+
+ @param[out] *Time Pointer to the EFI_TIME structure to fill in.
+**/
+VOID
+GetReleaseTime (
+ OUT EFI_TIME *Time
+ )
+{
+ CONST CHAR8 *ReleaseDate = __DATE__;
+ CONST CHAR8 *ReleaseTime = __TIME__;
+ UINTN i;
+
+ for (i = 0; i < 12; i++) {
+ if (AsciiStrnCmp (ReleaseDate, mMonthDescription[i].MonthStr, 3) == 0) {
+ break;
+ }
+ }
+
+ Time->Month = mMonthDescription[i].MonthInt;
+ Time->Day = AsciiStrDecimalToUintn (ReleaseDate + 4);
+ Time->Year = AsciiStrDecimalToUintn (ReleaseDate + 7);
+ Time->Hour = AsciiStrDecimalToUintn (ReleaseTime);
+ Time->Minute = AsciiStrDecimalToUintn (ReleaseTime + 3);
+ Time->Second = AsciiStrDecimalToUintn (ReleaseTime + 6);
+}
+
+/**
+ Fetches the firmware ('BIOS') release date from the
+ FirmwareVersionInfo HOB.
+
+ @return The release date as a UTF-16 string
+**/
+CHAR16 *
+GetBiosReleaseDate (
+ VOID
+ )
+{
+ CHAR16 *ReleaseDate;
+ EFI_TIME BuildTime;
+
+ ReleaseDate = AllocateZeroPool ((sizeof (CHAR16)) * SMBIOS_STRING_MAX_LENGTH);
+ if (ReleaseDate == NULL) {
+ return NULL;
+ }
+
+ GetReleaseTime (&BuildTime);
+
+ (VOID)UnicodeSPrintAsciiFormat (ReleaseDate,
+ (sizeof (CHAR16)) * SMBIOS_STRING_MAX_LENGTH,
+ "%02d/%02d/%4d",
+ BuildTime.Month,
+ BuildTime.Day,
+ BuildTime.Year
+ );
+
+ return ReleaseDate;
+}
+
+/**
+ Fetches the firmware ('BIOS') version from the
+ FirmwareVersionInfo HOB.
+
+ @return The version as a UTF-16 string
+**/
+CHAR16 *
+GetBiosVersion (
+ VOID
+ )
+{
+ CHAR16 *ReleaseString;
+
+ ReleaseString =
+ (CHAR16 *)FixedPcdGetPtr (PcdFirmwareVersionString);
+
+ return ReleaseString;
+}
+
+
+/**
+ This function makes boot time changes to the contents of the
+ MiscBiosVendor (Type 0).
+
+ @param RecordData Pointer to copy of RecordData from the Data Table.
+
+ @retval EFI_SUCCESS All parameters were valid.
+ @retval EFI_UNSUPPORTED Unexpected RecordType value.
+ @retval EFI_INVALID_PARAMETER Invalid parameter was found.
+
+**/
+MISC_SMBIOS_TABLE_FUNCTION (MiscBiosVendor)
+{
+ CHAR8 *OptionalStrStart;
+ CHAR8 *StrStart;
+ UINTN VendorStrLen;
+ UINTN VerStrLen;
+ UINTN DateStrLen;
+ UINTN BiosPhysicalSize;
+ CHAR16 *Vendor;
+ CHAR16 *Version;
+ CHAR16 *ReleaseDate;
+ CHAR16 *Char16String;
+ EFI_STATUS Status;
+ EFI_STRING_ID TokenToUpdate;
+ EFI_STRING_ID TokenToGet;
+ SMBIOS_TABLE_TYPE0 *SmbiosRecord;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ SMBIOS_TABLE_TYPE0 *InputData;
+
+ //
+ // First check for invalid parameters.
+ //
+ if (RecordData == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ InputData = (SMBIOS_TABLE_TYPE0 *)RecordData;
+
+ Vendor = (CHAR16 *) PcdGetPtr (PcdFirmwareVendor);
+
+ if (StrLen (Vendor) > 0) {
+ TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VENDOR);
+ HiiSetString (mHiiHandle, TokenToUpdate, Vendor, NULL);
+ }
+
+ Version = GetBiosVersion();
+
+ if (StrLen (Version) > 0) {
+ TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VERSION);
+ HiiSetString (mHiiHandle, TokenToUpdate, Version, NULL);
+ } else {
+ Version = (CHAR16 *) PcdGetPtr (PcdFirmwareVersionString);
+ if (StrLen (Version) > 0) {
+ TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VERSION);
+ HiiSetString (mHiiHandle, TokenToUpdate, Version, NULL);
+ }
+ }
+
+ Char16String = GetBiosReleaseDate ();
+ if (StrLen(Char16String) > 0) {
+ TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_RELEASE_DATE);
+ HiiSetString (mHiiHandle, TokenToUpdate, Char16String, NULL);
+ }
+
+ TokenToGet = STRING_TOKEN (STR_MISC_BIOS_VENDOR);
+ Vendor = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ VendorStrLen = StrLen (Vendor);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_BIOS_VERSION);
+ Version = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ VerStrLen = StrLen (Version);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_BIOS_RELEASE_DATE);
+ ReleaseDate = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ DateStrLen = StrLen (ReleaseDate);
+
+ //
+ // Now update the BiosPhysicalSize
+ //
+ BiosPhysicalSize = FixedPcdGet32 (PcdFdSize);
+
+ //
+ // Two zeros following the last string.
+ //
+ SmbiosRecord = AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE0) + VendorStrLen + 1 +
+ VerStrLen + 1 +
+ DateStrLen + 1 + 1);
+ if (SmbiosRecord == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Exit;
+ }
+
+ (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE0));
+
+ SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE0);
+ SmbiosRecord->BiosSegment = (UINT16)(FixedPcdGet32 (PcdFdBaseAddress) / SIZE_64KB);
+ if (BiosPhysicalSize < SIZE_16MB) {
+ SmbiosRecord->BiosSize = Base2ToByteWith64KUnit (BiosPhysicalSize) - 1;
+ } else {
+ SmbiosRecord->BiosSize = 0xFF;
+ if (BiosPhysicalSize <= 0x3FFF) {
+ SmbiosRecord->ExtendedBiosSize.Size = BiosPhysicalSize / SIZE_1MB;
+ SmbiosRecord->ExtendedBiosSize.Unit = 0; // Size is in MB
+ } else {
+ SmbiosRecord->ExtendedBiosSize.Size = BiosPhysicalSize / SIZE_1GB;
+ SmbiosRecord->ExtendedBiosSize.Unit = 1; // Size is in GB
+ }
+ }
+
+ OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
+ UnicodeStrToAsciiStrS (Vendor, OptionalStrStart, VendorStrLen + 1);
+ StrStart = OptionalStrStart + VendorStrLen + 1;
+ UnicodeStrToAsciiStrS (Version, StrStart, VerStrLen + 1);
+ StrStart += VerStrLen + 1;
+ UnicodeStrToAsciiStrS (ReleaseDate, StrStart, DateStrLen + 1);
+ //
+ // Now we have got the full smbios record, call smbios protocol to add this record.
+ //
+ Status = LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type00 Table Log Failed! %r \n",
+ __FUNCTION__, __LINE__, Status));
+ }
+
+ FreePool (SmbiosRecord);
+
+Exit:
+ if (Vendor != NULL) {
+ FreePool (Vendor);
+ }
+
+ if (Version != NULL) {
+ FreePool (Version);
+ }
+
+ if (ReleaseDate != NULL) {
+ FreePool (ReleaseDate);
+ }
+
+ if (Char16String != NULL) {
+ FreePool (Char16String);
+ }
+
+ return Status;
+}
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni
new file mode 100644
index 000000000000..ba981e3db391
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni
@@ -0,0 +1,17 @@
+/** @file
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+/=#
+
+#string STR_MISC_BIOS_VENDOR #language en-US "Not Specified"
+#string STR_MISC_BIOS_VERSION #language en-US "Not Specified"
+#string STR_MISC_BIOS_RELEASE_DATE #language en-US "Not Specified"
+#string STR_MISC_BIOS_VENDOR #language en-US "Not Specified"
+#string STR_MISC_BIOS_RELEASE_DATE #language en-US "12/02/2020"
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 12/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type00
2021-01-04 22:58 ` [PATCH v5 12/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type00 Rebecca Cran
@ 2021-01-05 21:42 ` Samer El-Haj-Mahmoud
0 siblings, 0 replies; 55+ messages in thread
From: Samer El-Haj-Mahmoud @ 2021-01-05 21:42 UTC (permalink / raw)
To: devel@edk2.groups.io, rebecca@nuviainc.com
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu, Samer El-Haj-Mahmoud
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Rebecca
> Cran via groups.io
> Sent: Monday, January 4, 2021 5:58 PM
> To: devel@edk2.groups.io
> Cc: Rebecca Cran <rebecca@nuviainc.com>; Leif Lindholm
> <leif@nuviainc.com>; Ard Biesheuvel <Ard.Biesheuvel@arm.com>; Sami
> Mujawar <Sami.Mujawar@arm.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Michael D Kinney
> <michael.d.kinney@intel.com>; Zhiguang Liu <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [PATCH v5 12/23] ArmPkg: Add
> Universal/Smbios/SmbiosMiscDxe/Type00
>
> This code provides information for the SMBIOS Type 0 table.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c
> | 92 +++++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunctio
> n.c | 281 ++++++++++++++++++++
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni
> | 17 ++
> 3 files changed, 390 insertions(+)
>
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c
> new file mode 100644
> index 000000000000..3b0d907c3996
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c
> @@ -0,0 +1,92 @@
> +/** @file
> + This file provides Smbios Type0 Data
> +
> + Based on the files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2009, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +
> +#include "SmbiosMisc.h"
> +
> +
> +//
> +// Static (possibly build generated) Bios Vendor data.
> +//
> +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE0, MiscBiosVendor) = {
> + { // Hdr
> + EFI_SMBIOS_TYPE_BIOS_INFORMATION, // Type,
> + 0, // Length,
> + 0 // Handle
> + },
> + 1, // Vendor
> + 2, // BiosVersion
> + 0xE000, // BiosSegment
> + 3, // BiosReleaseDate
> + 0, // BiosSize
> + { // BiosCharacteristics
> + 0, // Reserved :2
> + 0, // Unknown :1
> + 0, // BiosCharacteristicsNotSupported :1
> + 0, // IsaIsSupported :1
> + 0, // McaIsSupported :1
> + 0, // EisaIsSupported :1
> + 1, // PciIsSupported :1
Not all platforms support PCI. Can any of these be overridden by a platform PCD? May not worth it as these flags are not really used by any OS/user software because they are often incorrect.
> + 0, // PcmciaIsSupported :1
> + 1, // PlugAndPlayIsSupported :1
> + 0, // ApmIsSupported :1
> + 1, // BiosIsUpgradable :1
> + 1, // BiosShadowingAllowed :1
> + 0, // VlVesaIsSupported :1
> + 0, // EscdSupportIsAvailable :1
> + 1, // BootFromCdIsSupported :1
> + 1, // SelectableBootIsSupported :1
> + 0, // RomBiosIsSocketed :1
> + 0, // BootFromPcmciaIsSupported :1
> + 1, // EDDSpecificationIsSupported :1
Should be 0. This is x86 legacy Enhanced Disk Drive Spec
> + 0, // JapaneseNecFloppyIsSupported :1
> + 0, // JapaneseToshibaFloppyIsSupported :1
> + 0, // Floppy525_360IsSupported :1
> + 0, // Floppy525_12IsSupported :1
> + 0, // Floppy35_720IsSupported :1
> + 0, // Floppy35_288IsSupported :1
> + 0, // PrintScreenIsSupported :1
> + 0, // Keyboard8042IsSupported :1
> + 0, // SerialIsSupported :1
> + 0, // PrinterIsSupported :1
> + 0, // CgaMonoIsSupported :1
> + 0, // NecPc98 :1
> + 0 // ReservedForVendor :32
> + },
> +
> + {
> + 0x03, // BIOSCharacteristicsExtensionBytes[0]
> + // { // BiosReserved
> + // 1, // AcpiIsSupported :1
> + // 1, // UsbLegacyIsSupported :1
Should be 0. This is x86 legacy USB BIOS support
> + // 0, // AgpIsSupported :1
> + // 0, // I20BootIsSupported :1
> + // 0, // Ls120BootIsSupported :1
> + // 0, // AtapiZipDriveBootIsSupported :1
> + // 0, // Boot1394IsSupported :1
> + // 0 // SmartBatteryIsSupported :1
> + // },
> + 0x0D //BIOSCharacteristicsExtensionBytes[1]
> + // { //SystemReserved
> + // 1, //BiosBootSpecIsSupported :1
Should be 0. "BIOS Boot Spec" is the legacy "BBS 1.01" spec, which is not supported on Arm UEFI systems (it is only supported on legacy BIOS x86 systems)
> + // 0, //FunctionKeyNetworkBootIsSupported :1
> + // 1, //TargetContentDistributionEnabled :1
> + // 1, //UefiSpecificationSupported :1
> + // 0, //VirtualMachineSupported :1
> + // 0 //ExtensionByte2Reserved :3
> + // },
> + },
> + 0xFF, // SystemBiosMajorRelease;
> + 0xFF, // SystemBiosMinorRelease;
> + 0xFF, // EmbeddedControllerFirmwareMajorRelease;
> + 0xFF // EmbeddedControllerFirmwareMinorRelease;
These 4 fields are important and must be populated. Windows for example require these not to be 0xFF (see https://docs.microsoft.com/en-us/windows-hardware/design/compatibility/whcp-specifications-policies , Systems.pdf, under System.Fundamentals.SMBIOS). The RPi for instance populates the SystemBios Major/Minor fields from as values derived from PcdFirmwareVersionString, although that is platform specific (see for instance Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c). The best approach in my opinion is to let the platforms pass these values using either dynamic PCDs or an Oem library call.
> +};
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFuncti
> on.c
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFuncti
> on.c
> new file mode 100644
> index 000000000000..4074b10d70f2
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFuncti
> o
> +++ n.c
> @@ -0,0 +1,281 @@
> +/** @file
> + This driver parses the mMiscSubclassDataTable structure and reports
> + any generated data to the DataHub.
> +
> + Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
> + Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SmbiosMisc.h"
> +typedef struct {
> + CONST CHAR8* MonthStr;
> + UINT32 MonthInt;
> +} MONTH_DESCRIPTION;
> +
> +STATIC CONST
> +MONTH_DESCRIPTION mMonthDescription[] = {
> + { "Jan", 1 },
> + { "Feb", 2 },
> + { "Mar", 3 },
> + { "Apr", 4 },
> + { "May", 5 },
> + { "Jun", 6 },
> + { "Jul", 7 },
> + { "Aug", 8 },
> + { "Sep", 9 },
> + { "Oct", 10 },
> + { "Nov", 11 },
> + { "Dec", 12 },
> + { "???", 1 }, // Use 1 as default month };
> +
> +/**
> + Field Filling Function. Transform an EFI_EXP_BASE2_DATA to a byte, with
> '64k'
> + as the unit.
> +
> + @param Value Pointer to Base2_Data
> +
> + @retval
> +
> +**/
> +UINT8
> +Base2ToByteWith64KUnit (
> + IN UINTN Value
> + )
> +{
> + UINT8 Size;
> +
> + Size = ((Value + (SIZE_64KB - 1)) >> 16);
> +
> + return Size;
> +}
> +
> +/**
> + Returns the date and time this file (and firmware) was built.
> +
> + @param[out] *Time Pointer to the EFI_TIME structure to fill in.
> +**/
> +VOID
> +GetReleaseTime (
> + OUT EFI_TIME *Time
> + )
> +{
> + CONST CHAR8 *ReleaseDate = __DATE__;
> + CONST CHAR8 *ReleaseTime = __TIME__;
> + UINTN i;
> +
> + for (i = 0; i < 12; i++) {
> + if (AsciiStrnCmp (ReleaseDate, mMonthDescription[i].MonthStr, 3) == 0) {
> + break;
> + }
> + }
> +
> + Time->Month = mMonthDescription[i].MonthInt;
> + Time->Day = AsciiStrDecimalToUintn (ReleaseDate + 4);
> + Time->Year = AsciiStrDecimalToUintn (ReleaseDate + 7);
> + Time->Hour = AsciiStrDecimalToUintn (ReleaseTime);
> + Time->Minute = AsciiStrDecimalToUintn (ReleaseTime + 3);
> + Time->Second = AsciiStrDecimalToUintn (ReleaseTime + 6); }
> +
> +/**
> + Fetches the firmware ('BIOS') release date from the
> + FirmwareVersionInfo HOB.
> +
> + @return The release date as a UTF-16 string **/
> +CHAR16 *
> +GetBiosReleaseDate (
> + VOID
> + )
> +{
> + CHAR16 *ReleaseDate;
> + EFI_TIME BuildTime;
> +
> + ReleaseDate = AllocateZeroPool ((sizeof (CHAR16)) *
> + SMBIOS_STRING_MAX_LENGTH); if (ReleaseDate == NULL) {
> + return NULL;
> + }
> +
> + GetReleaseTime (&BuildTime);
> +
> + (VOID)UnicodeSPrintAsciiFormat (ReleaseDate,
> + (sizeof (CHAR16)) * SMBIOS_STRING_MAX_LENGTH,
> + "%02d/%02d/%4d",
> + BuildTime.Month,
> + BuildTime.Day,
> + BuildTime.Year
> + );
> +
> + return ReleaseDate;
> +}
> +
> +/**
> + Fetches the firmware ('BIOS') version from the
> + FirmwareVersionInfo HOB.
> +
> + @return The version as a UTF-16 string **/
> +CHAR16 *
> +GetBiosVersion (
> + VOID
> + )
> +{
> + CHAR16 *ReleaseString;
> +
> + ReleaseString =
> + (CHAR16 *)FixedPcdGetPtr (PcdFirmwareVersionString);
> +
> + return ReleaseString;
> +}
> +
> +
> +/**
> + This function makes boot time changes to the contents of the
> + MiscBiosVendor (Type 0).
> +
> + @param RecordData Pointer to copy of RecordData from the Data
> Table.
> +
> + @retval EFI_SUCCESS All parameters were valid.
> + @retval EFI_UNSUPPORTED Unexpected RecordType value.
> + @retval EFI_INVALID_PARAMETER Invalid parameter was found.
> +
> +**/
> +MISC_SMBIOS_TABLE_FUNCTION (MiscBiosVendor) {
> + CHAR8 *OptionalStrStart;
> + CHAR8 *StrStart;
> + UINTN VendorStrLen;
> + UINTN VerStrLen;
> + UINTN DateStrLen;
> + UINTN BiosPhysicalSize;
> + CHAR16 *Vendor;
> + CHAR16 *Version;
> + CHAR16 *ReleaseDate;
> + CHAR16 *Char16String;
> + EFI_STATUS Status;
> + EFI_STRING_ID TokenToUpdate;
> + EFI_STRING_ID TokenToGet;
> + SMBIOS_TABLE_TYPE0 *SmbiosRecord;
> + EFI_SMBIOS_HANDLE SmbiosHandle;
> + SMBIOS_TABLE_TYPE0 *InputData;
> +
> + //
> + // First check for invalid parameters.
> + //
> + if (RecordData == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + InputData = (SMBIOS_TABLE_TYPE0 *)RecordData;
> +
> + Vendor = (CHAR16 *) PcdGetPtr (PcdFirmwareVendor);
> +
> + if (StrLen (Vendor) > 0) {
> + TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VENDOR);
> + HiiSetString (mHiiHandle, TokenToUpdate, Vendor, NULL); }
> +
> + Version = GetBiosVersion();
> +
> + if (StrLen (Version) > 0) {
> + TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VERSION);
> + HiiSetString (mHiiHandle, TokenToUpdate, Version, NULL); } else {
> + Version = (CHAR16 *) PcdGetPtr (PcdFirmwareVersionString);
> + if (StrLen (Version) > 0) {
> + TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VERSION);
> + HiiSetString (mHiiHandle, TokenToUpdate, Version, NULL);
> + }
> + }
> +
> + Char16String = GetBiosReleaseDate (); if (StrLen(Char16String) > 0)
> + {
> + TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_RELEASE_DATE);
> + HiiSetString (mHiiHandle, TokenToUpdate, Char16String, NULL); }
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_BIOS_VENDOR); Vendor =
> + HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
> + VendorStrLen = StrLen (Vendor);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_BIOS_VERSION); Version =
> + HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL); VerStrLen
> + = StrLen (Version);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_BIOS_RELEASE_DATE);
> ReleaseDate
> + = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
> + DateStrLen = StrLen (ReleaseDate);
> +
> + //
> + // Now update the BiosPhysicalSize
> + //
> + BiosPhysicalSize = FixedPcdGet32 (PcdFdSize);
> +
> + //
> + // Two zeros following the last string.
> + //
> + SmbiosRecord = AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE0) +
> VendorStrLen + 1 +
> + VerStrLen + 1 +
> + DateStrLen + 1 + 1); if
> + (SmbiosRecord == NULL) {
> + Status = EFI_OUT_OF_RESOURCES;
> + goto Exit;
> + }
> +
> + (VOID)CopyMem (SmbiosRecord, InputData, sizeof
> (SMBIOS_TABLE_TYPE0));
> +
> + SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE0);
> + SmbiosRecord->BiosSegment = (UINT16)(FixedPcdGet32
> (PcdFdBaseAddress)
> + / SIZE_64KB); if (BiosPhysicalSize < SIZE_16MB) {
> + SmbiosRecord->BiosSize = Base2ToByteWith64KUnit (BiosPhysicalSize)
> + - 1; } else {
> + SmbiosRecord->BiosSize = 0xFF;
> + if (BiosPhysicalSize <= 0x3FFF) {
> + SmbiosRecord->ExtendedBiosSize.Size = BiosPhysicalSize / SIZE_1MB;
> + SmbiosRecord->ExtendedBiosSize.Unit = 0; // Size is in MB
> + } else {
> + SmbiosRecord->ExtendedBiosSize.Size = BiosPhysicalSize / SIZE_1GB;
> + SmbiosRecord->ExtendedBiosSize.Unit = 1; // Size is in GB
> + }
> + }
> +
The SMBIOS spec does not say not to populate the Extended BIOS Size when the Size is < 16MB. You should always populate the Extended BIOS Size
> + OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
> + UnicodeStrToAsciiStrS (Vendor, OptionalStrStart, VendorStrLen + 1);
> + StrStart = OptionalStrStart + VendorStrLen + 1; UnicodeStrToAsciiStrS
> + (Version, StrStart, VerStrLen + 1); StrStart += VerStrLen + 1;
> + UnicodeStrToAsciiStrS (ReleaseDate, StrStart, DateStrLen + 1); // //
> + Now we have got the full smbios record, call smbios protocol to add this
> record.
> + //
> + Status = LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle); if
> + (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type00 Table Log Failed!
> %r \n",
> + __FUNCTION__, __LINE__, Status)); }
> +
> + FreePool (SmbiosRecord);
> +
> +Exit:
> + if (Vendor != NULL) {
> + FreePool (Vendor);
> + }
> +
> + if (Version != NULL) {
> + FreePool (Version);
> + }
> +
> + if (ReleaseDate != NULL) {
> + FreePool (ReleaseDate);
> + }
> +
> + if (Char16String != NULL) {
> + FreePool (Char16String);
> + }
> +
> + return Status;
> +}
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni
> new file mode 100644
> index 000000000000..ba981e3db391
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni
> @@ -0,0 +1,17 @@
> +/** @file
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2010, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +/=#
> +
> +#string STR_MISC_BIOS_VENDOR #language en-US "Not Specified"
> +#string STR_MISC_BIOS_VERSION #language en-US "Not Specified"
> +#string STR_MISC_BIOS_RELEASE_DATE #language en-US "Not Specified"
> +#string STR_MISC_BIOS_VENDOR #language en-US "Not Specified"
> +#string STR_MISC_BIOS_RELEASE_DATE #language en-US "12/02/2020"
> --
> 2.26.2
>
>
>
>
>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 13/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type01
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (11 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 12/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type00 Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-05 22:00 ` [edk2-devel] " Samer El-Haj-Mahmoud
2021-01-04 22:58 ` [PATCH v5 14/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type02 Rebecca Cran
` (10 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
This code provides information for the SMBIOS Type 1 table.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerData.c | 35 ++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerFunction.c | 178 ++++++++++++++++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturer.uni | 20 +++
3 files changed, 233 insertions(+)
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerData.c
new file mode 100644
index 000000000000..908ab9164b63
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerData.c
@@ -0,0 +1,35 @@
+/** @file
+ This file provides Smbios Type1 Data
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+
+
+//
+// Static (possibly build generated) System Manufacturer data.
+//
+MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE1, MiscSystemManufacturer) = {
+ { // Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, // Type,
+ 0, // Length,
+ 0 // Handle
+ },
+ 1, // Manufacturer
+ 2, // ProductName
+ 3, // Version
+ 4, // SerialNumber
+ { // Uuid
+ 0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ SystemWakeupTypePowerSwitch, // SystemWakeupType
+ 5, // SKUNumber,
+ 6 // Family
+};
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerFunction.c
new file mode 100644
index 000000000000..56f55f98b0d0
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerFunction.c
@@ -0,0 +1,178 @@
+/** @file
+ This driver parses the mMiscSubclassDataTable structure and reports
+ any generated data to smbios.
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/BaseMemoryLib.h>
+
+#include "SmbiosMisc.h"
+
+/**
+ This function makes boot time changes to the contents of the
+ MiscSystemManufacturer (Type 1).
+
+ @param RecordData Pointer to copy of RecordData from the Data Table.
+ @param Smbios SMBIOS Protocol
+
+ @retval EFI_SUCCESS All parameters were valid.
+ @retval EFI_UNSUPPORTED Unexpected RecordType value.
+ @retval EFI_INVALID_PARAMETER Invalid parameter was found.
+
+**/
+MISC_SMBIOS_TABLE_FUNCTION(MiscSystemManufacturer)
+{
+ CHAR8 *OptionalStrStart;
+ CHAR8 *StrStart;
+ UINTN ManuStrLen;
+ UINTN VerStrLen;
+ UINTN PdNameStrLen;
+ UINTN SerialNumStrLen;
+ UINTN SKUNumStrLen;
+ UINTN FamilyStrLen;
+ UINTN RecordLength;
+ EFI_STRING Manufacturer;
+ EFI_STRING ProductName;
+ EFI_STRING Version;
+ EFI_STRING SerialNumber;
+ EFI_STRING SKUNumber;
+ EFI_STRING Family;
+ EFI_STRING_ID TokenToGet;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ SMBIOS_TABLE_TYPE1 *SmbiosRecord;
+ SMBIOS_TABLE_TYPE1 *InputData;
+ EFI_STATUS Status;
+ EFI_STRING_ID TokenToUpdate;
+ CHAR16 *Product;
+ CHAR16 *pVersion;
+
+ Status = EFI_SUCCESS;
+
+ //
+ // First check for invalid parameters.
+ //
+ if (RecordData == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ InputData = (SMBIOS_TABLE_TYPE1 *)RecordData;
+
+ Product = (CHAR16 *) PcdGetPtr (PcdSystemProductName);
+ if (StrLen (Product) > 0) {
+ TokenToUpdate = STRING_TOKEN (STR_MISC_SYSTEM_PRODUCT_NAME);
+ HiiSetString (mHiiHandle, TokenToUpdate, Product, NULL);
+ }
+
+ pVersion = (CHAR16 *) PcdGetPtr (PcdSystemVersion);
+ if (StrLen (pVersion) > 0) {
+ TokenToUpdate = STRING_TOKEN (STR_MISC_SYSTEM_VERSION);
+ HiiSetString (mHiiHandle, TokenToUpdate, pVersion, NULL);
+ }
+ UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_SYSTEM_SERIAL_NUMBER), SerialNumType01);
+ UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_SYSTEM_MANUFACTURER), SystemManufacturerType01);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_MANUFACTURER);
+ Manufacturer = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ ManuStrLen = StrLen (Manufacturer);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_PRODUCT_NAME);
+ ProductName = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ PdNameStrLen = StrLen (ProductName);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_VERSION);
+ Version = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ VerStrLen = StrLen (Version);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_SERIAL_NUMBER);
+ SerialNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ SerialNumStrLen = StrLen (SerialNumber);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_SKU_NUMBER);
+ SKUNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ SKUNumStrLen = StrLen (SKUNumber);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_FAMILY);
+ Family = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ FamilyStrLen = StrLen (Family);
+
+ //
+ // Two zeros following the last string.
+ //
+ RecordLength = sizeof (SMBIOS_TABLE_TYPE1) +
+ ManuStrLen + 1 +
+ PdNameStrLen + 1 +
+ VerStrLen + 1 +
+ SerialNumStrLen + 1 +
+ SKUNumStrLen + 1 +
+ FamilyStrLen + 1 + 1;
+ SmbiosRecord = AllocateZeroPool (RecordLength);
+
+ if (SmbiosRecord == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Exit;
+ }
+
+ (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE1));
+
+ SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE1);
+
+ CopyGuid(&SmbiosRecord->Uuid, &InputData->Uuid);
+
+ OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
+ UnicodeStrToAsciiStrS (Manufacturer, OptionalStrStart, ManuStrLen + 1);
+ StrStart = OptionalStrStart + ManuStrLen + 1;
+ UnicodeStrToAsciiStrS (ProductName, StrStart, PdNameStrLen + 1);
+ StrStart += PdNameStrLen + 1;
+ UnicodeStrToAsciiStrS (Version, StrStart, VerStrLen + 1);
+ StrStart += VerStrLen + 1;
+ UnicodeStrToAsciiStrS (SerialNumber, StrStart, SerialNumStrLen + 1);
+ StrStart += SerialNumStrLen + 1;
+ UnicodeStrToAsciiStrS (SKUNumber, StrStart, SKUNumStrLen + 1);
+ StrStart += SKUNumStrLen + 1;
+ UnicodeStrToAsciiStrS (Family, StrStart, FamilyStrLen + 1);
+
+ //
+ // Now we have got the full smbios record, call smbios protocol to add this record.
+ //
+ Status = LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type01 Table Log Failed! %r \n",
+ __FUNCTION__, __LINE__, Status));
+ }
+
+ FreePool (SmbiosRecord);
+
+Exit:
+ if (Manufacturer != NULL) {
+ FreePool (Manufacturer);
+ }
+
+ if (ProductName != NULL) {
+ FreePool (ProductName);
+ }
+
+ if (Version != NULL) {
+ FreePool (Version);
+ }
+
+ if (SerialNumber != NULL) {
+ FreePool (SerialNumber);
+ }
+
+ if (SKUNumber != NULL) {
+ FreePool (SKUNumber);
+ }
+
+ if (Family != NULL) {
+ FreePool (Family);
+ }
+
+ return Status;
+}
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturer.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturer.uni
new file mode 100644
index 000000000000..9d723ba684b8
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturer.uni
@@ -0,0 +1,20 @@
+/** @file
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+/=#
+
+#string STR_MISC_SYSTEM_MANUFACTURER #language en-US "Not Specified"
+#string STR_MISC_SYSTEM_PRODUCT_NAME #language en-US "Not Specified"
+#string STR_MISC_SYSTEM_PRODUCT_NAME #language en-US "Not Specified"
+#string STR_MISC_SYSTEM_VERSION #language en-US "Not Specified"
+#string STR_MISC_SYSTEM_VERSION #language en-US "Not Specified"
+#string STR_MISC_SYSTEM_SERIAL_NUMBER #language en-US "Not Specified"
+#string STR_MISC_SYSTEM_SKU_NUMBER #language en-US "Not Specified"
+#string STR_MISC_SYSTEM_FAMILY #language en-US "Not Specified"
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 13/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type01
2021-01-04 22:58 ` [PATCH v5 13/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type01 Rebecca Cran
@ 2021-01-05 22:00 ` Samer El-Haj-Mahmoud
2021-01-05 22:02 ` Samer El-Haj-Mahmoud
0 siblings, 1 reply; 55+ messages in thread
From: Samer El-Haj-Mahmoud @ 2021-01-05 22:00 UTC (permalink / raw)
To: devel@edk2.groups.io, rebecca@nuviainc.com
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu, Samer El-Haj-Mahmoud
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Rebecca
> Cran via groups.io
> Sent: Monday, January 4, 2021 5:58 PM
> To: devel@edk2.groups.io
> Cc: Rebecca Cran <rebecca@nuviainc.com>; Leif Lindholm
> <leif@nuviainc.com>; Ard Biesheuvel <Ard.Biesheuvel@arm.com>; Sami
> Mujawar <Sami.Mujawar@arm.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Michael D Kinney
> <michael.d.kinney@intel.com>; Zhiguang Liu <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [PATCH v5 13/23] ArmPkg: Add
> Universal/Smbios/SmbiosMiscDxe/Type01
>
> This code provides information for the SMBIOS Type 1 table.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufactur
> erData.c | 35 ++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufactur
> erFunction.c | 178 ++++++++++++++++++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufactur
> er.uni | 20 +++
> 3 files changed, 233 insertions(+)
>
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufact
> urerData.c
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufact
> urerData.c
> new file mode 100644
> index 000000000000..908ab9164b63
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufact
> ure
> +++ rData.c
> @@ -0,0 +1,35 @@
> +/** @file
> + This file provides Smbios Type1 Data
> +
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2009, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SmbiosMisc.h"
> +
> +
> +//
> +// Static (possibly build generated) System Manufacturer data.
> +//
> +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE1,
> MiscSystemManufacturer) = {
> + { // Hdr
> + EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, // Type,
> + 0, // Length,
> + 0 // Handle
> + },
> + 1, // Manufacturer
> + 2, // ProductName
> + 3, // Version
> + 4, // SerialNumber
> + { // Uuid
> + 0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +0x00, 0x00}
> + },
> + SystemWakeupTypePowerSwitch, // SystemWakeupType
> + 5, // SKUNumber,
> + 6 // Family
> +};
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufact
> urerFunction.c
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufact
> urerFunction.c
> new file mode 100644
> index 000000000000..56f55f98b0d0
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufact
> ure
> +++ rFunction.c
> @@ -0,0 +1,178 @@
> +/** @file
> + This driver parses the mMiscSubclassDataTable structure and reports
> + any generated data to smbios.
> +
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2011, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include <Library/BaseMemoryLib.h>
> +
> +#include "SmbiosMisc.h"
> +
> +/**
> + This function makes boot time changes to the contents of the
> + MiscSystemManufacturer (Type 1).
> +
> + @param RecordData Pointer to copy of RecordData from the Data
> Table.
> + @param Smbios SMBIOS Protocol
> +
> + @retval EFI_SUCCESS All parameters were valid.
> + @retval EFI_UNSUPPORTED Unexpected RecordType value.
> + @retval EFI_INVALID_PARAMETER Invalid parameter was found.
> +
> +**/
> +MISC_SMBIOS_TABLE_FUNCTION(MiscSystemManufacturer)
> +{
> + CHAR8 *OptionalStrStart;
> + CHAR8 *StrStart;
> + UINTN ManuStrLen;
> + UINTN VerStrLen;
> + UINTN PdNameStrLen;
> + UINTN SerialNumStrLen;
> + UINTN SKUNumStrLen;
> + UINTN FamilyStrLen;
> + UINTN RecordLength;
> + EFI_STRING Manufacturer;
> + EFI_STRING ProductName;
> + EFI_STRING Version;
> + EFI_STRING SerialNumber;
> + EFI_STRING SKUNumber;
> + EFI_STRING Family;
> + EFI_STRING_ID TokenToGet;
> + EFI_SMBIOS_HANDLE SmbiosHandle;
> + SMBIOS_TABLE_TYPE1 *SmbiosRecord;
> + SMBIOS_TABLE_TYPE1 *InputData;
> + EFI_STATUS Status;
> + EFI_STRING_ID TokenToUpdate;
> + CHAR16 *Product;
> + CHAR16 *pVersion;
> +
> + Status = EFI_SUCCESS;
> +
> + //
> + // First check for invalid parameters.
> + //
> + if (RecordData == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + InputData = (SMBIOS_TABLE_TYPE1 *)RecordData;
> +
> + Product = (CHAR16 *) PcdGetPtr (PcdSystemProductName); if (StrLen
> + (Product) > 0) {
> + TokenToUpdate = STRING_TOKEN
> (STR_MISC_SYSTEM_PRODUCT_NAME);
> + HiiSetString (mHiiHandle, TokenToUpdate, Product, NULL); }
> +
> + pVersion = (CHAR16 *) PcdGetPtr (PcdSystemVersion); if (StrLen
> + (pVersion) > 0) {
> + TokenToUpdate = STRING_TOKEN (STR_MISC_SYSTEM_VERSION);
> + HiiSetString (mHiiHandle, TokenToUpdate, pVersion, NULL); }
> + UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN
> + (STR_MISC_SYSTEM_SERIAL_NUMBER), SerialNumType01);
> UpdateSmbiosInfo
> + (mHiiHandle, STRING_TOKEN (STR_MISC_SYSTEM_MANUFACTURER),
> + SystemManufacturerType01);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_MANUFACTURER);
> + Manufacturer = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,
> NULL);
> + ManuStrLen = StrLen (Manufacturer);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_PRODUCT_NAME);
> + ProductName = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,
> + NULL); PdNameStrLen = StrLen (ProductName);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_VERSION);
> + Version = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
> + VerStrLen = StrLen (Version);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_SERIAL_NUMBER);
> + SerialNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,
> NULL);
> + SerialNumStrLen = StrLen (SerialNumber);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_SKU_NUMBER);
> + SKUNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,
> NULL);
> + SKUNumStrLen = StrLen (SKUNumber);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_FAMILY);
> + Family = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
> + FamilyStrLen = StrLen (Family);
> +
> + //
> + // Two zeros following the last string.
> + //
> + RecordLength = sizeof (SMBIOS_TABLE_TYPE1) +
> + ManuStrLen + 1 +
> + PdNameStrLen + 1 +
> + VerStrLen + 1 +
> + SerialNumStrLen + 1 +
> + SKUNumStrLen + 1 +
> + FamilyStrLen + 1 + 1;
> + SmbiosRecord = AllocateZeroPool (RecordLength);
> +
> + if (SmbiosRecord == NULL) {
> + Status = EFI_OUT_OF_RESOURCES;
> + goto Exit;
> + }
> +
> + (VOID)CopyMem (SmbiosRecord, InputData, sizeof
> (SMBIOS_TABLE_TYPE1));
> +
> + SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE1);
> +
> + CopyGuid(&SmbiosRecord->Uuid, &InputData->Uuid);
> +
> + OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
> + UnicodeStrToAsciiStrS (Manufacturer, OptionalStrStart, ManuStrLen +
> + 1); StrStart = OptionalStrStart + ManuStrLen + 1;
> + UnicodeStrToAsciiStrS (ProductName, StrStart, PdNameStrLen + 1);
> + StrStart += PdNameStrLen + 1; UnicodeStrToAsciiStrS (Version,
> + StrStart, VerStrLen + 1); StrStart += VerStrLen + 1;
> + UnicodeStrToAsciiStrS (SerialNumber, StrStart, SerialNumStrLen + 1);
> + StrStart += SerialNumStrLen + 1; UnicodeStrToAsciiStrS (SKUNumber,
> + StrStart, SKUNumStrLen + 1); StrStart += SKUNumStrLen + 1;
> + UnicodeStrToAsciiStrS (Family, StrStart, FamilyStrLen + 1);
> +
> + //
> + // Now we have got the full smbios record, call smbios protocol to add this
> record.
> + //
> + Status = LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle); if
> + (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type01 Table Log Failed! %r
> \n",
> + __FUNCTION__, __LINE__, Status)); }
> +
> + FreePool (SmbiosRecord);
> +
> +Exit:
> + if (Manufacturer != NULL) {
> + FreePool (Manufacturer);
> + }
> +
> + if (ProductName != NULL) {
> + FreePool (ProductName);
> + }
> +
> + if (Version != NULL) {
> + FreePool (Version);
> + }
> +
> + if (SerialNumber != NULL) {
> + FreePool (SerialNumber);
> + }
> +
> + if (SKUNumber != NULL) {
> + FreePool (SKUNumber);
> + }
> +
> + if (Family != NULL) {
> + FreePool (Family);
> + }
> +
> + return Status;
> +}
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufact
> urer.uni
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufact
> urer.uni
> new file mode 100644
> index 000000000000..9d723ba684b8
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufact
> ure
> +++ r.uni
> @@ -0,0 +1,20 @@
> +/** @file
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2010, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +/=#
> +
> +#string STR_MISC_SYSTEM_MANUFACTURER #language en-US "Not
> Specified"
> +#string STR_MISC_SYSTEM_PRODUCT_NAME #language en-US "Not
> Specified"
> +#string STR_MISC_SYSTEM_PRODUCT_NAME #language en-US "Not
> Specified"
> +#string STR_MISC_SYSTEM_VERSION #language en-US "Not Specified"
> +#string STR_MISC_SYSTEM_VERSION #language en-US "Not Specified"
> +#string STR_MISC_SYSTEM_SERIAL_NUMBER #language en-US "Not
> Specified"
> +#string STR_MISC_SYSTEM_SKU_NUMBER #language en-US "Not
> Specified"
> +#string STR_MISC_SYSTEM_FAMILY #language en-US "Not Specified"
> --
Can platforms customize these (using dynamic HII PCDs for instance?)
> 2.26.2
>
>
>
>
>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 13/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type01
2021-01-05 22:00 ` [edk2-devel] " Samer El-Haj-Mahmoud
@ 2021-01-05 22:02 ` Samer El-Haj-Mahmoud
0 siblings, 0 replies; 55+ messages in thread
From: Samer El-Haj-Mahmoud @ 2021-01-05 22:02 UTC (permalink / raw)
To: devel@edk2.groups.io, rebecca@nuviainc.com
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu, Samer El-Haj-Mahmoud
> >
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/
> > +/=#
> > +
> > +#string STR_MISC_SYSTEM_MANUFACTURER #language en-US "Not
> > Specified"
> > +#string STR_MISC_SYSTEM_PRODUCT_NAME #language en-US "Not
> > Specified"
> > +#string STR_MISC_SYSTEM_PRODUCT_NAME #language en-US "Not
> > Specified"
> > +#string STR_MISC_SYSTEM_VERSION #language en-US "Not
> Specified"
> > +#string STR_MISC_SYSTEM_VERSION #language en-US "Not
> Specified"
> > +#string STR_MISC_SYSTEM_SERIAL_NUMBER #language en-US "Not
> > Specified"
> > +#string STR_MISC_SYSTEM_SKU_NUMBER #language en-US "Not
> > Specified"
> > +#string STR_MISC_SYSTEM_FAMILY #language en-US "Not Specified"
> > --
>
> Can platforms customize these (using dynamic HII PCDs for instance?)
>
Ah, I now see that all the HII strings can be updated using OemMiscLib
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 14/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type02
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (12 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 13/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type01 Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-05 21:59 ` [edk2-devel] " Samer El-Haj-Mahmoud
2021-01-04 22:58 ` [PATCH v5 15/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type03 Rebecca Cran
` (9 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
This code provides information for the SMBIOS Type 2 table.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerData.c | 45 +++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerFunction.c | 207 ++++++++++++++++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturer.uni | 20 ++
3 files changed, 272 insertions(+)
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerData.c
new file mode 100644
index 000000000000..f9122d5d8963
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerData.c
@@ -0,0 +1,45 @@
+/** @file
+
+ This file provide OEM to define Smbios Type2 Data
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+
+//
+// Static (possibly build generated) Chassis Manufacturer data.
+//
+MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE2, MiscBaseBoardManufacturer) = {
+ { // Hdr
+ EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, // Type,
+ 0, // Length,
+ 0 // Handle
+ },
+ 1, // BaseBoardManufacturer
+ 2, // BaseBoardProductName
+ 3, // BaseBoardVersion
+ 4, // BaseBoardSerialNumber
+ 5, // BaseBoardAssetTag
+ { // FeatureFlag
+ 1, // Motherboard :1
+ 0, // RequiresDaughterCard :1
+ 0, // Removable :1
+ 1, // Replaceable :1
+ 0, // HotSwappable :1
+ 0 // Reserved :3
+ },
+ 6, // BaseBoardChassisLocation
+ 0, // ChassisHandle;
+ BaseBoardTypeMotherBoard, // BoardType;
+ 0, // NumberOfContainedObjectHandles;
+ {
+ 0
+ } // ContainedObjectHandles[1];
+};
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerFunction.c
new file mode 100644
index 000000000000..6c9bfa803ee5
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerFunction.c
@@ -0,0 +1,207 @@
+/** @file
+ This driver parses the mSmbiosMiscDataTable structure and reports
+ any generated data using SMBIOS protocol.
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+
+
+/**
+ This function makes basic board manufacturer to the contents of the
+ Misc Base Board Manufacturer (Type 2).
+
+ @param RecordData Pointer to copy of RecordData from the Data Table.
+
+ @retval EFI_SUCCESS All parameters were valid.
+ @retval EFI_UNSUPPORTED Unexpected RecordType value.
+ @retval EFI_INVALID_PARAMETER Invalid parameter was found.
+
+**/
+MISC_SMBIOS_TABLE_FUNCTION(MiscBaseBoardManufacturer)
+{
+ CHAR8 *OptionalStrStart;
+ CHAR8 *StrStart;
+ UINTN RecordLength;
+ UINTN ManuStrLen;
+ UINTN ProductNameStrLen;
+ UINTN VerStrLen;
+ UINTN SerialNumStrLen;
+ UINTN AssetTagStrLen;
+ UINTN ChassisLocaStrLen;
+ UINTN HandleCount;
+ UINT16 *HandleArray;
+ CHAR16 *BaseBoardManufacturer;
+ CHAR16 *BaseBoardProductName;
+ CHAR16 *Version;
+ EFI_STRING SerialNumber;
+ EFI_STRING AssetTag;
+ EFI_STRING ChassisLocation;
+ EFI_STRING_ID TokenToGet;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ SMBIOS_TABLE_TYPE2 *SmbiosRecord;
+ SMBIOS_TABLE_TYPE2 *InputData;
+ EFI_STATUS Status;
+
+ EFI_STRING_ID TokenToUpdate;
+
+ HandleCount = 0;
+ HandleArray = NULL;
+ InputData = NULL;
+
+ //
+ // First check for invalid parameters.
+ //
+ if (RecordData == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ InputData = (SMBIOS_TABLE_TYPE2*)RecordData;
+
+ BaseBoardManufacturer = (CHAR16 *) PcdGetPtr (PcdBaseBoardManufacturer);
+ if (StrLen (BaseBoardManufacturer) > 0) {
+ TokenToUpdate = STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER);
+ HiiSetString (mHiiHandle, TokenToUpdate, BaseBoardManufacturer, NULL);
+ }
+
+ BaseBoardProductName = (CHAR16 *) PcdGetPtr (PcdBaseBoardProductName);
+ if (StrLen (BaseBoardProductName) > 0) {
+ TokenToUpdate = STRING_TOKEN (STR_MISC_BASE_BOARD_PRODUCT_NAME);
+ HiiSetString (mHiiHandle, TokenToUpdate, BaseBoardProductName, NULL);
+ }
+
+ Version = (CHAR16 *) PcdGetPtr (PcdBaseBoardVersion);
+ if (StrLen (Version) > 0) {
+ TokenToUpdate = STRING_TOKEN (STR_MISC_BASE_BOARD_VERSION);
+ HiiSetString (mHiiHandle, TokenToUpdate, Version, NULL);
+ }
+
+ UpdateSmbiosInfo (mHiiHandle,
+ STRING_TOKEN (STR_MISC_BASE_BOARD_ASSET_TAG),
+ AssertTagType02
+ );
+ UpdateSmbiosInfo (mHiiHandle,
+ STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_NUMBER),
+ SerialNumberType02
+ );
+ UpdateSmbiosInfo (mHiiHandle,
+ STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER),
+ BoardManufacturerType02
+ );
+
+ TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER);
+ BaseBoardManufacturer = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ ManuStrLen = StrLen (BaseBoardManufacturer);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_PRODUCT_NAME);
+ BaseBoardProductName = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ ProductNameStrLen = StrLen (BaseBoardProductName);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_VERSION);
+ Version = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ VerStrLen = StrLen (Version);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_NUMBER);
+ SerialNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ SerialNumStrLen = StrLen (SerialNumber);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_ASSET_TAG);
+ AssetTag = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ AssetTagStrLen = StrLen (AssetTag);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_CHASSIS_LOCATION);
+ ChassisLocation = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ ChassisLocaStrLen = StrLen (ChassisLocation);
+
+ //
+ // Two zeros following the last string.
+ //
+ RecordLength = sizeof (SMBIOS_TABLE_TYPE2) +
+ ManuStrLen + 1 +
+ ProductNameStrLen + 1 +
+ VerStrLen + 1 +
+ SerialNumStrLen + 1 +
+ AssetTagStrLen + 1 +
+ ChassisLocaStrLen + 1 + 1;
+ SmbiosRecord = AllocateZeroPool (RecordLength);
+ if (SmbiosRecord == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Exit;
+ }
+
+ (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE2));
+ SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE2);
+
+ //
+ // Update Contained objects Handle
+ //
+ SmbiosRecord->NumberOfContainedObjectHandles = 0;
+ GetLinkTypeHandle (EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, &HandleArray, &HandleCount);
+ // It's assumed there's at most a single chassis
+ ASSERT (HandleCount < 2);
+ if (HandleCount > 0) {
+ SmbiosRecord->ChassisHandle = HandleArray[0];
+ }
+
+ FreePool (HandleArray);
+
+ OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
+ UnicodeStrToAsciiStrS (BaseBoardManufacturer, OptionalStrStart, ManuStrLen + 1);
+
+ StrStart = OptionalStrStart + ManuStrLen + 1;
+ UnicodeStrToAsciiStrS (BaseBoardProductName, StrStart, ProductNameStrLen + 1);
+
+ StrStart += ProductNameStrLen + 1;
+ UnicodeStrToAsciiStrS (Version, StrStart, VerStrLen + 1);
+
+ StrStart += VerStrLen + 1;
+ UnicodeStrToAsciiStrS (SerialNumber, StrStart, SerialNumStrLen + 1);
+
+ StrStart += SerialNumStrLen + 1;
+ UnicodeStrToAsciiStrS (AssetTag, StrStart, AssetTagStrLen + 1);
+
+ StrStart += AssetTagStrLen + 1;
+ UnicodeStrToAsciiStrS (ChassisLocation, StrStart, ChassisLocaStrLen + 1);
+
+ Status = LogSmbiosData ((UINT8 *)SmbiosRecord, &SmbiosHandle);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type02 Table Log Failed! %r \n",
+ __FUNCTION__, __LINE__, Status));
+ }
+
+ FreePool (SmbiosRecord);
+
+Exit:
+ if (BaseBoardManufacturer != NULL) {
+ FreePool (BaseBoardManufacturer);
+ }
+
+ if (BaseBoardProductName != NULL) {
+ FreePool (BaseBoardProductName);
+ }
+
+ if (Version != NULL) {
+ FreePool (Version);
+ }
+
+ if (SerialNumber != NULL) {
+ FreePool (SerialNumber);
+ }
+
+ if (AssetTag != NULL) {
+ FreePool (AssetTag);
+ }
+
+ if (ChassisLocation != NULL) {
+ FreePool (ChassisLocation);
+ }
+
+ return 0;
+}
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturer.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturer.uni
new file mode 100644
index 000000000000..47b6c71230fe
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturer.uni
@@ -0,0 +1,20 @@
+/** @file
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+/=#
+
+#string STR_MISC_BASE_BOARD_MANUFACTURER #language en-US "Not Specified"
+#string STR_MISC_BASE_BOARD_PRODUCT_NAME #language en-US "Not Specified"
+#string STR_MISC_BASE_BOARD_PRODUCT_NAME #language en-US "Not Specified"
+#string STR_MISC_BASE_BOARD_VERSION #language en-US "Not Specified"
+#string STR_MISC_BASE_BOARD_VERSION #language en-US "Not Specified"
+#string STR_MISC_BASE_BOARD_SERIAL_NUMBER #language en-US "Not Specified"
+#string STR_MISC_BASE_BOARD_ASSET_TAG #language en-US "Not Specified"
+#string STR_MISC_BASE_BOARD_CHASSIS_LOCATION #language en-US "Not Specified"
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 14/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type02
2021-01-04 22:58 ` [PATCH v5 14/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type02 Rebecca Cran
@ 2021-01-05 21:59 ` Samer El-Haj-Mahmoud
0 siblings, 0 replies; 55+ messages in thread
From: Samer El-Haj-Mahmoud @ 2021-01-05 21:59 UTC (permalink / raw)
To: devel@edk2.groups.io, rebecca@nuviainc.com
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu, Samer El-Haj-Mahmoud
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Rebecca
> Cran via groups.io
> Sent: Monday, January 4, 2021 5:58 PM
> To: devel@edk2.groups.io
> Cc: Rebecca Cran <rebecca@nuviainc.com>; Leif Lindholm
> <leif@nuviainc.com>; Ard Biesheuvel <Ard.Biesheuvel@arm.com>; Sami
> Mujawar <Sami.Mujawar@arm.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Michael D Kinney
> <michael.d.kinney@intel.com>; Zhiguang Liu <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [PATCH v5 14/23] ArmPkg: Add
> Universal/Smbios/SmbiosMiscDxe/Type02
>
> This code provides information for the SMBIOS Type 2 table.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacture
> rData.c | 45 +++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacture
> rFunction.c | 207 ++++++++++++++++++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacture
> r.uni | 20 ++
> 3 files changed, 272 insertions(+)
>
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufactu
> rerData.c
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufactu
> rerData.c
> new file mode 100644
> index 000000000000..f9122d5d8963
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufact
> +++ urerData.c
> @@ -0,0 +1,45 @@
> +/** @file
> +
> + This file provide OEM to define Smbios Type2 Data
> +
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2009, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SmbiosMisc.h"
> +
> +//
> +// Static (possibly build generated) Chassis Manufacturer data.
> +//
> +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE2,
> MiscBaseBoardManufacturer) = {
> + { // Hdr
> + EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, // Type,
> + 0, // Length,
> + 0 // Handle
> + },
> + 1, // BaseBoardManufacturer
> + 2, // BaseBoardProductName
> + 3, // BaseBoardVersion
> + 4, // BaseBoardSerialNumber
> + 5, // BaseBoardAssetTag
> + { // FeatureFlag
> + 1, // Motherboard :1
> + 0, // RequiresDaughterCard :1
> + 0, // Removable :1
> + 1, // Replaceable :1
Not true for all platforms
> + 0, // HotSwappable :1
> + 0 // Reserved :3
> + },
> + 6, // BaseBoardChassisLocation
> + 0, // ChassisHandle;
> + BaseBoardTypeMotherBoard, // BoardType;
> + 0, // NumberOfContainedObjectHandles;
> + {
> + 0
> + } // ContainedObjectHandles[1];
> +};
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufactu
> rerFunction.c
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufactu
> rerFunction.c
> new file mode 100644
> index 000000000000..6c9bfa803ee5
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufact
> +++ urerFunction.c
> @@ -0,0 +1,207 @@
> +/** @file
> + This driver parses the mSmbiosMiscDataTable structure and reports
> + any generated data using SMBIOS protocol.
> +
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2009 - 2011, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SmbiosMisc.h"
> +
> +
> +/**
> + This function makes basic board manufacturer to the contents of the
> + Misc Base Board Manufacturer (Type 2).
> +
> + @param RecordData Pointer to copy of RecordData from the Data
> Table.
> +
> + @retval EFI_SUCCESS All parameters were valid.
> + @retval EFI_UNSUPPORTED Unexpected RecordType value.
> + @retval EFI_INVALID_PARAMETER Invalid parameter was found.
> +
> +**/
> +MISC_SMBIOS_TABLE_FUNCTION(MiscBaseBoardManufacturer)
> +{
> + CHAR8 *OptionalStrStart;
> + CHAR8 *StrStart;
> + UINTN RecordLength;
> + UINTN ManuStrLen;
> + UINTN ProductNameStrLen;
> + UINTN VerStrLen;
> + UINTN SerialNumStrLen;
> + UINTN AssetTagStrLen;
> + UINTN ChassisLocaStrLen;
> + UINTN HandleCount;
> + UINT16 *HandleArray;
> + CHAR16 *BaseBoardManufacturer;
> + CHAR16 *BaseBoardProductName;
> + CHAR16 *Version;
> + EFI_STRING SerialNumber;
> + EFI_STRING AssetTag;
> + EFI_STRING ChassisLocation;
> + EFI_STRING_ID TokenToGet;
> + EFI_SMBIOS_HANDLE SmbiosHandle;
> + SMBIOS_TABLE_TYPE2 *SmbiosRecord;
> + SMBIOS_TABLE_TYPE2 *InputData;
> + EFI_STATUS Status;
> +
> + EFI_STRING_ID TokenToUpdate;
> +
> + HandleCount = 0;
> + HandleArray = NULL;
> + InputData = NULL;
> +
> + //
> + // First check for invalid parameters.
> + //
> + if (RecordData == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + InputData = (SMBIOS_TABLE_TYPE2*)RecordData;
> +
> + BaseBoardManufacturer = (CHAR16 *) PcdGetPtr
> + (PcdBaseBoardManufacturer); if (StrLen (BaseBoardManufacturer) > 0) {
> + TokenToUpdate = STRING_TOKEN
> (STR_MISC_BASE_BOARD_MANUFACTURER);
> + HiiSetString (mHiiHandle, TokenToUpdate, BaseBoardManufacturer,
> + NULL); }
> +
> + BaseBoardProductName = (CHAR16 *) PcdGetPtr
> + (PcdBaseBoardProductName); if (StrLen (BaseBoardProductName) > 0) {
> + TokenToUpdate = STRING_TOKEN
> (STR_MISC_BASE_BOARD_PRODUCT_NAME);
> + HiiSetString (mHiiHandle, TokenToUpdate, BaseBoardProductName,
> + NULL); }
> +
> + Version = (CHAR16 *) PcdGetPtr (PcdBaseBoardVersion); if (StrLen
> + (Version) > 0) {
> + TokenToUpdate = STRING_TOKEN (STR_MISC_BASE_BOARD_VERSION);
> + HiiSetString (mHiiHandle, TokenToUpdate, Version, NULL); }
> +
> + UpdateSmbiosInfo (mHiiHandle,
> + STRING_TOKEN (STR_MISC_BASE_BOARD_ASSET_TAG),
> + AssertTagType02
> + );
> + UpdateSmbiosInfo (mHiiHandle,
> + STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_NUMBER),
> + SerialNumberType02
> + );
> + UpdateSmbiosInfo (mHiiHandle,
> + STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER),
> + BoardManufacturerType02
> + );
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER);
> + BaseBoardManufacturer = HiiGetPackageString (&gEfiCallerIdGuid,
> + TokenToGet, NULL); ManuStrLen = StrLen (BaseBoardManufacturer);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_PRODUCT_NAME);
> + BaseBoardProductName = HiiGetPackageString (&gEfiCallerIdGuid,
> + TokenToGet, NULL); ProductNameStrLen = StrLen (BaseBoardProductName);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_VERSION); Version
> =
> + HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL); VerStrLen
> + = StrLen (Version);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_NUMBER);
> + SerialNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,
> + NULL); SerialNumStrLen = StrLen (SerialNumber);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_ASSET_TAG);
> AssetTag
> + = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
> + AssetTagStrLen = StrLen (AssetTag);
> +
> + TokenToGet = STRING_TOKEN
> (STR_MISC_BASE_BOARD_CHASSIS_LOCATION);
> + ChassisLocation = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,
> + NULL); ChassisLocaStrLen = StrLen (ChassisLocation);
> +
> + //
> + // Two zeros following the last string.
> + //
> + RecordLength = sizeof (SMBIOS_TABLE_TYPE2) +
> + ManuStrLen + 1 +
> + ProductNameStrLen + 1 +
> + VerStrLen + 1 +
> + SerialNumStrLen + 1 +
> + AssetTagStrLen + 1 +
> + ChassisLocaStrLen + 1 + 1; SmbiosRecord =
> + AllocateZeroPool (RecordLength); if (SmbiosRecord == NULL) {
> + Status = EFI_OUT_OF_RESOURCES;
> + goto Exit;
> + }
> +
> + (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE2));
> + SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE2);
> +
> + //
> + // Update Contained objects Handle
> + //
> + SmbiosRecord->NumberOfContainedObjectHandles = 0; GetLinkTypeHandle
> + (EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, &HandleArray, &HandleCount); //
> + It's assumed there's at most a single chassis ASSERT (HandleCount <
> + 2); if (HandleCount > 0) {
> + SmbiosRecord->ChassisHandle = HandleArray[0]; }
> +
> + FreePool (HandleArray);
> +
> + OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
> + UnicodeStrToAsciiStrS (BaseBoardManufacturer, OptionalStrStart,
> + ManuStrLen + 1);
> +
> + StrStart = OptionalStrStart + ManuStrLen + 1; UnicodeStrToAsciiStrS
> + (BaseBoardProductName, StrStart, ProductNameStrLen + 1);
> +
> + StrStart += ProductNameStrLen + 1;
> + UnicodeStrToAsciiStrS (Version, StrStart, VerStrLen + 1);
> +
> + StrStart += VerStrLen + 1;
> + UnicodeStrToAsciiStrS (SerialNumber, StrStart, SerialNumStrLen + 1);
> +
> + StrStart += SerialNumStrLen + 1;
> + UnicodeStrToAsciiStrS (AssetTag, StrStart, AssetTagStrLen + 1);
> +
> + StrStart += AssetTagStrLen + 1;
> + UnicodeStrToAsciiStrS (ChassisLocation, StrStart, ChassisLocaStrLen +
> + 1);
> +
> + Status = LogSmbiosData ((UINT8 *)SmbiosRecord, &SmbiosHandle); if
> + (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type02 Table Log Failed! %r
> \n",
> + __FUNCTION__, __LINE__, Status)); }
> +
> + FreePool (SmbiosRecord);
> +
> +Exit:
> + if (BaseBoardManufacturer != NULL) {
> + FreePool (BaseBoardManufacturer);
> + }
> +
> + if (BaseBoardProductName != NULL) {
> + FreePool (BaseBoardProductName);
> + }
> +
> + if (Version != NULL) {
> + FreePool (Version);
> + }
> +
> + if (SerialNumber != NULL) {
> + FreePool (SerialNumber);
> + }
> +
> + if (AssetTag != NULL) {
> + FreePool (AssetTag);
> + }
> +
> + if (ChassisLocation != NULL) {
> + FreePool (ChassisLocation);
> + }
> +
> + return 0;
> +}
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufactu
> rer.uni
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufactu
> rer.uni
> new file mode 100644
> index 000000000000..47b6c71230fe
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufact
> +++ urer.uni
> @@ -0,0 +1,20 @@
> +/** @file
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2010, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +/=#
> +
> +#string STR_MISC_BASE_BOARD_MANUFACTURER #language en-US "Not
> Specified"
> +#string STR_MISC_BASE_BOARD_PRODUCT_NAME #language en-US "Not
> Specified"
> +#string STR_MISC_BASE_BOARD_PRODUCT_NAME #language en-US "Not
> Specified"
> +#string STR_MISC_BASE_BOARD_VERSION #language en-US "Not
> Specified"
> +#string STR_MISC_BASE_BOARD_VERSION #language en-US "Not
> Specified"
> +#string STR_MISC_BASE_BOARD_SERIAL_NUMBER #language en-US "Not
> Specified"
> +#string STR_MISC_BASE_BOARD_ASSET_TAG #language en-US "Not
> Specified"
> +#string STR_MISC_BASE_BOARD_CHASSIS_LOCATION #language en-US "Not
> Specified"
> --
Shouldn't all of these strings be customizable via platform dynamic HII PCDs?
> 2.26.2
>
>
>
>
>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 15/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type03
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (13 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 14/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type02 Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-05 21:47 ` [edk2-devel] " Samer El-Haj-Mahmoud
2021-01-04 22:58 ` [PATCH v5 16/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type13 Rebecca Cran
` (8 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
This code provides information for the SMBIOS Type 3 table.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerData.c | 51 +++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFunction.c | 208 ++++++++++++++++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer.uni | 17 ++
3 files changed, 276 insertions(+)
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerData.c
new file mode 100644
index 000000000000..d20338b0906c
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerData.c
@@ -0,0 +1,51 @@
+/** @file
+ This file provides Smbios Type3 Data
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+
+
+//
+// Static (possibly build generated) Chassis Manufacturer data.
+//
+MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE3, MiscChassisManufacturer) = {
+ { // Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, // Type,
+ 0, // Length,
+ 0 // Handle
+ },
+ 1, // Manufactrurer
+ MiscChassisTypeMainServerChassis, // Type
+ 2, // Version
+ 3, // SerialNumber
+ 4, // AssetTag
+ ChassisStateSafe, // BootupState
+ ChassisStateSafe, // PowerSupplyState
+ ChassisStateSafe, // ThermalState
+ ChassisSecurityStatusNone, // SecurityState
+ {
+ 0, // OemDefined[0]
+ 0, // OemDefined[1]
+ 0, // OemDefined[2]
+ 0 // OemDefined[3]
+ },
+ 2, // Height
+ 1, // NumberofPowerCords
+ 0, // ContainedElementCount
+ 0, // ContainedElementRecordLength
+ { // ContainedElements[0]
+ {
+ 0, // ContainedElementType
+ 0, // ContainedElementMinimum
+ 0 // ContainedElementMaximum
+ }
+ }
+};
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFunction.c
new file mode 100644
index 000000000000..f73e008c80ba
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFunction.c
@@ -0,0 +1,208 @@
+/** @file
+ This driver parses the mMiscSubclassDataTable structure and reports
+ any generated data to smbios.
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+
+/**
+ * Returns the chassis type in SMBIOS format.
+ *
+ * @return Chassis type
+**/
+UINT8
+GetChassisType (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT8 ChassisType;
+
+ Status = OemGetChassisType (&ChassisType);
+ if (EFI_ERROR (Status)) {
+ return 0;
+ }
+
+ return ChassisType;
+}
+
+/**
+ This function makes boot time changes to the contents of the
+ MiscChassisManufacturer (Type 3).
+
+ @param RecordData Pointer to copy of RecordData from the Data Table.
+
+ @retval EFI_SUCCESS All parameters were valid.
+ @retval EFI_UNSUPPORTED Unexpected RecordType value.
+ @retval EFI_INVALID_PARAMETER Invalid parameter was found.
+
+**/
+MISC_SMBIOS_TABLE_FUNCTION(MiscChassisManufacturer)
+{
+ CHAR8 *OptionalStrStart;
+ CHAR8 *StrStart;
+ UINTN RecordLength;
+ UINTN ManuStrLen;
+ UINTN VerStrLen;
+ UINTN AssertTagStrLen;
+ UINTN SerialNumStrLen;
+ UINTN ChaNumStrLen;
+ EFI_STRING Manufacturer;
+ EFI_STRING Version;
+ EFI_STRING SerialNumber;
+ EFI_STRING AssertTag;
+ EFI_STRING ChassisSkuNumber;
+ EFI_STRING_ID TokenToGet;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ SMBIOS_TABLE_TYPE3 *SmbiosRecord;
+ SMBIOS_TABLE_TYPE3 *InputData;
+ EFI_STATUS Status;
+
+ UINT8 ContainedElementCount;
+ CONTAINED_ELEMENT ContainedElements;
+ UINT8 ExtendLength;
+
+ UINT8 ChassisType;
+
+ ExtendLength = 0;
+
+ //
+ // First check for invalid parameters.
+ //
+ if (RecordData == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ InputData = (SMBIOS_TABLE_TYPE3 *)RecordData;
+
+ UpdateSmbiosInfo (
+ mHiiHandle,
+ STRING_TOKEN (STR_MISC_CHASSIS_ASSET_TAG),
+ AssetTagType03
+ );
+ UpdateSmbiosInfo (
+ mHiiHandle,
+ STRING_TOKEN (STR_MISC_CHASSIS_SERIAL_NUMBER),
+ SerialNumberType03
+ );
+ UpdateSmbiosInfo (
+ mHiiHandle,
+ STRING_TOKEN (STR_MISC_CHASSIS_VERSION),
+ VersionType03
+ );
+ UpdateSmbiosInfo (
+ mHiiHandle,
+ STRING_TOKEN (STR_MISC_CHASSIS_MANUFACTURER),
+ ManufacturerType03
+ );
+
+ TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_MANUFACTURER);
+ Manufacturer = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ ManuStrLen = StrLen (Manufacturer);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_VERSION);
+ Version = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ VerStrLen = StrLen (Version);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_SERIAL_NUMBER);
+ SerialNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ SerialNumStrLen = StrLen (SerialNumber);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_ASSET_TAG);
+ AssertTag = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ AssertTagStrLen = StrLen (AssertTag);
+
+ TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_SKU_NUMBER);
+ ChassisSkuNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
+ ChaNumStrLen = StrLen (ChassisSkuNumber);
+
+ ContainedElementCount = InputData->ContainedElementCount;
+
+ if (ContainedElementCount > 1) {
+ ExtendLength = (ContainedElementCount - 1) * sizeof (CONTAINED_ELEMENT);
+ }
+
+ //
+ // Two zeros following the last string.
+ //
+ RecordLength = sizeof (SMBIOS_TABLE_TYPE3) +
+ ExtendLength + 1 +
+ ManuStrLen + 1 +
+ VerStrLen + 1 +
+ SerialNumStrLen + 1 +
+ AssertTagStrLen + 1 +
+ ChaNumStrLen + 1 + 1;
+ SmbiosRecord = AllocateZeroPool (RecordLength);
+ if (SmbiosRecord == NULL) {
+ Status = EFI_OUT_OF_RESOURCES;
+ goto Exit;
+ }
+
+ (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE3));
+
+ SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE3) + ExtendLength + 1;
+
+ ChassisType = GetChassisType ();
+ if (ChassisType != 0) {
+ SmbiosRecord->Type = ChassisType;
+ }
+
+ //ContainedElements
+ ASSERT (ContainedElementCount < 2);
+ (VOID)CopyMem (SmbiosRecord + 1, &ContainedElements, ExtendLength);
+
+ //ChassisSkuNumber
+ *((UINT8 *)SmbiosRecord + sizeof (SMBIOS_TABLE_TYPE3) + ExtendLength) = 5;
+
+ OptionalStrStart = (CHAR8 *)((UINT8 *)SmbiosRecord + sizeof (SMBIOS_TABLE_TYPE3) + ExtendLength + 1);
+ UnicodeStrToAsciiStrS (Manufacturer, OptionalStrStart, ManuStrLen + 1);
+ StrStart = OptionalStrStart + ManuStrLen + 1;
+ UnicodeStrToAsciiStrS (Version, StrStart, VerStrLen + 1);
+ StrStart += VerStrLen + 1;
+ UnicodeStrToAsciiStrS (SerialNumber, StrStart, SerialNumStrLen + 1);
+ StrStart += SerialNumStrLen + 1;
+ UnicodeStrToAsciiStrS (AssertTag, StrStart, AssertTagStrLen + 1);
+ StrStart += AssertTagStrLen + 1;
+ UnicodeStrToAsciiStrS (ChassisSkuNumber, StrStart, ChaNumStrLen + 1);
+ //
+ // Now we have got the full smbios record, call smbios protocol to add this record.
+ //
+ Status = LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type03 Table Log Failed! %r \n",
+ __FUNCTION__, __LINE__, Status));
+ }
+
+ FreePool (SmbiosRecord);
+
+Exit:
+ if (Manufacturer != NULL) {
+ FreePool (Manufacturer);
+ }
+
+ if (Version != NULL) {
+ FreePool (Version);
+ }
+
+ if (SerialNumber != NULL) {
+ FreePool (SerialNumber);
+ }
+
+ if (AssertTag != NULL) {
+ FreePool (AssertTag);
+ }
+
+ if (ChassisSkuNumber != NULL) {
+ FreePool (ChassisSkuNumber);
+ }
+
+ return 0;
+}
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer.uni
new file mode 100644
index 000000000000..dacb195bff28
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer.uni
@@ -0,0 +1,17 @@
+/** @file
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+/=#
+
+#string STR_MISC_CHASSIS_MANUFACTURER #language en-US "Not Specified"
+#string STR_MISC_CHASSIS_VERSION #language en-US "Not Specified"
+#string STR_MISC_CHASSIS_SERIAL_NUMBER #language en-US "Not Specified"
+#string STR_MISC_CHASSIS_ASSET_TAG #language en-US "Not Specified"
+#string STR_MISC_CHASSIS_SKU_NUMBER #language en-US "Not Specified"
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 15/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type03
2021-01-04 22:58 ` [PATCH v5 15/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type03 Rebecca Cran
@ 2021-01-05 21:47 ` Samer El-Haj-Mahmoud
2021-01-11 23:34 ` Rebecca Cran
0 siblings, 1 reply; 55+ messages in thread
From: Samer El-Haj-Mahmoud @ 2021-01-05 21:47 UTC (permalink / raw)
To: devel@edk2.groups.io, rebecca@nuviainc.com
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu, Samer El-Haj-Mahmoud
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Rebecca
> Cran via groups.io
> Sent: Monday, January 4, 2021 5:58 PM
> To: devel@edk2.groups.io
> Cc: Rebecca Cran <rebecca@nuviainc.com>; Leif Lindholm
> <leif@nuviainc.com>; Ard Biesheuvel <Ard.Biesheuvel@arm.com>; Sami
> Mujawar <Sami.Mujawar@arm.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Michael D Kinney
> <michael.d.kinney@intel.com>; Zhiguang Liu <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [PATCH v5 15/23] ArmPkg: Add
> Universal/Smbios/SmbiosMiscDxe/Type03
>
> This code provides information for the SMBIOS Type 3 table.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerDa
> ta.c | 51 +++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFu
> nction.c | 208 ++++++++++++++++++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer.u
> ni | 17 ++
> 3 files changed, 276 insertions(+)
>
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer
> Data.c
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer
> Data.c
> new file mode 100644
> index 000000000000..d20338b0906c
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufactur
> +++ erData.c
> @@ -0,0 +1,51 @@
> +/** @file
> + This file provides Smbios Type3 Data
> +
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2009, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SmbiosMisc.h"
> +
> +
> +//
> +// Static (possibly build generated) Chassis Manufacturer data.
> +//
> +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE3,
> MiscChassisManufacturer) = {
> + { // Hdr
> + EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, // Type,
> + 0, // Length,
> + 0 // Handle
> + },
> + 1, // Manufactrurer
> + MiscChassisTypeMainServerChassis, // Type
> + 2, // Version
> + 3, // SerialNumber
> + 4, // AssetTag
> + ChassisStateSafe, // BootupState
> + ChassisStateSafe, // PowerSupplyState
> + ChassisStateSafe, // ThermalState
> + ChassisSecurityStatusNone, // SecurityState
Platforms should be able to update their chassis boot state information. This is especially important for servers. Platform PCD or OEM library call?
> + {
> + 0, // OemDefined[0]
> + 0, // OemDefined[1]
> + 0, // OemDefined[2]
> + 0 // OemDefined[3]
> + },
> + 2, // Height
Same as this one. Platform PCD or OEM library call?
> + 1, // NumberofPowerCords
Same as this one. Platform PCD or OEM library call?
> + 0, // ContainedElementCount
> + 0, // ContainedElementRecordLength
> + { // ContainedElements[0]
> + {
> + 0, // ContainedElementType
> + 0, // ContainedElementMinimum
> + 0 // ContainedElementMaximum
> + }
> + }
> +};
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer
> Function.c
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer
> Function.c
> new file mode 100644
> index 000000000000..f73e008c80ba
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufactur
> +++ erFunction.c
> @@ -0,0 +1,208 @@
> +/** @file
> + This driver parses the mMiscSubclassDataTable structure and reports
> + any generated data to smbios.
> +
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2009 - 2011, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SmbiosMisc.h"
> +
> +/**
> + * Returns the chassis type in SMBIOS format.
> + *
> + * @return Chassis type
> +**/
> +UINT8
> +GetChassisType (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + UINT8 ChassisType;
> +
> + Status = OemGetChassisType (&ChassisType); if (EFI_ERROR (Status)) {
> + return 0;
> + }
> +
> + return ChassisType;
> +}
> +
> +/**
> + This function makes boot time changes to the contents of the
> + MiscChassisManufacturer (Type 3).
> +
> + @param RecordData Pointer to copy of RecordData from the Data
> Table.
> +
> + @retval EFI_SUCCESS All parameters were valid.
> + @retval EFI_UNSUPPORTED Unexpected RecordType value.
> + @retval EFI_INVALID_PARAMETER Invalid parameter was found.
> +
> +**/
> +MISC_SMBIOS_TABLE_FUNCTION(MiscChassisManufacturer)
> +{
> + CHAR8 *OptionalStrStart;
> + CHAR8 *StrStart;
> + UINTN RecordLength;
> + UINTN ManuStrLen;
> + UINTN VerStrLen;
> + UINTN AssertTagStrLen;
> + UINTN SerialNumStrLen;
> + UINTN ChaNumStrLen;
> + EFI_STRING Manufacturer;
> + EFI_STRING Version;
> + EFI_STRING SerialNumber;
> + EFI_STRING AssertTag;
> + EFI_STRING ChassisSkuNumber;
> + EFI_STRING_ID TokenToGet;
> + EFI_SMBIOS_HANDLE SmbiosHandle;
> + SMBIOS_TABLE_TYPE3 *SmbiosRecord;
> + SMBIOS_TABLE_TYPE3 *InputData;
> + EFI_STATUS Status;
> +
> + UINT8 ContainedElementCount;
> + CONTAINED_ELEMENT ContainedElements;
> + UINT8 ExtendLength;
> +
> + UINT8 ChassisType;
> +
> + ExtendLength = 0;
> +
> + //
> + // First check for invalid parameters.
> + //
> + if (RecordData == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + InputData = (SMBIOS_TABLE_TYPE3 *)RecordData;
> +
> + UpdateSmbiosInfo (
> + mHiiHandle,
> + STRING_TOKEN (STR_MISC_CHASSIS_ASSET_TAG),
> + AssetTagType03
> + );
> + UpdateSmbiosInfo (
> + mHiiHandle,
> + STRING_TOKEN (STR_MISC_CHASSIS_SERIAL_NUMBER),
> + SerialNumberType03
> + );
> + UpdateSmbiosInfo (
> + mHiiHandle,
> + STRING_TOKEN (STR_MISC_CHASSIS_VERSION),
> + VersionType03
> + );
> + UpdateSmbiosInfo (
> + mHiiHandle,
> + STRING_TOKEN (STR_MISC_CHASSIS_MANUFACTURER),
> + ManufacturerType03
> + );
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_MANUFACTURER);
> + Manufacturer = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,
> + NULL); ManuStrLen = StrLen (Manufacturer);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_VERSION); Version =
> + HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL); VerStrLen
> + = StrLen (Version);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_SERIAL_NUMBER);
> + SerialNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,
> + NULL); SerialNumStrLen = StrLen (SerialNumber);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_ASSET_TAG); AssertTag =
> + HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
> + AssertTagStrLen = StrLen (AssertTag);
> +
> + TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_SKU_NUMBER);
> + ChassisSkuNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,
> + NULL); ChaNumStrLen = StrLen (ChassisSkuNumber);
> +
> + ContainedElementCount = InputData->ContainedElementCount;
> +
> + if (ContainedElementCount > 1) {
> + ExtendLength = (ContainedElementCount - 1) * sizeof
> + (CONTAINED_ELEMENT); }
> +
> + //
> + // Two zeros following the last string.
> + //
> + RecordLength = sizeof (SMBIOS_TABLE_TYPE3) +
> + ExtendLength + 1 +
> + ManuStrLen + 1 +
> + VerStrLen + 1 +
> + SerialNumStrLen + 1 +
> + AssertTagStrLen + 1 +
> + ChaNumStrLen + 1 + 1;
> + SmbiosRecord = AllocateZeroPool (RecordLength); if (SmbiosRecord ==
> + NULL) {
> + Status = EFI_OUT_OF_RESOURCES;
> + goto Exit;
> + }
> +
> + (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE3));
> +
> + SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE3) + ExtendLength
> + + 1;
> +
> + ChassisType = GetChassisType ();
> + if (ChassisType != 0) {
> + SmbiosRecord->Type = ChassisType;
> + }
> +
> + //ContainedElements
> + ASSERT (ContainedElementCount < 2);
> + (VOID)CopyMem (SmbiosRecord + 1, &ContainedElements, ExtendLength);
> +
> + //ChassisSkuNumber
> + *((UINT8 *)SmbiosRecord + sizeof (SMBIOS_TABLE_TYPE3) + ExtendLength)
> + = 5;
> +
> + OptionalStrStart = (CHAR8 *)((UINT8 *)SmbiosRecord + sizeof
> + (SMBIOS_TABLE_TYPE3) + ExtendLength + 1); UnicodeStrToAsciiStrS
> + (Manufacturer, OptionalStrStart, ManuStrLen + 1); StrStart =
> + OptionalStrStart + ManuStrLen + 1; UnicodeStrToAsciiStrS (Version,
> + StrStart, VerStrLen + 1); StrStart += VerStrLen + 1;
> + UnicodeStrToAsciiStrS (SerialNumber, StrStart, SerialNumStrLen + 1);
> + StrStart += SerialNumStrLen + 1; UnicodeStrToAsciiStrS (AssertTag,
> + StrStart, AssertTagStrLen + 1); StrStart += AssertTagStrLen + 1;
> + UnicodeStrToAsciiStrS (ChassisSkuNumber, StrStart, ChaNumStrLen + 1);
> + // // Now we have got the full smbios record, call smbios protocol to
> + add this record.
> + //
> + Status = LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle); if
> + (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type03 Table Log Failed! %r
> \n",
> + __FUNCTION__, __LINE__, Status)); }
> +
> + FreePool (SmbiosRecord);
> +
> +Exit:
> + if (Manufacturer != NULL) {
> + FreePool (Manufacturer);
> + }
> +
> + if (Version != NULL) {
> + FreePool (Version);
> + }
> +
> + if (SerialNumber != NULL) {
> + FreePool (SerialNumber);
> + }
> +
> + if (AssertTag != NULL) {
> + FreePool (AssertTag);
> + }
> +
> + if (ChassisSkuNumber != NULL) {
> + FreePool (ChassisSkuNumber);
> + }
> +
> + return 0;
> +}
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer.
> uni
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer.
> uni
> new file mode 100644
> index 000000000000..dacb195bff28
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufactur
> +++ er.uni
> @@ -0,0 +1,17 @@
> +/** @file
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2010, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +/=#
> +
> +#string STR_MISC_CHASSIS_MANUFACTURER #language en-US "Not
> Specified"
> +#string STR_MISC_CHASSIS_VERSION #language en-US "Not Specified"
> +#string STR_MISC_CHASSIS_SERIAL_NUMBER #language en-US "Not
> Specified"
> +#string STR_MISC_CHASSIS_ASSET_TAG #language en-US "Not Specified"
> +#string STR_MISC_CHASSIS_SKU_NUMBER #language en-US "Not Specified"
> --
> 2.26.2
>
>
>
>
>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 15/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type03
2021-01-05 21:47 ` [edk2-devel] " Samer El-Haj-Mahmoud
@ 2021-01-11 23:34 ` Rebecca Cran
2021-01-12 2:58 ` Samer El-Haj-Mahmoud
0 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-11 23:34 UTC (permalink / raw)
To: devel, samer.el-haj-mahmoud, rebecca@nuviainc.com
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On 1/5/21 2:47 PM, Samer El-Haj-Mahmoud wrote:
> Platforms should be able to update their chassis boot state information. This is especially important for servers. Platform PCD or OEM library call?
Thanks. I agree. Do you consider this required for the series to be
committed, or could it be added afterwards? The series is getting rather
large, so if possible I'd like to make bug fixes and schedule follow-up
work.
--
Rebecca Cran
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [edk2-devel] [PATCH v5 15/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type03
2021-01-11 23:34 ` Rebecca Cran
@ 2021-01-12 2:58 ` Samer El-Haj-Mahmoud
0 siblings, 0 replies; 55+ messages in thread
From: Samer El-Haj-Mahmoud @ 2021-01-12 2:58 UTC (permalink / raw)
To: Rebecca Cran, devel@edk2.groups.io, rebecca@nuviainc.com
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
[-- Attachment #1: Type: text/plain, Size: 1436 bytes --]
Yes I think it is fine to add the enhancements later.
________________________________
From: Rebecca Cran <rebecca@bsdio.com>
Sent: Monday, January 11, 2021 6:34:27 PM
To: devel@edk2.groups.io <devel@edk2.groups.io>; Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>; rebecca@nuviainc.com <rebecca@nuviainc.com>
Cc: Leif Lindholm <leif@nuviainc.com>; Ard Biesheuvel <Ard.Biesheuvel@arm.com>; Sami Mujawar <Sami.Mujawar@arm.com>; Liming Gao <gaoliming@byosoft.com.cn>; Michael D Kinney <michael.d.kinney@intel.com>; Zhiguang Liu <zhiguang.liu@intel.com>
Subject: Re: [edk2-devel] [PATCH v5 15/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type03
On 1/5/21 2:47 PM, Samer El-Haj-Mahmoud wrote:
> Platforms should be able to update their chassis boot state information. This is especially important for servers. Platform PCD or OEM library call?
Thanks. I agree. Do you consider this required for the series to be
committed, or could it be added afterwards? The series is getting rather
large, so if possible I'd like to make bug fixes and schedule follow-up
work.
--
Rebecca Cran
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
[-- Attachment #2: Type: text/html, Size: 2374 bytes --]
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 16/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type13
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (14 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 15/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type03 Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-04 22:58 ` [PATCH v5 17/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type32 Rebecca Cran
` (7 subsequent siblings)
23 siblings, 0 replies; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
This code provides information for the SMBIOS Type 13 table.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesData.c | 32 ++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c | 156 ++++++++++++++++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguages.uni | 42 ++++++
3 files changed, 230 insertions(+)
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesData.c
new file mode 100644
index 000000000000..67a35408b700
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesData.c
@@ -0,0 +1,32 @@
+/** @file
+ This file provides Smbios Type13 Data
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+
+//
+// Static (possibly build generated) Bios Vendor data.
+//
+
+MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE13, MiscNumberOfInstallableLanguages) =
+{
+ { // Hdr
+ EFI_SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION, // Type,
+ 0, // Length,
+ 0 // Handle
+ },
+ 0, // InstallableLanguages
+ 0, // Flags
+ {
+ 0 // Reserved[15]
+ },
+ 1 // CurrentLanguage
+};
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c
new file mode 100644
index 000000000000..7f6071ee295c
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c
@@ -0,0 +1,156 @@
+/** @file
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+
+/**
+ Get next language from language code list (with separator ';').
+
+ @param LangCode Input: point to first language in the list. On
+ Otput: point to next language in the list, or
+ NULL if no more language in the list.
+ @param Lang The first language in the list.
+
+**/
+VOID
+EFIAPI
+GetNextLanguage (
+ IN OUT CHAR8 **LangCode,
+ OUT CHAR8 *Lang
+ )
+{
+ UINTN Index;
+ CHAR8 *StringPtr;
+
+ if (LangCode == NULL || *LangCode == NULL || Lang == NULL) {
+ return;
+ }
+
+ Index = 0;
+ StringPtr = *LangCode;
+ while (StringPtr[Index] != 0 && StringPtr[Index] != ';') {
+ Index++;
+ }
+
+ (VOID)CopyMem (Lang, StringPtr, Index);
+ Lang[Index] = 0;
+
+ if (StringPtr[Index] == ';') {
+ Index++;
+ }
+ *LangCode = StringPtr + Index;
+}
+
+/**
+ This function returns the number of supported languages on HiiHandle.
+
+ @param HiiHandle The HII package list handle.
+
+ @retval The number of supported languages.
+
+**/
+UINT16
+EFIAPI
+GetSupportedLanguageNumber (
+ IN EFI_HII_HANDLE HiiHandle
+ )
+{
+ CHAR8 *Lang;
+ CHAR8 *Languages;
+ CHAR8 *LanguageString;
+ UINT16 LangNumber;
+
+ Languages = HiiGetSupportedLanguages (HiiHandle);
+ if (Languages == NULL) {
+ return 0;
+ }
+
+ LangNumber = 0;
+ Lang = AllocatePool (AsciiStrSize (Languages));
+ if (Lang != NULL) {
+ LanguageString = Languages;
+ while (*LanguageString != 0) {
+ GetNextLanguage (&LanguageString, Lang);
+ LangNumber++;
+ }
+ FreePool (Lang);
+ }
+ FreePool (Languages);
+ return LangNumber;
+}
+
+
+/**
+ This function makes boot time changes to the contents of the
+ MiscNumberOfInstallableLanguages (Type 13).
+
+ @param RecordData Pointer to copy of RecordData from the Data Table.
+
+ @retval EFI_SUCCESS All parameters were valid.
+ @retval EFI_UNSUPPORTED Unexpected RecordType value.
+ @retval EFI_INVALID_PARAMETER Invalid parameter was found.
+
+**/
+MISC_SMBIOS_TABLE_FUNCTION(MiscNumberOfInstallableLanguages)
+{
+ UINTN LangStrLen;
+ CHAR8 CurrentLang[SMBIOS_STRING_MAX_LENGTH + 1];
+ CHAR8 *OptionalStrStart;
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ SMBIOS_TABLE_TYPE13 *SmbiosRecord;
+ SMBIOS_TABLE_TYPE13 *InputData;
+
+ InputData = NULL;
+
+ //
+ // First check for invalid parameters.
+ //
+ if (RecordData == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ InputData = (SMBIOS_TABLE_TYPE13 *)RecordData;
+
+ InputData->InstallableLanguages = GetSupportedLanguageNumber (mHiiHandle);
+
+ //
+ // Try to check if current langcode matches with the langcodes in installed languages
+ //
+ ZeroMem (CurrentLang, SMBIOS_STRING_MAX_LENGTH - 1);
+ (VOID)AsciiStrCpyS (CurrentLang, SMBIOS_STRING_MAX_LENGTH - 1, "en|US|iso8859-1");
+ LangStrLen = AsciiStrLen (CurrentLang);
+
+ //
+ // Two zeros following the last string.
+ //
+ SmbiosRecord = AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE13) + LangStrLen + 1 + 1);
+ if (SmbiosRecord == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE13));
+
+ SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE13);
+
+ OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
+ (VOID)AsciiStrCpyS (OptionalStrStart, SMBIOS_STRING_MAX_LENGTH - 1, CurrentLang);
+ //
+ // Now we have got the full smbios record, call smbios protocol to add this record.
+ //
+ Status = LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type13 Table Log Failed! %r \n",
+ __FUNCTION__, __LINE__, Status));
+ }
+
+ FreePool (SmbiosRecord);
+ return Status;
+}
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguages.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguages.uni
new file mode 100644
index 000000000000..0b61b0cd179f
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguages.uni
@@ -0,0 +1,42 @@
+/** @file
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+/=#
+
+/=#
+//
+// Language String (Long Format)
+//
+#string STR_MISC_BIOS_LANGUAGES_ENG_LONG #language en-US "en|US|iso8859-1"
+#string STR_MISC_BIOS_LANGUAGES_FRA_LONG #language en-US "fr|CA|iso8859-1"
+#string STR_MISC_BIOS_LANGUAGES_CHN_LONG #language en-US "zh|TW|unicode"
+#string STR_MISC_BIOS_LANGUAGES_JPN_LONG #language en-US "ja|JP|unicode"
+#string STR_MISC_BIOS_LANGUAGES_ITA_LONG #language en-US "it|IT|iso8859-1"
+#string STR_MISC_BIOS_LANGUAGES_SPA_LONG #language en-US "es|ES|iso8859-1"
+#string STR_MISC_BIOS_LANGUAGES_GER_LONG #language en-US "de|DE|iso8859-1"
+#string STR_MISC_BIOS_LANGUAGES_POR_LONG #language en-US "pt|PT|iso8859-1"
+
+
+//
+// Language String (Abbreviated Format)
+//
+#string STR_MISC_BIOS_LANGUAGES_ENG_ABBREVIATE #language en-US "enUS"
+#string STR_MISC_BIOS_LANGUAGES_FRA_ABBREVIATE #language en-US "frCA"
+#string STR_MISC_BIOS_LANGUAGES_CHN_ABBREVIATE #language en-US "zhTW"
+#string STR_MISC_BIOS_LANGUAGES_JPN_ABBREVIATE #language en-US "jaJP"
+#string STR_MISC_BIOS_LANGUAGES_ITA_ABBREVIATE #language en-US "itIT"
+#string STR_MISC_BIOS_LANGUAGES_SPA_ABBREVIATE #language en-US "esES"
+#string STR_MISC_BIOS_LANGUAGES_GER_ABBREVIATE #language en-US "deDE"
+#string STR_MISC_BIOS_LANGUAGES_POR_ABBREVIATE #language en-US "ptPT"
+
+#string STR_MISC_BIOS_LANGUAGES_SIMPLECH_ABBREVIATE #language en-US "zhCN"
+#string STR_MISC_BIOS_LANGUAGES_SIMPLECH_LONG #language en-US "zh|CN|unicode"
+
+
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* [PATCH v5 17/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type32
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (15 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 16/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type13 Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-05 21:12 ` [edk2-devel] " Samer El-Haj-Mahmoud
2021-01-04 22:58 ` [PATCH v5 18/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe Rebecca Cran
` (6 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
This code provides information for the SMBIOS Type 32 table.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationData.c | 34 ++++++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFunction.c | 66 ++++++++++++++++++++
2 files changed, 100 insertions(+)
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationData.c
new file mode 100644
index 000000000000..e72656d3b002
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationData.c
@@ -0,0 +1,34 @@
+/** @file
+ This driver parses the mMiscSubclassDataTable structure and reports
+ any generated data to the DataHub.
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+
+//
+// Static (possibly build generated) Bios Vendor data.
+//
+MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE32, MiscBootInformation) = {
+ { // Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, // Type,
+ 0, // Length,
+ 0 // Handle
+ },
+ { // Reserved[6]
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+ BootInformationStatusNoError // BootInformationStatus
+};
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFunction.c
new file mode 100644
index 000000000000..dabecbbd3a64
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFunction.c
@@ -0,0 +1,66 @@
+/** @file
+ boot information boot time changes.
+ SMBIOS type 32.
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+
+/**
+ This function makes boot time changes to the contents of the
+ MiscBootInformation (Type 32).
+
+ @param RecordData Pointer to copy of RecordData from the Data Table.
+
+ @retval EFI_SUCCESS All parameters were valid.
+ @retval EFI_UNSUPPORTED Unexpected RecordType value.
+ @retval EFI_INVALID_PARAMETER Invalid parameter was found.
+
+**/
+MISC_SMBIOS_TABLE_FUNCTION(MiscBootInformation)
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ SMBIOS_TABLE_TYPE32 *SmbiosRecord;
+ SMBIOS_TABLE_TYPE32 *InputData;
+
+ //
+ // First check for invalid parameters.
+ //
+ if (RecordData == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ InputData = (SMBIOS_TABLE_TYPE32 *)RecordData;
+
+ //
+ // Two zeros following the last string.
+ //
+ SmbiosRecord = AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE32) + 1 + 1);
+ if (SmbiosRecord == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE32));
+
+ SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE32);
+
+ //
+ // Now we have got the full smbios record, call smbios protocol to add this record.
+ //
+ Status = LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type32 Table Log Failed! %r \n",
+ __FUNCTION__, __LINE__, Status));
+ }
+
+ FreePool (SmbiosRecord);
+ return Status;
+}
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 17/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type32
2021-01-04 22:58 ` [PATCH v5 17/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type32 Rebecca Cran
@ 2021-01-05 21:12 ` Samer El-Haj-Mahmoud
0 siblings, 0 replies; 55+ messages in thread
From: Samer El-Haj-Mahmoud @ 2021-01-05 21:12 UTC (permalink / raw)
To: devel@edk2.groups.io, rebecca@nuviainc.com
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu, Samer El-Haj-Mahmoud
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Rebecca
> Cran via groups.io
> Sent: Monday, January 4, 2021 5:58 PM
> To: devel@edk2.groups.io
> Cc: Rebecca Cran <rebecca@nuviainc.com>; Leif Lindholm
> <leif@nuviainc.com>; Ard Biesheuvel <Ard.Biesheuvel@arm.com>; Sami
> Mujawar <Sami.Mujawar@arm.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Michael D Kinney
> <michael.d.kinney@intel.com>; Zhiguang Liu <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [PATCH v5 17/23] ArmPkg: Add
> Universal/Smbios/SmbiosMiscDxe/Type32
>
> This code provides information for the SMBIOS Type 32 table.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationDat
> a.c | 34 ++++++++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFu
> nction.c | 66 ++++++++++++++++++++
> 2 files changed, 100 insertions(+)
>
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformation
> Data.c
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformation
> Data.c
> new file mode 100644
> index 000000000000..e72656d3b002
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformation
> Da
> +++ ta.c
> @@ -0,0 +1,34 @@
> +/** @file
> + This driver parses the mMiscSubclassDataTable structure and reports
> + any generated data to the DataHub.
> +
This is not true in this specific implementation. There is no DataHub involved in this code
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2009, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SmbiosMisc.h"
> +
> +//
> +// Static (possibly build generated) Bios Vendor data.
> +//
> +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE32,
> MiscBootInformation) = {
> + { // Hdr
> + EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, // Type,
> + 0, // Length,
> + 0 // Handle
> + },
> + { // Reserved[6]
> + 0,
> + 0,
> + 0,
> + 0,
> + 0,
> + 0
> + },
> + BootInformationStatusNoError // BootInformationStatus
While most implementations in edk2-platforms do indeed hard-code this value to BootInformationStatusNoError, this is an incomplete implementation. Platforms should be able to report their boot status / and specific boot errors.
Can you use a platform dynamic PCD (and default to BootInformationStatusNoError), as done for example in Features/Intel/SystemInformation/SmbiosFeaturePkg/SmbiosFeaturePkg.dec ? Or maybe add to a library function in the newly introduced OemMiscLib ?
> +};
> diff --git
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationF
> unction.c
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationF
> unction.c
> new file mode 100644
> index 000000000000..dabecbbd3a64
> --- /dev/null
> +++
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationF
> u
> +++ nction.c
> @@ -0,0 +1,66 @@
> +/** @file
> + boot information boot time changes.
> + SMBIOS type 32.
> +
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2009 - 2011, Intel Corporation. All rights
> + reserved.<BR> Copyright (c) 2015, Hisilicon Limited. All rights
> + reserved.<BR> Copyright (c) 2015, Linaro Limited. All rights
> + reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SmbiosMisc.h"
> +
> +/**
> + This function makes boot time changes to the contents of the
> + MiscBootInformation (Type 32).
> +
> + @param RecordData Pointer to copy of RecordData from the Data
> Table.
> +
> + @retval EFI_SUCCESS All parameters were valid.
> + @retval EFI_UNSUPPORTED Unexpected RecordType value.
> + @retval EFI_INVALID_PARAMETER Invalid parameter was found.
> +
> +**/
> +MISC_SMBIOS_TABLE_FUNCTION(MiscBootInformation)
> +{
> + EFI_STATUS Status;
> + EFI_SMBIOS_HANDLE SmbiosHandle;
> + SMBIOS_TABLE_TYPE32 *SmbiosRecord;
> + SMBIOS_TABLE_TYPE32 *InputData;
> +
> + //
> + // First check for invalid parameters.
> + //
> + if (RecordData == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + InputData = (SMBIOS_TABLE_TYPE32 *)RecordData;
> +
> + //
> + // Two zeros following the last string.
> + //
> + SmbiosRecord = AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE32) + 1 +
> + 1); if (SmbiosRecord == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + (VOID)CopyMem (SmbiosRecord, InputData, sizeof
> + (SMBIOS_TABLE_TYPE32));
> +
> + SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE32);
> +
> + //
> + // Now we have got the full smbios record, call smbios protocol to add this
> record.
> + //
> + Status = LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle); if
> + (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type32 Table Log Failed! %r
> \n",
> + __FUNCTION__, __LINE__, Status)); }
> +
> + FreePool (SmbiosRecord);
> + return Status;
> +}
> --
> 2.26.2
>
>
>
>
>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 18/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (16 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 17/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type32 Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-10 2:03 ` Leif Lindholm
2021-01-04 22:58 ` [PATCH v5 19/23] ArmPkg: Add Library/OemMiscLib.h Rebecca Cran
` (5 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
SmbiosMiscDxe provides SMBIOS tables 0, 1, 2, 3, 13, and 32.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf | 86 +++++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h | 136 +++++++++++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c | 61 +++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c | 184 ++++++++++++++++++++
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStrings.uni | 21 +++
5 files changed, 488 insertions(+)
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
new file mode 100644
index 000000000000..06612f02b34c
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
@@ -0,0 +1,86 @@
+#/** @file
+# Component description file for SmbiosMisc instance.
+#
+# Parses the MiscSubclassDataTable and reports any generated data to the DataHub.
+# All .uni file who tagged with "ToolCode="DUMMY"" in following file list is included by
+# MiscSubclassDriver.uni file, the StrGather tool will expand MiscSubclassDriver.uni file
+# and parse all .uni file.
+#
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+# Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+# Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+#**/
+
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = SmbiosMiscDxe
+ FILE_GUID = 7e5e26d4-0be9-401f-b5e1-1c2bda7ca777
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = SmbiosMiscEntryPoint
+
+[Sources]
+ SmbiosMisc.h
+ SmbiosMiscDataTable.c
+ SmbiosMiscEntryPoint.c
+ SmbiosMiscLibStrings.uni
+ Type00/MiscBiosVendorData.c
+ Type00/MiscBiosVendorFunction.c
+ Type01/MiscSystemManufacturerData.c
+ Type01/MiscSystemManufacturerFunction.c
+ Type02/MiscBaseBoardManufacturerData.c
+ Type02/MiscBaseBoardManufacturerFunction.c
+ Type03/MiscChassisManufacturerData.c
+ Type03/MiscChassisManufacturerFunction.c
+ Type13/MiscNumberOfInstallableLanguagesData.c
+ Type13/MiscNumberOfInstallableLanguagesFunction.c
+ Type32/MiscBootInformationData.c
+ Type32/MiscBootInformationFunction.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ DevicePathLib
+ PcdLib
+ HiiLib
+ HobLib
+ MemoryAllocationLib
+ OemMiscLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ UefiLib
+ UefiRuntimeServicesTableLib
+
+[Protocols]
+ gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED
+
+[Pcd]
+ gArmTokenSpaceGuid.PcdFdSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
+ gArmTokenSpaceGuid.PcdSystemProductName
+ gArmTokenSpaceGuid.PcdSystemVersion
+ gArmTokenSpaceGuid.PcdBaseBoardManufacturer
+ gArmTokenSpaceGuid.PcdBaseBoardProductName
+ gArmTokenSpaceGuid.PcdBaseBoardVersion
+ gArmTokenSpaceGuid.PcdFdBaseAddress
+
+[Guids]
+ gEfiGenericVariableGuid
+
+[Depex]
+ gEfiSmbiosProtocolGuid
+
+
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h
new file mode 100644
index 000000000000..20840f40d04b
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h
@@ -0,0 +1,136 @@
+/** @file
+ Header file for the SmbiosMisc Driver.
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef SMBIOS_MISC_H_
+#define SMBIOS_MISC_H_
+
+#include <Protocol/Smbios.h>
+#include <IndustryStandard/SmBios.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HiiLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/OemMiscLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PrintLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Guid/DebugMask.h>
+
+
+//
+// Data table entry update function.
+//
+typedef EFI_STATUS (EFIAPI EFI_MISC_SMBIOS_DATA_FUNCTION) (
+ IN VOID *RecordData,
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ );
+
+
+//
+// Data table entry definition.
+//
+typedef struct {
+ //
+ // intermediate input data for SMBIOS record
+ //
+ VOID *RecordData;
+ EFI_MISC_SMBIOS_DATA_FUNCTION *Function;
+} EFI_MISC_SMBIOS_DATA_TABLE;
+
+
+//
+// SMBIOS table extern definitions
+//
+#define MISC_SMBIOS_TABLE_EXTERNS(NAME1, NAME2, NAME3) \
+extern NAME1 NAME2 ## Data; \
+extern EFI_MISC_SMBIOS_DATA_FUNCTION NAME3 ## Function;
+
+
+//
+// SMBIOS data table entries
+//
+// This is used to define a pair of table structure pointer and functions
+// in order to iterate through the list of tables, populate them and add
+// them into the system.
+#define MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION(NAME1, NAME2) \
+{ \
+ & NAME1 ## Data, \
+ NAME2 ## Function \
+}
+
+//
+// Global definition macros.
+//
+#define MISC_SMBIOS_TABLE_DATA(NAME1, NAME2) \
+ NAME1 NAME2 ## Data
+
+#define MISC_SMBIOS_TABLE_FUNCTION(NAME2) \
+ EFI_STATUS EFIAPI NAME2 ## Function( \
+ IN VOID *RecordData, \
+ IN EFI_SMBIOS_PROTOCOL *Smbios \
+ )
+
+//
+// Data Table Array Entries
+//
+extern EFI_HII_HANDLE mHiiHandle;
+
+typedef struct _EFI_TYPE13_BIOS_LANGUAGE_INFORMATION_STRING{
+ UINT8 *LanguageSignature;
+ EFI_STRING_ID InstallableLanguageLongString;
+ EFI_STRING_ID InstallableLanguageAbbreviateString;
+} EFI_TYPE13_BIOS_LANGUAGE_INFORMATION_STRING;
+
+
+/**
+ Logs SMBIOS record.
+
+ @param [in] Buffer Pointer to the data buffer.
+ @param [in] SmbiosHandle Pointer for retrieve handle.
+
+**/
+EFI_STATUS
+LogSmbiosData (
+ IN UINT8 *Buffer,
+ IN OUT EFI_SMBIOS_HANDLE *SmbiosHandle
+ );
+
+/**
+ Get Link Type Handle.
+
+ @param [in] SmbiosType Get this Type from SMBIOS table
+ @param [out] HandleArray Pointer to handle array which will be freed by caller
+ @param [out] HandleCount Pointer to handle count
+
+**/
+VOID
+GetLinkTypeHandle(
+ IN UINT8 SmbiosType,
+ OUT UINT16 **HandleArray,
+ OUT UINTN *HandleCount
+ );
+
+//
+// Data Table Array
+//
+extern EFI_MISC_SMBIOS_DATA_TABLE mSmbiosMiscDataTable[];
+
+//
+// Data Table Array Entries
+//
+extern UINTN mSmbiosMiscDataTableEntries;
+extern UINT8 SmbiosMiscDxeStrings[];
+
+#endif // SMBIOS_MISC_H_
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c
new file mode 100644
index 000000000000..c9f460f1d5a8
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c
@@ -0,0 +1,61 @@
+/** @file
+ This file provides SMBIOS Misc Type.
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent\
+
+**/
+
+#include "SmbiosMisc.h"
+
+MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE0,
+ MiscBiosVendor,
+ MiscBiosVendor)
+MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE1,
+ MiscSystemManufacturer,
+ MiscSystemManufacturer)
+MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE3,
+ MiscChassisManufacturer,
+ MiscChassisManufacturer)
+MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE2,
+ MiscBaseBoardManufacturer,
+ MiscBaseBoardManufacturer)
+MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE13,
+ MiscNumberOfInstallableLanguages,
+ MiscNumberOfInstallableLanguages)
+MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE32,
+ MiscBootInformation,
+ MiscBootInformation)
+
+
+EFI_MISC_SMBIOS_DATA_TABLE mSmbiosMiscDataTable[] = {
+ // Type0
+ MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBiosVendor,
+ MiscBiosVendor),
+ // Type1
+ MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscSystemManufacturer,
+ MiscSystemManufacturer),
+ // Type3
+ MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscChassisManufacturer,
+ MiscChassisManufacturer),
+ // Type2
+ MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBaseBoardManufacturer,
+ MiscBaseBoardManufacturer),
+ // Type13
+ MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscNumberOfInstallableLanguages,
+ MiscNumberOfInstallableLanguages),
+ // Type32
+ MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBootInformation,
+ MiscBootInformation),
+};
+
+
+//
+// Number of Data Table entries.
+//
+UINTN mSmbiosMiscDataTableEntries =
+ (sizeof (mSmbiosMiscDataTable)) / sizeof (EFI_MISC_SMBIOS_DATA_TABLE);
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c
new file mode 100644
index 000000000000..afd96476a843
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c
@@ -0,0 +1,184 @@
+/** @file
+ This driver parses the mSmbiosMiscDataTable structure and reports
+ any generated data using SMBIOS protocol.
+
+ Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+
+ Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SmbiosMisc.h"
+
+
+EFI_HANDLE mImageHandle;
+EFI_HII_HANDLE mHiiHandle;
+EFI_SMBIOS_PROTOCOL *mSmbios = NULL;
+
+/**
+ Standard EFI driver point. This driver parses the mSmbiosMiscDataTable
+ structure and reports any generated data using SMBIOS protocol.
+
+ @param ImageHandle Handle for the image of this driver
+ @param SystemTable Pointer to the EFI System Table
+
+ @retval EFI_SUCCESS The data was successfully stored.
+
+**/
+EFI_STATUS
+EFIAPI
+SmbiosMiscEntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ UINTN Index;
+ EFI_STATUS EfiStatus;
+ EFI_SMBIOS_PROTOCOL *Smbios;
+
+ mImageHandle = ImageHandle;
+
+ EfiStatus = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID**)&Smbios);
+ if (EFI_ERROR (EfiStatus)) {
+ DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol. %r\n", EfiStatus));
+ return EfiStatus;
+ }
+
+ mSmbios = Smbios;
+
+ mHiiHandle = HiiAddPackages (
+ &gEfiCallerIdGuid,
+ mImageHandle,
+ SmbiosMiscDxeStrings,
+ NULL
+ );
+ if (mHiiHandle == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (Index = 0; Index < mSmbiosMiscDataTableEntries; ++Index) {
+ //
+ // If the entry have a function pointer, just log the data.
+ //
+ if (mSmbiosMiscDataTable[Index].Function != NULL) {
+ EfiStatus = (*mSmbiosMiscDataTable[Index].Function)(
+ mSmbiosMiscDataTable[Index].RecordData,
+ Smbios
+ );
+
+ if (EFI_ERROR(EfiStatus)) {
+ DEBUG ((DEBUG_ERROR, "Misc smbios store error. Index=%d, ReturnStatus=%r\n", Index, EfiStatus));
+ return EfiStatus;
+ }
+ }
+ }
+
+ return EfiStatus;
+}
+
+
+/**
+ Logs SMBIOS record.
+
+ @param Buffer The data for the fixed portion of the SMBIOS record. The format of the record is
+ determined by EFI_SMBIOS_TABLE_HEADER.Type. The size of the formatted area is defined
+ by EFI_SMBIOS_TABLE_HEADER.Length and either followed by a double-null (0x0000) or
+ a set of null terminated strings and a null.
+ @param SmbiosHandle A unique handle will be assigned to the SMBIOS record.
+
+ @retval EFI_SUCCESS Record was added.
+ @retval EFI_OUT_OF_RESOURCES Record was not added due to lack of system resources.
+
+**/
+EFI_STATUS
+LogSmbiosData (
+ IN UINT8 *Buffer,
+ IN OUT EFI_SMBIOS_HANDLE *SmbiosHandle
+ )
+{
+ EFI_STATUS Status;
+
+ *SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
+
+ Status = mSmbios->Add (
+ mSmbios,
+ NULL,
+ SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER *)Buffer
+ );
+
+ return Status;
+}
+
+/**
+ Fetches a list of the specified SMBIOS table types.
+
+ @param[in] SmbiosType The type of table to fetch
+ @param[out] **HandleArray The array of handles
+ @param[out] *HandleCount Number of handles in the array
+**/
+VOID
+GetLinkTypeHandle(
+ IN UINT8 SmbiosType,
+ OUT SMBIOS_HANDLE **HandleArray,
+ OUT UINTN *HandleCount
+ )
+{
+ UINTN Index;
+ EFI_STATUS Status;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ EFI_SMBIOS_TABLE_HEADER *Record;
+
+ if (mSmbios == NULL) {
+ return;
+ }
+
+ SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
+ *HandleCount = 0;
+
+ // Iterate through entries to get the number
+ while (TRUE) {
+ Status = mSmbios->GetNext (
+ mSmbios,
+ &SmbiosHandle,
+ &SmbiosType,
+ &Record,
+ NULL
+ );
+
+ if (!EFI_ERROR (Status)) {
+ (*HandleCount)++;
+ } else {
+ break;
+ }
+ }
+
+ *HandleArray = AllocateZeroPool (sizeof (SMBIOS_HANDLE) * (*HandleCount));
+ if (*HandleArray == NULL) {
+ DEBUG ((DEBUG_ERROR, "HandleArray allocate memory resource failed.\n"));
+ *HandleCount = 0;
+ return;
+ }
+
+ SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
+
+ for (Index = 0; Index < (*HandleCount); Index++) {
+ Status = mSmbios->GetNext (
+ mSmbios,
+ &SmbiosHandle,
+ &SmbiosType,
+ &Record,
+ NULL
+ );
+
+ if (!EFI_ERROR (Status)) {
+ (*HandleArray)[Index] = Record->Handle;
+ } else {
+ break;
+ }
+ }
+}
+
diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStrings.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStrings.uni
new file mode 100644
index 000000000000..32f30b41566d
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStrings.uni
@@ -0,0 +1,21 @@
+/** @file
+ * Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
+ *
+ * Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ * Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
+ * Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ *
+**/
+
+
+/=#
+
+#langdef en-US "English"
+
+#include "Type00/MiscBiosVendor.uni"
+#include "Type01/MiscSystemManufacturer.uni"
+#include "Type02/MiscBaseBoardManufacturer.uni"
+#include "Type03/MiscChassisManufacturer.uni"
+#include "Type13/MiscNumberOfInstallableLanguages.uni"
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH v5 18/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe
2021-01-04 22:58 ` [PATCH v5 18/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe Rebecca Cran
@ 2021-01-10 2:03 ` Leif Lindholm
2021-01-11 0:21 ` Rebecca Cran
2021-01-12 23:22 ` Rebecca Cran
0 siblings, 2 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 2:03 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:25 -0700, Rebecca Cran wrote:
> SmbiosMiscDxe provides SMBIOS tables 0, 1, 2, 3, 13, and 32.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf | 86 +++++++++
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h | 136 +++++++++++++++
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c | 61 +++++++
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c | 184 ++++++++++++++++++++
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStrings.uni | 21 +++
> 5 files changed, 488 insertions(+)
>
> diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
> new file mode 100644
> index 000000000000..06612f02b34c
> --- /dev/null
> +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
> @@ -0,0 +1,86 @@
> +#/** @file
> +# Component description file for SmbiosMisc instance.
> +#
> +# Parses the MiscSubclassDataTable and reports any generated data to the DataHub.
> +# All .uni file who tagged with "ToolCode="DUMMY"" in following file list is included by
> +# MiscSubclassDriver.uni file, the StrGather tool will expand MiscSubclassDriver.uni file
> +# and parse all .uni file.
> +#
> +# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
> +# Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#
> +# Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +#**/
> +
> +
> +[Defines]
> + INF_VERSION = 1.29
> + BASE_NAME = SmbiosMiscDxe
> + FILE_GUID = 7e5e26d4-0be9-401f-b5e1-1c2bda7ca777
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = SmbiosMiscEntryPoint
> +
> +[Sources]
> + SmbiosMisc.h
> + SmbiosMiscDataTable.c
> + SmbiosMiscEntryPoint.c
> + SmbiosMiscLibStrings.uni
> + Type00/MiscBiosVendorData.c
> + Type00/MiscBiosVendorFunction.c
> + Type01/MiscSystemManufacturerData.c
> + Type01/MiscSystemManufacturerFunction.c
> + Type02/MiscBaseBoardManufacturerData.c
> + Type02/MiscBaseBoardManufacturerFunction.c
> + Type03/MiscChassisManufacturerData.c
> + Type03/MiscChassisManufacturerFunction.c
> + Type13/MiscNumberOfInstallableLanguagesData.c
> + Type13/MiscNumberOfInstallableLanguagesFunction.c
> + Type32/MiscBootInformationData.c
> + Type32/MiscBootInformationFunction.c
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> +
> +[LibraryClasses]
> + BaseLib
> + BaseMemoryLib
> + DebugLib
> + DevicePathLib
> + PcdLib
> + HiiLib
> + HobLib
> + MemoryAllocationLib
> + OemMiscLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> + UefiLib
> + UefiRuntimeServicesTableLib
> +
> +[Protocols]
> + gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED
> +
> +[Pcd]
> + gArmTokenSpaceGuid.PcdFdSize
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
> + gArmTokenSpaceGuid.PcdSystemProductName
> + gArmTokenSpaceGuid.PcdSystemVersion
> + gArmTokenSpaceGuid.PcdBaseBoardManufacturer
> + gArmTokenSpaceGuid.PcdBaseBoardProductName
> + gArmTokenSpaceGuid.PcdBaseBoardVersion
> + gArmTokenSpaceGuid.PcdFdBaseAddress
> +
> +[Guids]
> + gEfiGenericVariableGuid
> +
> +[Depex]
> + gEfiSmbiosProtocolGuid
> +
> +
> diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h
> new file mode 100644
> index 000000000000..20840f40d04b
> --- /dev/null
> +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h
> @@ -0,0 +1,136 @@
> +/** @file
> + Header file for the SmbiosMisc Driver.
> +
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
> + Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef SMBIOS_MISC_H_
> +#define SMBIOS_MISC_H_
> +
> +#include <Protocol/Smbios.h>
> +#include <IndustryStandard/SmBios.h>
We appear to still have a discrepancy w.r.t. Smbios/SmBios capitalisation.
> +#include <Library/BaseLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/HiiLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/OemMiscLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/PrintLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +#include <Library/UefiRuntimeServicesTableLib.h>
> +#include <Guid/DebugMask.h>
This is definitely more includes than are required by this file.
Please include only those providing definitions required by this file.
> +
> +
> +//
> +// Data table entry update function.
> +//
> +typedef EFI_STATUS (EFIAPI EFI_MISC_SMBIOS_DATA_FUNCTION) (
> + IN VOID *RecordData,
> + IN EFI_SMBIOS_PROTOCOL *Smbios
> + );
> +
> +
> +//
> +// Data table entry definition.
> +//
> +typedef struct {
> + //
> + // intermediate input data for SMBIOS record
> + //
> + VOID *RecordData;
> + EFI_MISC_SMBIOS_DATA_FUNCTION *Function;
> +} EFI_MISC_SMBIOS_DATA_TABLE;
EFI_ prefix is reserved for structs defined by the UEFI specification.
SMBIOSMISC_DATA_TABLE or SMBIOS_MISC_DATA_TABLE would seem appropriate.
> +
> +
> +//
> +// SMBIOS table extern definitions
> +//
> +#define MISC_SMBIOS_TABLE_EXTERNS(NAME1, NAME2, NAME3) \
> +extern NAME1 NAME2 ## Data; \
> +extern EFI_MISC_SMBIOS_DATA_FUNCTION NAME3 ## Function;
> +
> +
> +//
> +// SMBIOS data table entries
> +//
> +// This is used to define a pair of table structure pointer and functions
> +// in order to iterate through the list of tables, populate them and add
> +// them into the system.
> +#define MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION(NAME1, NAME2) \
> +{ \
> + & NAME1 ## Data, \
> + NAME2 ## Function \
> +}
> +
> +//
> +// Global definition macros.
> +//
> +#define MISC_SMBIOS_TABLE_DATA(NAME1, NAME2) \
> + NAME1 NAME2 ## Data
> +
> +#define MISC_SMBIOS_TABLE_FUNCTION(NAME2) \
> + EFI_STATUS EFIAPI NAME2 ## Function( \
> + IN VOID *RecordData, \
> + IN EFI_SMBIOS_PROTOCOL *Smbios \
> + )
> +
> +//
> +// Data Table Array Entries
> +//
> +extern EFI_HII_HANDLE mHiiHandle;
While the m prefix indicates this as a module-local variable, the
actual linkage visibility is global - so a more unique name would be
preferable. (e.g, mSmbiosMiscHiiHandle)
> +
> +typedef struct _EFI_TYPE13_BIOS_LANGUAGE_INFORMATION_STRING{
> + UINT8 *LanguageSignature;
> + EFI_STRING_ID InstallableLanguageLongString;
> + EFI_STRING_ID InstallableLanguageAbbreviateString;
> +} EFI_TYPE13_BIOS_LANGUAGE_INFORMATION_STRING;
EFI_ prefix.
> +
> +
> +/**
> + Logs SMBIOS record.
> +
> + @param [in] Buffer Pointer to the data buffer.
> + @param [in] SmbiosHandle Pointer for retrieve handle.
> +
> +**/
> +EFI_STATUS
> +LogSmbiosData (
Similarly, global visibility:
SmbiosMiscLogData?
> + IN UINT8 *Buffer,
> + IN OUT EFI_SMBIOS_HANDLE *SmbiosHandle
> + );
> +
> +/**
> + Get Link Type Handle.
> +
> + @param [in] SmbiosType Get this Type from SMBIOS table
> + @param [out] HandleArray Pointer to handle array which will be freed by caller
> + @param [out] HandleCount Pointer to handle count
> +
> +**/
> +VOID
> +GetLinkTypeHandle(
SmbiosMiscGetLinkTypeHandle?
> + IN UINT8 SmbiosType,
> + OUT UINT16 **HandleArray,
> + OUT UINTN *HandleCount
> + );
> +
> +//
> +// Data Table Array
> +//
> +extern EFI_MISC_SMBIOS_DATA_TABLE mSmbiosMiscDataTable[];
> +
> +//
> +// Data Table Array Entries
> +//
> +extern UINTN mSmbiosMiscDataTableEntries;
> +extern UINT8 SmbiosMiscDxeStrings[];
Also needs m prefix.
> +
> +#endif // SMBIOS_MISC_H_
> diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c
> new file mode 100644
> index 000000000000..c9f460f1d5a8
> --- /dev/null
> +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c
> @@ -0,0 +1,61 @@
> +/** @file
> + This file provides SMBIOS Misc Type.
> +
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
> + Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent\
> +
> +**/
> +
> +#include "SmbiosMisc.h"
> +
> +MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE0,
> + MiscBiosVendor,
> + MiscBiosVendor)
> +MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE1,
> + MiscSystemManufacturer,
> + MiscSystemManufacturer)
> +MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE3,
> + MiscChassisManufacturer,
> + MiscChassisManufacturer)
> +MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE2,
> + MiscBaseBoardManufacturer,
> + MiscBaseBoardManufacturer)
> +MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE13,
> + MiscNumberOfInstallableLanguages,
> + MiscNumberOfInstallableLanguages)
> +MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE32,
> + MiscBootInformation,
> + MiscBootInformation)
> +
> +
> +EFI_MISC_SMBIOS_DATA_TABLE mSmbiosMiscDataTable[] = {
> + // Type0
> + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBiosVendor,
> + MiscBiosVendor),
> + // Type1
> + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscSystemManufacturer,
> + MiscSystemManufacturer),
> + // Type3
> + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscChassisManufacturer,
> + MiscChassisManufacturer),
> + // Type2
> + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBaseBoardManufacturer,
> + MiscBaseBoardManufacturer),
> + // Type13
> + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscNumberOfInstallableLanguages,
> + MiscNumberOfInstallableLanguages),
> + // Type32
> + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBootInformation,
> + MiscBootInformation),
> +};
> +
> +
> +//
> +// Number of Data Table entries.
> +//
> +UINTN mSmbiosMiscDataTableEntries =
> + (sizeof (mSmbiosMiscDataTable)) / sizeof (EFI_MISC_SMBIOS_DATA_TABLE);
> diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c
> new file mode 100644
> index 000000000000..afd96476a843
> --- /dev/null
> +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c
> @@ -0,0 +1,184 @@
> +/** @file
> + This driver parses the mSmbiosMiscDataTable structure and reports
> + any generated data using SMBIOS protocol.
> +
> + Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> +
> + Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
> + Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SmbiosMisc.h"
> +
> +
> +EFI_HANDLE mImageHandle;
> +EFI_HII_HANDLE mHiiHandle;
> +EFI_SMBIOS_PROTOCOL *mSmbios = NULL;
mImageHandle and mSmbios are also a bit too generically named.
> +
> +/**
> + Standard EFI driver point. This driver parses the mSmbiosMiscDataTable
> + structure and reports any generated data using SMBIOS protocol.
> +
> + @param ImageHandle Handle for the image of this driver
> + @param SystemTable Pointer to the EFI System Table
> +
> + @retval EFI_SUCCESS The data was successfully stored.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +SmbiosMiscEntryPoint(
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + UINTN Index;
> + EFI_STATUS EfiStatus;
> + EFI_SMBIOS_PROTOCOL *Smbios;
> +
> + mImageHandle = ImageHandle;
> +
> + EfiStatus = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID**)&Smbios);
> + if (EFI_ERROR (EfiStatus)) {
> + DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol. %r\n", EfiStatus));
> + return EfiStatus;
> + }
> +
> + mSmbios = Smbios;
If the call fails, *Smbios will contain NULL.
So is it really needed as a separate variable, or could this use
mSmbios directly?
> +
> + mHiiHandle = HiiAddPackages (
> + &gEfiCallerIdGuid,
> + mImageHandle,
> + SmbiosMiscDxeStrings,
> + NULL
> + );
> + if (mHiiHandle == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + for (Index = 0; Index < mSmbiosMiscDataTableEntries; ++Index) {
> + //
> + // If the entry have a function pointer, just log the data.
> + //
> + if (mSmbiosMiscDataTable[Index].Function != NULL) {
> + EfiStatus = (*mSmbiosMiscDataTable[Index].Function)(
> + mSmbiosMiscDataTable[Index].RecordData,
> + Smbios
> + );
> +
> + if (EFI_ERROR(EfiStatus)) {
> + DEBUG ((DEBUG_ERROR, "Misc smbios store error. Index=%d, ReturnStatus=%r\n", Index, EfiStatus));
Please wrap.
> + return EfiStatus;
> + }
> + }
> + }
> +
> + return EfiStatus;
> +}
> +
> +
> +/**
> + Logs SMBIOS record.
> +
> + @param Buffer The data for the fixed portion of the SMBIOS record. The format of the record is
> + determined by EFI_SMBIOS_TABLE_HEADER.Type. The size of the formatted area is defined
> + by EFI_SMBIOS_TABLE_HEADER.Length and either followed by a double-null (0x0000) or
> + a set of null terminated strings and a null.
> + @param SmbiosHandle A unique handle will be assigned to the SMBIOS record.
> +
> + @retval EFI_SUCCESS Record was added.
> + @retval EFI_OUT_OF_RESOURCES Record was not added due to lack of system resources.
Please wrap long lines.
> +
> +**/
> +EFI_STATUS
> +LogSmbiosData (
> + IN UINT8 *Buffer,
> + IN OUT EFI_SMBIOS_HANDLE *SmbiosHandle
> + )
> +{
> + EFI_STATUS Status;
> +
> + *SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
> +
> + Status = mSmbios->Add (
> + mSmbios,
Indentation.
> + NULL,
> + SmbiosHandle,
> + (EFI_SMBIOS_TABLE_HEADER *)Buffer
> + );
> +
> + return Status;
> +}
> +
> +/**
> + Fetches a list of the specified SMBIOS table types.
> +
> + @param[in] SmbiosType The type of table to fetch
> + @param[out] **HandleArray The array of handles
> + @param[out] *HandleCount Number of handles in the array
> +**/
> +VOID
> +GetLinkTypeHandle(
> + IN UINT8 SmbiosType,
> + OUT SMBIOS_HANDLE **HandleArray,
> + OUT UINTN *HandleCount
> + )
> +{
> + UINTN Index;
> + EFI_STATUS Status;
> + EFI_SMBIOS_HANDLE SmbiosHandle;
> + EFI_SMBIOS_TABLE_HEADER *Record;
> +
> + if (mSmbios == NULL) {
> + return;
> + }
> +
> + SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
> + *HandleCount = 0;
> +
> + // Iterate through entries to get the number
> + while (TRUE) {
> + Status = mSmbios->GetNext (
> + mSmbios,
> + &SmbiosHandle,
> + &SmbiosType,
> + &Record,
> + NULL
> + );
> +
> + if (!EFI_ERROR (Status)) {
> + (*HandleCount)++;
> + } else {
> + break;
> + }
> + }
Would this look neater as
do {
...
if (Status == EFI_SUCCESS) {
(*HandleCount)++;
}
} while (!EFI_ERROR (Status));
?
But actually, could you break the count out into a static helper function?
/
Leif
> +
> + *HandleArray = AllocateZeroPool (sizeof (SMBIOS_HANDLE) * (*HandleCount));
> + if (*HandleArray == NULL) {
> + DEBUG ((DEBUG_ERROR, "HandleArray allocate memory resource failed.\n"));
> + *HandleCount = 0;
> + return;
> + }
> +
> + SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
> +
> + for (Index = 0; Index < (*HandleCount); Index++) {
> + Status = mSmbios->GetNext (
> + mSmbios,
> + &SmbiosHandle,
> + &SmbiosType,
> + &Record,
> + NULL
> + );
> +
> + if (!EFI_ERROR (Status)) {
> + (*HandleArray)[Index] = Record->Handle;
> + } else {
> + break;
> + }
> + }
> +}
> +
> diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStrings.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStrings.uni
> new file mode 100644
> index 000000000000..32f30b41566d
> --- /dev/null
> +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStrings.uni
> @@ -0,0 +1,21 @@
> +/** @file
> + * Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
> + *
> + * Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
> + * Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
> + * Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
> + * SPDX-License-Identifier: BSD-2-Clause-Patent
> + *
> + *
> +**/
> +
> +
> +/=#
> +
> +#langdef en-US "English"
> +
> +#include "Type00/MiscBiosVendor.uni"
> +#include "Type01/MiscSystemManufacturer.uni"
> +#include "Type02/MiscBaseBoardManufacturer.uni"
> +#include "Type03/MiscChassisManufacturer.uni"
> +#include "Type13/MiscNumberOfInstallableLanguages.uni"
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [PATCH v5 18/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe
2021-01-10 2:03 ` Leif Lindholm
@ 2021-01-11 0:21 ` Rebecca Cran
2021-01-11 1:29 ` Leif Lindholm
2021-01-12 23:22 ` Rebecca Cran
1 sibling, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-11 0:21 UTC (permalink / raw)
To: Leif Lindholm
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On 1/9/21 7:03 PM, Leif Lindholm wrote:
> On Mon, Jan 04, 2021 at 15:58:25 -0700, Rebecca Cran wrote:
>> +#include <Protocol/Smbios.h>
>> +#include <IndustryStandard/SmBios.h>
>
> We appear to still have a discrepancy w.r.t. Smbios/SmBios capitalisation.
I was planning to commit the SMBIOS series and then fix the
capitalization of the header to be Smbios.h - should I do it the other
way around?
--
Rebecca Cran
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH v5 18/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe
2021-01-11 0:21 ` Rebecca Cran
@ 2021-01-11 1:29 ` Leif Lindholm
2021-01-11 5:22 ` 回复: [edk2-devel] " gaoliming
0 siblings, 1 reply; 55+ messages in thread
From: Leif Lindholm @ 2021-01-11 1:29 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Sun, Jan 10, 2021 at 17:21:16 -0700, Rebecca Cran wrote:
> On 1/9/21 7:03 PM, Leif Lindholm wrote:
> > On Mon, Jan 04, 2021 at 15:58:25 -0700, Rebecca Cran wrote:
>
> > > +#include <Protocol/Smbios.h>
> > > +#include <IndustryStandard/SmBios.h>
> >
> > We appear to still have a discrepancy w.r.t. Smbios/SmBios capitalisation.
>
> I was planning to commit the SMBIOS series and then fix the capitalization
> of the header to be Smbios.h - should I do it the other way around?
That would make this set cleaner.
Also, we're approaching the halfway point of this development cycle,
and since renaming IndustryStandard/SmBios.h and Guid/SmBios.h *will*
break many out-of-tree platforms, it's better to get it in sooner
rather than later.
(Presumably builds on Windows and Os X will succeed anyway, but ...)
It would be nice if you could also submit a set fixing up the include
statements in all of the edk2-platforms ports.
/
Leif
^ permalink raw reply [flat|nested] 55+ messages in thread* 回复: [edk2-devel] [PATCH v5 18/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe
2021-01-11 1:29 ` Leif Lindholm
@ 2021-01-11 5:22 ` gaoliming
0 siblings, 0 replies; 55+ messages in thread
From: gaoliming @ 2021-01-11 5:22 UTC (permalink / raw)
To: devel, leif, 'Rebecca Cran'
Cc: 'Ard Biesheuvel', 'nd @ arm . com . Sami Mujawar',
'Michael D Kinney', 'Zhiguang Liu'
Leif:
There are three SmBios.h files in MdePkg. Their file name are
inconsistent. But, they exist since they were added, Protocol\Smbios.h was
added on 2009. This is the known issue. So, I don't suggest to rename their
file name.
MdePkg\Include\Guid\SmBios.h
MdePkg\Include\Protocol\Smbios.h
MdePkg\Include\IndustryStandard\SmBios.h
Thanks
Liming
> -----邮件原件-----
> 发件人: bounce+27952+70095+4905953+8761045@groups.io
> <bounce+27952+70095+4905953+8761045@groups.io> 代表 Leif Lindholm
> 发送时间: 2021年1月11日 9:30
> 收件人: Rebecca Cran <rebecca@nuviainc.com>
> 抄送: devel@edk2.groups.io; Ard Biesheuvel <ard.biesheuvel@arm.com>; nd
> @ arm . com . Sami Mujawar <Sami.Mujawar@arm.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Michael D Kinney
> <michael.d.kinney@intel.com>; Zhiguang Liu <zhiguang.liu@intel.com>
> 主题: Re: [edk2-devel] [PATCH v5 18/23] ArmPkg: Add
> Universal/Smbios/SmbiosMiscDxe
>
> On Sun, Jan 10, 2021 at 17:21:16 -0700, Rebecca Cran wrote:
> > On 1/9/21 7:03 PM, Leif Lindholm wrote:
> > > On Mon, Jan 04, 2021 at 15:58:25 -0700, Rebecca Cran wrote:
> >
> > > > +#include <Protocol/Smbios.h>
> > > > +#include <IndustryStandard/SmBios.h>
> > >
> > > We appear to still have a discrepancy w.r.t. Smbios/SmBios
capitalisation.
> >
> > I was planning to commit the SMBIOS series and then fix the
capitalization
> > of the header to be Smbios.h - should I do it the other way around?
>
> That would make this set cleaner.
>
> Also, we're approaching the halfway point of this development cycle,
> and since renaming IndustryStandard/SmBios.h and Guid/SmBios.h *will*
> break many out-of-tree platforms, it's better to get it in sooner
> rather than later.
>
> (Presumably builds on Windows and Os X will succeed anyway, but ...)
>
> It would be nice if you could also submit a set fixing up the include
> statements in all of the edk2-platforms ports.
>
> /
> Leif
>
>
>
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [PATCH v5 18/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe
2021-01-10 2:03 ` Leif Lindholm
2021-01-11 0:21 ` Rebecca Cran
@ 2021-01-12 23:22 ` Rebecca Cran
1 sibling, 0 replies; 55+ messages in thread
From: Rebecca Cran @ 2021-01-12 23:22 UTC (permalink / raw)
To: Leif Lindholm
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On 1/9/21 7:03 PM, Leif Lindholm wrote:
> On Mon, Jan 04, 2021 at 15:58:25 -0700, Rebecca Cran wrote:
>> +//
>> +// Data Table Array Entries
>> +//
>> +extern UINTN mSmbiosMiscDataTableEntries;
>> +extern UINT8 SmbiosMiscDxeStrings[];
>
> Also needs m prefix.
This identifier comes from the file name, so I don't think it's
something I can change.
--
Rebecca Cran
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 19/23] ArmPkg: Add Library/OemMiscLib.h
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (17 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 18/23] ArmPkg: Add Universal/Smbios/SmbiosMiscDxe Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-10 2:08 ` Leif Lindholm
2021-01-04 22:58 ` [PATCH v5 20/23] ArmPkg: Add Universal/Smbios/OemMiscLibNull Rebecca Cran
` (4 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
OemMiscLib.h provides the interface which platforms should implement to
interact with the SmbiosMiscDxe and ProcessorSubClassDxe drivers to
update SMBIOS tables.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Include/Library/OemMiscLib.h | 159 ++++++++++++++++++++
1 file changed, 159 insertions(+)
diff --git a/ArmPkg/Include/Library/OemMiscLib.h b/ArmPkg/Include/Library/OemMiscLib.h
new file mode 100644
index 000000000000..83562a3ece9d
--- /dev/null
+++ b/ArmPkg/Include/Library/OemMiscLib.h
@@ -0,0 +1,159 @@
+/** @file
+*
+* Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2015, Linaro Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+
+#ifndef OEM_MISC_LIB_H_
+#define OEM_MISC_LIB_H_
+
+#include <Uefi.h>
+#include <IndustryStandard/SmBios.h>
+
+typedef enum
+{
+ CpuCacheL1 = 0,
+ CpuCacheL2,
+ CpuCacheL3,
+ CpuCacheL4,
+ CpuCacheL5,
+ CpuCacheL6,
+ CpuCacheL7,
+ CpuCacheLevelMax
+} CPU_CACHE_LEVEL;
+
+typedef struct
+{
+ UINT8 Voltage; ///< Processor voltage
+ UINT16 CurrentSpeed; ///< Current clock speed in MHz
+ UINT16 MaxSpeed; ///< Maximum clock speed in MHz
+ UINT16 ExternalClock; ///< External clock speed in MHz
+ UINT16 CoreCount; ///< Number of cores available
+ UINT16 CoresEnabled; ///< Number of cores enabled
+ UINT16 ThreadCount; ///< Number of threads per processor
+} MISC_PROCESSOR_DATA;
+
+typedef enum {
+ ProductNameType01,
+ SerialNumType01,
+ UuidType01,
+ SystemManufacturerType01,
+ AssertTagType02,
+ SerialNumberType02,
+ BoardManufacturerType02,
+ AssetTagType03,
+ SerialNumberType03,
+ VersionType03,
+ ChassisTypeType03,
+ ManufacturerType03,
+ SmbiosHiiStringFieldMax
+} SMBIOS_HII_STRING_FIELD;
+
+/*
+ * The following are functions that the each platform needs to
+ * implement in its OemMiscLib library.
+ */
+
+/** Gets the CPU frequency of the specified processor.
+
+ @param ProcessorIndex Index of the processor to get the frequency for.
+
+ @return CPU frequency in Hz
+**/
+EFIAPI
+UINTN
+OemGetCpuFreq (
+ IN UINT8 ProcessorIndex
+ );
+
+/** Gets information about the specified processor and stores it in
+ the structures provided.
+
+ @param ProcessorIndex Index of the processor to get the information for.
+ @param ProcessorStatus Processor status.
+ @param ProcessorCharacteristics Processor characteritics.
+ @param MiscProcessorData Miscellaneous processor information.
+
+ @return TRUE on success, FALSE on failure.
+**/
+EFIAPI
+BOOLEAN
+OemGetProcessorInformation (
+ IN UINTN ProcessorIndex,
+ IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus,
+ IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics,
+ IN OUT MISC_PROCESSOR_DATA *MiscProcessorData
+ );
+
+/** Gets information about the cache at the specified cache level.
+
+ @param ProcessorIndex The processor to get information for.
+ @param CacheLevel The cache level to get information for.
+ @param InstructionOrUnifiedCache Whether the cache is instruction or
+ unified, not data.
+ @param SmbiosCacheTable The SMBIOS Type7 cache information structure.
+
+ @return TRUE on success, FALSE on failure.
+**/
+EFIAPI
+BOOLEAN
+OemGetCacheInformation (
+ IN UINT8 ProcessorIndex,
+ IN UINT8 CacheLevel,
+ IN BOOLEAN InstructionOrUnifiedCache,
+ IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable
+ );
+
+/** Gets the maximum number of sockets supported by the platform.
+
+ @return The maximum number of sockets.
+**/
+EFIAPI
+UINT8
+OemGetProcessorMaxSockets (
+ VOID
+ );
+
+/** Gets the type of chassis for the system.
+
+ @param ChassisType The type of the chassis.
+
+ @retval EFI_SUCCESS The chassis type was fetched successfully.
+**/
+EFIAPI
+EFI_STATUS
+OemGetChassisType (
+ OUT UINT8 *ChassisType
+ );
+
+/** Returns whether the specified processor is present or not.
+
+ @param ProcessIndex The processor index to check.
+
+ @return TRUE is the processor is present, FALSE otherwise.
+**/
+EFIAPI
+BOOLEAN
+OemIsSocketPresent (
+ IN UINTN ProcessorIndex
+ );
+
+/** Updates the HII string for the specified field.
+
+ @param mHiiHandle The HII handle.
+ @param TokenToUpdate The string to update.
+ @param Offset The field to get information about.
+**/
+EFIAPI
+VOID
+UpdateSmbiosInfo (
+ IN EFI_HII_HANDLE mHiiHandle,
+ IN EFI_STRING_ID TokenToUpdate,
+ IN SMBIOS_HII_STRING_FIELD Offset
+ );
+
+#endif // OEM_MISC_LIB_H_
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH v5 19/23] ArmPkg: Add Library/OemMiscLib.h
2021-01-04 22:58 ` [PATCH v5 19/23] ArmPkg: Add Library/OemMiscLib.h Rebecca Cran
@ 2021-01-10 2:08 ` Leif Lindholm
0 siblings, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 2:08 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:26 -0700, Rebecca Cran wrote:
> OemMiscLib.h provides the interface which platforms should implement to
> interact with the SmbiosMiscDxe and ProcessorSubClassDxe drivers to
> update SMBIOS tables.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
> ArmPkg/Include/Library/OemMiscLib.h | 159 ++++++++++++++++++++
> 1 file changed, 159 insertions(+)
>
> diff --git a/ArmPkg/Include/Library/OemMiscLib.h b/ArmPkg/Include/Library/OemMiscLib.h
> new file mode 100644
> index 000000000000..83562a3ece9d
> --- /dev/null
> +++ b/ArmPkg/Include/Library/OemMiscLib.h
> @@ -0,0 +1,159 @@
> +/** @file
> +*
> +* Copyright (c) 2015, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2015, Linaro Limited. All rights reserved.
> +*
> +* SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +
> +#ifndef OEM_MISC_LIB_H_
> +#define OEM_MISC_LIB_H_
> +
> +#include <Uefi.h>
> +#include <IndustryStandard/SmBios.h>
> +
> +typedef enum
> +{
Inconsistent opening bracket placement in this file.
> + CpuCacheL1 = 0,
> + CpuCacheL2,
> + CpuCacheL3,
> + CpuCacheL4,
> + CpuCacheL5,
> + CpuCacheL6,
> + CpuCacheL7,
> + CpuCacheLevelMax
> +} CPU_CACHE_LEVEL;
Needs OEMMISC/OEM_MISC prefix, or possibly OEM - which applies below
too.
/
Leif
> +
> +typedef struct
> +{
> + UINT8 Voltage; ///< Processor voltage
> + UINT16 CurrentSpeed; ///< Current clock speed in MHz
> + UINT16 MaxSpeed; ///< Maximum clock speed in MHz
> + UINT16 ExternalClock; ///< External clock speed in MHz
> + UINT16 CoreCount; ///< Number of cores available
> + UINT16 CoresEnabled; ///< Number of cores enabled
> + UINT16 ThreadCount; ///< Number of threads per processor
> +} MISC_PROCESSOR_DATA;
> +
> +typedef enum {
> + ProductNameType01,
> + SerialNumType01,
> + UuidType01,
> + SystemManufacturerType01,
> + AssertTagType02,
> + SerialNumberType02,
> + BoardManufacturerType02,
> + AssetTagType03,
> + SerialNumberType03,
> + VersionType03,
> + ChassisTypeType03,
> + ManufacturerType03,
> + SmbiosHiiStringFieldMax
> +} SMBIOS_HII_STRING_FIELD;
> +
> +/*
> + * The following are functions that the each platform needs to
> + * implement in its OemMiscLib library.
> + */
> +
> +/** Gets the CPU frequency of the specified processor.
> +
> + @param ProcessorIndex Index of the processor to get the frequency for.
> +
> + @return CPU frequency in Hz
> +**/
> +EFIAPI
> +UINTN
> +OemGetCpuFreq (
> + IN UINT8 ProcessorIndex
> + );
> +
> +/** Gets information about the specified processor and stores it in
> + the structures provided.
> +
> + @param ProcessorIndex Index of the processor to get the information for.
> + @param ProcessorStatus Processor status.
> + @param ProcessorCharacteristics Processor characteritics.
> + @param MiscProcessorData Miscellaneous processor information.
> +
> + @return TRUE on success, FALSE on failure.
> +**/
> +EFIAPI
> +BOOLEAN
> +OemGetProcessorInformation (
> + IN UINTN ProcessorIndex,
> + IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus,
> + IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics,
> + IN OUT MISC_PROCESSOR_DATA *MiscProcessorData
> + );
> +
> +/** Gets information about the cache at the specified cache level.
> +
> + @param ProcessorIndex The processor to get information for.
> + @param CacheLevel The cache level to get information for.
> + @param InstructionOrUnifiedCache Whether the cache is instruction or
> + unified, not data.
> + @param SmbiosCacheTable The SMBIOS Type7 cache information structure.
> +
> + @return TRUE on success, FALSE on failure.
> +**/
> +EFIAPI
> +BOOLEAN
> +OemGetCacheInformation (
> + IN UINT8 ProcessorIndex,
> + IN UINT8 CacheLevel,
> + IN BOOLEAN InstructionOrUnifiedCache,
> + IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable
> + );
> +
> +/** Gets the maximum number of sockets supported by the platform.
> +
> + @return The maximum number of sockets.
> +**/
> +EFIAPI
> +UINT8
> +OemGetProcessorMaxSockets (
> + VOID
> + );
> +
> +/** Gets the type of chassis for the system.
> +
> + @param ChassisType The type of the chassis.
> +
> + @retval EFI_SUCCESS The chassis type was fetched successfully.
> +**/
> +EFIAPI
> +EFI_STATUS
> +OemGetChassisType (
> + OUT UINT8 *ChassisType
> + );
> +
> +/** Returns whether the specified processor is present or not.
> +
> + @param ProcessIndex The processor index to check.
> +
> + @return TRUE is the processor is present, FALSE otherwise.
> +**/
> +EFIAPI
> +BOOLEAN
> +OemIsSocketPresent (
> + IN UINTN ProcessorIndex
> + );
> +
> +/** Updates the HII string for the specified field.
> +
> + @param mHiiHandle The HII handle.
> + @param TokenToUpdate The string to update.
> + @param Offset The field to get information about.
> +**/
> +EFIAPI
> +VOID
> +UpdateSmbiosInfo (
> + IN EFI_HII_HANDLE mHiiHandle,
> + IN EFI_STRING_ID TokenToUpdate,
> + IN SMBIOS_HII_STRING_FIELD Offset
> + );
> +
> +#endif // OEM_MISC_LIB_H_
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 20/23] ArmPkg: Add Universal/Smbios/OemMiscLibNull
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (18 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 19/23] ArmPkg: Add Library/OemMiscLib.h Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-10 2:11 ` Leif Lindholm
2021-01-04 22:58 ` [PATCH v5 21/23] ArmPkg: Add OemMiscLibNull instance to ArmPkg.dsc Rebecca Cran
` (3 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
Add a Null implementation of OemMiscLib.
OemMiscLib provides functions that platforms implement to fill in
SMBIOS information for the SmbiosMiscDxe and ProcessSubClassDxe drivers.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf | 31 +++++
ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c | 140 ++++++++++++++++++++
2 files changed, 171 insertions(+)
diff --git a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
new file mode 100644
index 000000000000..342290acdb53
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
@@ -0,0 +1,31 @@
+#/** @file
+# OemMiscLib.inf
+#
+# Copyright (c) 2020, NUVIA Inc. All rights reserved.
+# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2018, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = OemMiscLibNull
+ FILE_GUID = e80b8e6b-fffb-4c39-b433-41de67c9d7b8
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = OemMiscLib
+
+[Sources.common]
+ OemMiscLib.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+
diff --git a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
new file mode 100644
index 000000000000..ceee45839746
--- /dev/null
+++ b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
@@ -0,0 +1,140 @@
+/** @file
+* OemMiscLib.c
+*
+* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/HiiLib.h>
+
+#include <Library/OemMiscLib.h>
+
+
+/** Gets the CPU frequency of the specified processor.
+
+ @param ProcessorIndex Index of the processor to get the frequency for.
+
+ @return CPU frequency in Hz
+**/
+EFIAPI
+UINTN
+OemGetCpuFreq (
+ IN UINT8 ProcessorIndex
+ )
+{
+ return 0;
+}
+
+/** Gets information about the specified processor and stores it in
+ the structures provided.
+
+ @param ProcessorIndex Index of the processor to get the information for.
+ @param ProcessorStatus Processor status.
+ @param ProcessorCharacteristics Processor characteritics.
+ @param MiscProcessorData Miscellaneous processor information.
+
+ @return TRUE on success, FALSE on failure.
+**/
+EFIAPI
+BOOLEAN
+OemGetProcessorInformation (
+ IN UINTN ProcessorIndex,
+ IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus,
+ IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics,
+ IN OUT MISC_PROCESSOR_DATA *MiscProcessorData
+ )
+{
+ return TRUE;
+}
+
+/** Gets information about the cache at the specified cache level.
+
+ @param ProcessorIndex The processor to get information for.
+ @param CacheLevel The cache level to get information for.
+ @param InstructionOrUnifiedCache Whether the cache is instruction or
+ unified, not data.
+ @param SmbiosCacheTable The SMBIOS Type7 cache information structure.
+
+ @return TRUE on success, FALSE on failure.
+**/
+EFIAPI
+BOOLEAN
+OemGetCacheInformation (
+ IN UINT8 ProcessorIndex,
+ IN UINT8 CacheLevel,
+ IN BOOLEAN InstructionOrUnifiedCache,
+ IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable
+ )
+{
+ return TRUE;
+}
+
+/** Gets the maximum number of sockets supported by the platform.
+
+ @return The maximum number of sockets.
+**/
+EFIAPI
+UINT8
+OemGetProcessorMaxSockets (
+ VOID
+ )
+{
+ return 1;
+}
+
+/** Gets the type of chassis for the system.
+
+ @param ChassisType The type of the chassis.
+
+ @retval EFI_SUCCESS The chassis type was fetched successfully.
+**/
+EFI_STATUS
+EFIAPI
+OemGetChassisType (
+ UINT8 *ChassisType
+ )
+{
+ *ChassisType = MiscChassisTypeUnknown;
+ return EFI_SUCCESS;
+}
+
+/** Returns whether the specified processor is present or not.
+
+ @param ProcessIndex The processor index to check.
+
+ @return TRUE is the processor is present, FALSE otherwise.
+**/
+EFIAPI
+BOOLEAN
+OemIsSocketPresent (
+ IN UINTN ProcessorIndex
+ )
+{
+ if (ProcessorIndex == 0) {
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+/** Updates the HII string for the specified field.
+
+ @param mHiiHandle The HII handle.
+ @param TokenToUpdate The string to update.
+ @param Offset The field to get information about.
+**/
+EFIAPI
+VOID
+UpdateSmbiosInfo (
+ IN EFI_HII_HANDLE mHiiHandle,
+ IN EFI_STRING_ID TokenToUpdate,
+ IN SMBIOS_HII_STRING_FIELD Offset
+ )
+{
+
+}
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH v5 20/23] ArmPkg: Add Universal/Smbios/OemMiscLibNull
2021-01-04 22:58 ` [PATCH v5 20/23] ArmPkg: Add Universal/Smbios/OemMiscLibNull Rebecca Cran
@ 2021-01-10 2:11 ` Leif Lindholm
0 siblings, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 2:11 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:27 -0700, Rebecca Cran wrote:
> Add a Null implementation of OemMiscLib.
>
> OemMiscLib provides functions that platforms implement to fill in
> SMBIOS information for the SmbiosMiscDxe and ProcessSubClassDxe drivers.
Given that it would never be a useful thing to *use* this library
at runtime, could you add ASSERT (FALSE) to all functions?
/
Leif
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
> ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf | 31 +++++
> ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c | 140 ++++++++++++++++++++
> 2 files changed, 171 insertions(+)
>
> diff --git a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
> new file mode 100644
> index 000000000000..342290acdb53
> --- /dev/null
> +++ b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
> @@ -0,0 +1,31 @@
> +#/** @file
> +# OemMiscLib.inf
> +#
> +# Copyright (c) 2020, NUVIA Inc. All rights reserved.
> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 1.29
> + BASE_NAME = OemMiscLibNull
> + FILE_GUID = e80b8e6b-fffb-4c39-b433-41de67c9d7b8
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = OemMiscLib
> +
> +[Sources.common]
> + OemMiscLib.c
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + EmbeddedPkg/EmbeddedPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> +
> +[LibraryClasses]
> + BaseMemoryLib
> +
> diff --git a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
> new file mode 100644
> index 000000000000..ceee45839746
> --- /dev/null
> +++ b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
> @@ -0,0 +1,140 @@
> +/** @file
> +* OemMiscLib.c
> +*
> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2018, Linaro Limited. All rights reserved.
> +*
> +* SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +#include <Uefi.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/HiiLib.h>
> +
> +#include <Library/OemMiscLib.h>
> +
> +
> +/** Gets the CPU frequency of the specified processor.
> +
> + @param ProcessorIndex Index of the processor to get the frequency for.
> +
> + @return CPU frequency in Hz
> +**/
> +EFIAPI
> +UINTN
> +OemGetCpuFreq (
> + IN UINT8 ProcessorIndex
> + )
> +{
> + return 0;
> +}
> +
> +/** Gets information about the specified processor and stores it in
> + the structures provided.
> +
> + @param ProcessorIndex Index of the processor to get the information for.
> + @param ProcessorStatus Processor status.
> + @param ProcessorCharacteristics Processor characteritics.
> + @param MiscProcessorData Miscellaneous processor information.
> +
> + @return TRUE on success, FALSE on failure.
> +**/
> +EFIAPI
> +BOOLEAN
> +OemGetProcessorInformation (
> + IN UINTN ProcessorIndex,
> + IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus,
> + IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics,
> + IN OUT MISC_PROCESSOR_DATA *MiscProcessorData
> + )
> +{
> + return TRUE;
> +}
> +
> +/** Gets information about the cache at the specified cache level.
> +
> + @param ProcessorIndex The processor to get information for.
> + @param CacheLevel The cache level to get information for.
> + @param InstructionOrUnifiedCache Whether the cache is instruction or
> + unified, not data.
> + @param SmbiosCacheTable The SMBIOS Type7 cache information structure.
> +
> + @return TRUE on success, FALSE on failure.
> +**/
> +EFIAPI
> +BOOLEAN
> +OemGetCacheInformation (
> + IN UINT8 ProcessorIndex,
> + IN UINT8 CacheLevel,
> + IN BOOLEAN InstructionOrUnifiedCache,
> + IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable
> + )
> +{
> + return TRUE;
> +}
> +
> +/** Gets the maximum number of sockets supported by the platform.
> +
> + @return The maximum number of sockets.
> +**/
> +EFIAPI
> +UINT8
> +OemGetProcessorMaxSockets (
> + VOID
> + )
> +{
> + return 1;
> +}
> +
> +/** Gets the type of chassis for the system.
> +
> + @param ChassisType The type of the chassis.
> +
> + @retval EFI_SUCCESS The chassis type was fetched successfully.
> +**/
> +EFI_STATUS
> +EFIAPI
> +OemGetChassisType (
> + UINT8 *ChassisType
> + )
> +{
> + *ChassisType = MiscChassisTypeUnknown;
> + return EFI_SUCCESS;
> +}
> +
> +/** Returns whether the specified processor is present or not.
> +
> + @param ProcessIndex The processor index to check.
> +
> + @return TRUE is the processor is present, FALSE otherwise.
> +**/
> +EFIAPI
> +BOOLEAN
> +OemIsSocketPresent (
> + IN UINTN ProcessorIndex
> + )
> +{
> + if (ProcessorIndex == 0) {
> + return TRUE;
> + }
> +
> + return FALSE;
> +}
> +
> +/** Updates the HII string for the specified field.
> +
> + @param mHiiHandle The HII handle.
> + @param TokenToUpdate The string to update.
> + @param Offset The field to get information about.
> +**/
> +EFIAPI
> +VOID
> +UpdateSmbiosInfo (
> + IN EFI_HII_HANDLE mHiiHandle,
> + IN EFI_STRING_ID TokenToUpdate,
> + IN SMBIOS_HII_STRING_FIELD Offset
> + )
> +{
> +
> +}
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 21/23] ArmPkg: Add OemMiscLibNull instance to ArmPkg.dsc
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (19 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 20/23] ArmPkg: Add Universal/Smbios/OemMiscLibNull Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-10 2:12 ` Leif Lindholm
2021-01-04 22:58 ` [PATCH v5 22/23] ArmPkg: Add SMBIOS PCDs to ArmPkg.dec Rebecca Cran
` (2 subsequent siblings)
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
Add the Null instance of OemMiscLib to ArmPkg.dsc.
This is needed for the SmbiosMiscDxe and ProcessorSubClassDxe drivers.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/ArmPkg.dsc | 2 ++
1 file changed, 2 insertions(+)
diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 48059cf38ed3..0f77a6da4483 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -84,6 +84,8 @@ [LibraryClasses.common]
ArmMtlLib|ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf
+ OemMiscLib|ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
+
[LibraryClasses.common.PEIM]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH v5 21/23] ArmPkg: Add OemMiscLibNull instance to ArmPkg.dsc
2021-01-04 22:58 ` [PATCH v5 21/23] ArmPkg: Add OemMiscLibNull instance to ArmPkg.dsc Rebecca Cran
@ 2021-01-10 2:12 ` Leif Lindholm
0 siblings, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 2:12 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:28 -0700, Rebecca Cran wrote:
> Add the Null instance of OemMiscLib to ArmPkg.dsc.
> This is needed for the SmbiosMiscDxe and ProcessorSubClassDxe drivers.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
This would be fine to squash with the preceding patch.
/
Leif
> ---
> ArmPkg/ArmPkg.dsc | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
> index 48059cf38ed3..0f77a6da4483 100644
> --- a/ArmPkg/ArmPkg.dsc
> +++ b/ArmPkg/ArmPkg.dsc
> @@ -84,6 +84,8 @@ [LibraryClasses.common]
>
> ArmMtlLib|ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf
>
> + OemMiscLib|ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
> +
> [LibraryClasses.common.PEIM]
> HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
> PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 22/23] ArmPkg: Add SMBIOS PCDs to ArmPkg.dec
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (20 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 21/23] ArmPkg: Add OemMiscLibNull instance to ArmPkg.dsc Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-10 2:13 ` Leif Lindholm
2021-01-04 22:58 ` [PATCH v5 23/23] ArmPkg: Add Universal/Smbios drivers to ArmPkg.dsc Rebecca Cran
2021-01-05 22:14 ` [edk2-devel] [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Samer El-Haj-Mahmoud
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
Platforms are expected to override these PCDs to provide relevant
information to SMBIOS.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/ArmPkg.dec | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index eaf1072d9ef3..62683146ed40 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -115,6 +115,20 @@ [PcdsFixedAtBuild.common]
# The Primary Core is ClusterId[0] & CoreId[0]
gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037
+ #
+ # SMBIOS PCDs
+ #
+ gArmTokenSpaceGuid.PcdSystemProductName|L""|VOID*|0x30000053
+ gArmTokenSpaceGuid.PcdSystemVersion|L""|VOID*|0x30000054
+ gArmTokenSpaceGuid.PcdBaseBoardManufacturer|L""|VOID*|0x30000055
+ gArmTokenSpaceGuid.PcdBaseBoardProductName|L""|VOID*|0x30000056
+ gArmTokenSpaceGuid.PcdBaseBoardVersion|L""|VOID*|0x30000057
+ gArmTokenSpaceGuid.PcdProcessorManufacturer|L""|VOID*|0x30000071
+ gArmTokenSpaceGuid.PcdProcessorVersion|L""|VOID*|0x30000072
+ gArmTokenSpaceGuid.PcdProcessorSerialNumber|L""|VOID*|0x30000073
+ gArmTokenSpaceGuid.PcdProcessorAssetTag|L""|VOID*|0x30000074
+ gArmTokenSpaceGuid.PcdProcessorPartNumber|L""|VOID*|0x30000075
+
#
# ARM L2x0 PCDs
#
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH v5 22/23] ArmPkg: Add SMBIOS PCDs to ArmPkg.dec
2021-01-04 22:58 ` [PATCH v5 22/23] ArmPkg: Add SMBIOS PCDs to ArmPkg.dec Rebecca Cran
@ 2021-01-10 2:13 ` Leif Lindholm
0 siblings, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 2:13 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:29 -0700, Rebecca Cran wrote:
> Platforms are expected to override these PCDs to provide relevant
> information to SMBIOS.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
> ---
> ArmPkg/ArmPkg.dec | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
> index eaf1072d9ef3..62683146ed40 100644
> --- a/ArmPkg/ArmPkg.dec
> +++ b/ArmPkg/ArmPkg.dec
> @@ -115,6 +115,20 @@ [PcdsFixedAtBuild.common]
> # The Primary Core is ClusterId[0] & CoreId[0]
> gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037
>
> + #
> + # SMBIOS PCDs
> + #
> + gArmTokenSpaceGuid.PcdSystemProductName|L""|VOID*|0x30000053
> + gArmTokenSpaceGuid.PcdSystemVersion|L""|VOID*|0x30000054
> + gArmTokenSpaceGuid.PcdBaseBoardManufacturer|L""|VOID*|0x30000055
> + gArmTokenSpaceGuid.PcdBaseBoardProductName|L""|VOID*|0x30000056
> + gArmTokenSpaceGuid.PcdBaseBoardVersion|L""|VOID*|0x30000057
> + gArmTokenSpaceGuid.PcdProcessorManufacturer|L""|VOID*|0x30000071
> + gArmTokenSpaceGuid.PcdProcessorVersion|L""|VOID*|0x30000072
> + gArmTokenSpaceGuid.PcdProcessorSerialNumber|L""|VOID*|0x30000073
> + gArmTokenSpaceGuid.PcdProcessorAssetTag|L""|VOID*|0x30000074
> + gArmTokenSpaceGuid.PcdProcessorPartNumber|L""|VOID*|0x30000075
> +
> #
> # ARM L2x0 PCDs
> #
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* [PATCH v5 23/23] ArmPkg: Add Universal/Smbios drivers to ArmPkg.dsc
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (21 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 22/23] ArmPkg: Add SMBIOS PCDs to ArmPkg.dec Rebecca Cran
@ 2021-01-04 22:58 ` Rebecca Cran
2021-01-10 2:15 ` Leif Lindholm
2021-01-05 22:14 ` [edk2-devel] [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Samer El-Haj-Mahmoud
23 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-04 22:58 UTC (permalink / raw)
To: devel
Cc: Rebecca Cran, Leif Lindholm, Ard Biesheuvel,
nd @ arm . com . Sami Mujawar, Liming Gao, Michael D Kinney,
Zhiguang Liu
Add SmbiosMiscDxe and ProcessorSubClassDxe drivers to ArmPkg.dsc.
These provide various SMBIOS tables.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
ArmPkg/ArmPkg.dsc | 3 +++
1 file changed, 3 insertions(+)
diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 0f77a6da4483..7194eb2d3c44 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -148,6 +148,9 @@ [Components.common]
ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf
ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
+ ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
+ ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
+
[Components.AARCH64]
ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
--
2.26.2
^ permalink raw reply related [flat|nested] 55+ messages in thread* Re: [PATCH v5 23/23] ArmPkg: Add Universal/Smbios drivers to ArmPkg.dsc
2021-01-04 22:58 ` [PATCH v5 23/23] ArmPkg: Add Universal/Smbios drivers to ArmPkg.dsc Rebecca Cran
@ 2021-01-10 2:15 ` Leif Lindholm
0 siblings, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-10 2:15 UTC (permalink / raw)
To: Rebecca Cran
Cc: devel, Ard Biesheuvel, nd @ arm . com . Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On Mon, Jan 04, 2021 at 15:58:30 -0700, Rebecca Cran wrote:
> Add SmbiosMiscDxe and ProcessorSubClassDxe drivers to ArmPkg.dsc.
> These provide various SMBIOS tables.
These would be fine, maybe even preferable, to add with their
respective code.
/
Leif
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
> ArmPkg/ArmPkg.dsc | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
> index 0f77a6da4483..7194eb2d3c44 100644
> --- a/ArmPkg/ArmPkg.dsc
> +++ b/ArmPkg/ArmPkg.dsc
> @@ -148,6 +148,9 @@ [Components.common]
> ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf
> ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
>
> + ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
> + ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
> +
> [Components.AARCH64]
> ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
> ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [edk2-devel] [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes
2021-01-04 22:58 [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Rebecca Cran
` (22 preceding siblings ...)
2021-01-04 22:58 ` [PATCH v5 23/23] ArmPkg: Add Universal/Smbios drivers to ArmPkg.dsc Rebecca Cran
@ 2021-01-05 22:14 ` Samer El-Haj-Mahmoud
2021-01-08 15:55 ` Rebecca Cran
23 siblings, 1 reply; 55+ messages in thread
From: Samer El-Haj-Mahmoud @ 2021-01-05 22:14 UTC (permalink / raw)
To: devel@edk2.groups.io, rebecca@nuviainc.com
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu, Samer El-Haj-Mahmoud
Rebecca,
I did quick review of parts of the patch, mostly compared against the RPi4 implementation which has been validated in the past.
On the platform on which you are implementing this, are you able to run the FWTS SMBIOS tests and confirm that everything passes?
Also, one question on the patch in general: Any reason why not to include the nuvia copyright header in these files?
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Rebecca
> Cran via groups.io
> Sent: Monday, January 4, 2021 5:58 PM
> To: devel@edk2.groups.io
> Cc: Rebecca Cran <rebecca@nuviainc.com>; Leif Lindholm
> <leif@nuviainc.com>; Ard Biesheuvel <Ard.Biesheuvel@arm.com>; Sami
> Mujawar <Sami.Mujawar@arm.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Michael D Kinney
> <michael.d.kinney@intel.com>; Zhiguang Liu <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [PATCH v5 00/23] ArmPkg,MdePkg: Add
> Universal/Smbios, and related changes
>
> Much of the data for the SMBIOS tables is generic, and need not be
> duplicated for each platform. This patch series introduces
> ArmPkg/Universal/Smbios, which is largely copied from edk2-
> platforms/Silicon/HiSilicon/Drivers/Smbios and generates SMBIOS tables
> 0,1,2,3,4,7,13,32 and uses a combination of PCDs and calls into a new
> OemMiscLib to get information which varies between platforms.
>
> I plan to submit a patch against SbsaQemu to update it to use this new
> functionality.
>
> Changes from v4 to v5:
>
> - Incorporated changes based on v4 feedback.
> - Fixed several issues reported by the Ecc tool.
> - Fixed AARCH32 cache size code when CCIDX is supported.
> - Added OemMiscLibNull.
> - Added Universal/Smbios modules to ArmPkg.dsc.
>
> I know I've probably split this up into too many patches, but I realized it was
> easier to do this and subsequently squash them than the other way around.
>
> Personal build PR: https://github.com/tianocore/edk2/pull/1286
>
> Rebecca Cran (23):
> ArmPkg: Add ARM SMC Architecture functions to ArmStdSmc.h
> MdePkg: Update IndustryStandard/SmBios.h with processor status data
> ArmPkg: Add register encoding definition for MMFR2
> ArmPkg: Add helper to read the Memory Model Features Register 2
> ArmPkg: Add helper function to read the Memory Model Feature Register
> 4
> ArmPkg: Fix the return type of the ReadCCSIDR function
> ArmPkg: Update ArmLibPrivate.h with cache register definitions
> ArmPkg: Add definition of the maximum cache level in ARMv8-A
> ArmPkg: Add helper to read CCIDX status
> ArmPkg: Add helper to read the CCSIDR2 register
> ArmPkg: Add Universal/Smbios/ProcessorSubClassDxe
> ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type00
> ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type01
> ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type02
> ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type03
> ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type13
> ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type32
> ArmPkg: Add Universal/Smbios/SmbiosMiscDxe
> ArmPkg: Add Library/OemMiscLib.h
> ArmPkg: Add Universal/Smbios/OemMiscLibNull
> ArmPkg: Add OemMiscLibNull instance to ArmPkg.dsc
> ArmPkg: Add SMBIOS PCDs to ArmPkg.dec
> ArmPkg: Add Universal/Smbios drivers to ArmPkg.dsc
>
> ArmPkg/ArmPkg.dec | 14 +
> ArmPkg/ArmPkg.dsc | 5 +
> ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
> | 31 +
> ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
> | 57 ++
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
> | 86 ++
> ArmPkg/Include/Chipset/AArch64.h | 4 +
> ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 16
> +
> ArmPkg/Include/Library/ArmLib.h | 15 +
> ArmPkg/Include/Library/OemMiscLib.h | 159 ++++
> ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 11 +
> ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h | 8 +-
> ArmPkg/Library/ArmLib/ArmLibPrivate.h | 117 ++-
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h
> | 136 +++
> MdePkg/Include/IndustryStandard/SmBios.h | 13 +
> ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 17 +
> ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c | 17 +
> ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
> | 140 ++++
> ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> | 863 ++++++++++++++++++++
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c
> | 61 ++
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c
> | 184 +++++
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c
> | 92 +++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunctio
> n.c | 281 +++++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufactur
> erData.c | 35 +
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufactur
> erFunction.c | 178 ++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufac
> turerData.c | 45 +
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufac
> turerFunction.c | 207 +++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufactur
> erData.c | 51 ++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufactur
> erFunction.c | 208 +++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallabl
> eLanguagesData.c | 32 +
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallabl
> eLanguagesFunction.c | 156 ++++
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationDat
> a.c | 34 +
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFu
> nction.c | 66 ++
> ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 3
> +
> ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S |
> 2 +-
> ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S | 16
> +-
> ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm |
> 16 +-
>
> ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassStrings.
> uni | 23 +
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStrings.uni
> | 21 +
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni
> | 17 +
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufactur
> er.uni | 20 +
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufac
> turer.uni | 20 +
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufactur
> er.uni | 17 +
>
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallabl
> eLanguages.uni | 42 +
> 43 files changed, 3530 insertions(+), 6 deletions(-) create mode 100644
> ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
> create mode 100644
> ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
> create mode 100644 ArmPkg/Include/Library/OemMiscLib.h
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h
> create mode 100644
> ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
> create mode 100644
> ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunctio
> n.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufactur
> erData.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufactur
> erFunction.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufac
> turerData.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufac
> turerFunction.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufactur
> erData.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufactur
> erFunction.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallabl
> eLanguagesData.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallabl
> eLanguagesFunction.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationDat
> a.c
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFu
> nction.c
> create mode 100644
> ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassStrings.
> uni
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStrings.uni
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufactur
> er.uni
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufac
> turer.uni
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufactur
> er.uni
> create mode 100644
> ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallabl
> eLanguages.uni
>
> --
> 2.26.2
>
>
>
>
>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
^ permalink raw reply [flat|nested] 55+ messages in thread* Re: [edk2-devel] [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes
2021-01-05 22:14 ` [edk2-devel] [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes Samer El-Haj-Mahmoud
@ 2021-01-08 15:55 ` Rebecca Cran
2021-01-08 16:40 ` Leif Lindholm
0 siblings, 1 reply; 55+ messages in thread
From: Rebecca Cran @ 2021-01-08 15:55 UTC (permalink / raw)
To: Samer El-Haj-Mahmoud, devel@edk2.groups.io
Cc: Leif Lindholm, Ard Biesheuvel, Sami Mujawar, Liming Gao,
Michael D Kinney, Zhiguang Liu
On 1/5/21 3:14 PM, Samer El-Haj-Mahmoud wrote:
> I did quick review of parts of the patch, mostly compared against the RPi4 implementation which has been validated in the past.
>
> On the platform on which you are implementing this, are you able to run the FWTS SMBIOS tests and confirm that everything passes?
>
> Also, one question on the patch in general: Any reason why not to include the nuvia copyright header in these files?
I haven't run the FWTS SMBIOS tests, but I'll make sure to run them
before I submit the next version of the patch series.
I'm never sure whether the changes I'm making are large enough to
justify adding my own or NUVIA's copyright. Since I have now made quite
a few changes to the original sources, I'll add it.
--
Rebecca Cran
^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [edk2-devel] [PATCH v5 00/23] ArmPkg,MdePkg: Add Universal/Smbios, and related changes
2021-01-08 15:55 ` Rebecca Cran
@ 2021-01-08 16:40 ` Leif Lindholm
0 siblings, 0 replies; 55+ messages in thread
From: Leif Lindholm @ 2021-01-08 16:40 UTC (permalink / raw)
To: Rebecca Cran
Cc: Samer El-Haj-Mahmoud, devel@edk2.groups.io, Ard Biesheuvel,
Sami Mujawar, Liming Gao, Michael D Kinney, Zhiguang Liu
On Fri, Jan 08, 2021 at 08:55:33 -0700, Rebecca Cran wrote:
> On 1/5/21 3:14 PM, Samer El-Haj-Mahmoud wrote:
>
> > I did quick review of parts of the patch, mostly compared against the RPi4 implementation which has been validated in the past.
> >
> > On the platform on which you are implementing this, are you able to run the FWTS SMBIOS tests and confirm that everything passes?
> >
> > Also, one question on the patch in general: Any reason why not to include the nuvia copyright header in these files?
>
>
> I haven't run the FWTS SMBIOS tests, but I'll make sure to run them before I
> submit the next version of the patch series.
>
> I'm never sure whether the changes I'm making are large enough to justify
> adding my own or NUVIA's copyright. Since I have now made quite a few
> changes to the original sources, I'll add it.
There are companies that require their employees to add their
copyright for fixing a typo in a comment. So in this project, there is
effectively no change too small.
With my experience from other projects, I tend to apply the "about
three lines of code" bar.
/
Leif
^ permalink raw reply [flat|nested] 55+ messages in thread