From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from zg8tmja2lje4os4yms4ymjma.icoremail.net (zg8tmja2lje4os4yms4ymjma.icoremail.net [206.189.21.223]) by mx.groups.io with SMTP id smtpd.web08.1449.1610700523703629714 for ; Fri, 15 Jan 2021 00:48:45 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: phytium.com.cn, ip: 206.189.21.223, mailfrom: jialing@phytium.com.cn) Received: from localhost.localdomain (unknown [117.136.88.47]) by c1app12 (Coremail) with SMTP id DAINCgDHzpbFVgFgExlyBA--.39669S3; Fri, 15 Jan 2021 16:48:36 +0800 (CST) From: Ling Jia To: devel@edk2.groups.io Cc: Leif Lindholm , Ling , Peng Xie , Yiqi Shu Subject: [PATCH v1 01/10] Silicon/Phytium/: added PhytiumPlatformLib to Phytium2000-4 Date: Fri, 15 Jan 2021 08:47:53 +0000 Message-Id: <20210115084802.62196-2-jialing@phytium.com.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115084802.62196-1-jialing@phytium.com.cn> References: <20210115084802.62196-1-jialing@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: DAINCgDHzpbFVgFgExlyBA--.39669S3 X-Coremail-Antispam: 1UD129KBjvAXoWDJr47XrW5tr17CF13AFy5urg_yoWxCry7Co W8Gr10qrZ8Kr18Aw48GrsrKryxZwsIqa1jqw1rZ34xJF4qqrnxCryDJwsxXr4Yy34DAFnr GrWrAa48JFW2qa4kn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYt7AC8VAFwI0_Gr0_Xr1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r18M28IrcIa0x kI8VCY1x0267AKxVWUXVWUCwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84AC jcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26F4j6r4UJw A2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26F4UJVW0 owAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7 IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4U M4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY02Avz4vE14v_GFyl42 xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWU GwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI4 8JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4U MIIF0xvE42xK8VAvwI8IcIk0rVWUCVW8JwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I 8E87Iv6xkF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x0JUSdgXUUUUU= X-Originating-IP: [117.136.88.47] X-CM-SenderInfo: xmldzxdqj61x51wl3zoofrzhdfq/ Content-Transfer-Encoding: quoted-printable From: Ling The PhytiumPlatformLib supported the system library for Phytium2000-4 chip. Maintainers.txt: Adds maintainers and reviewers for the DurianPkg. Cc: Leif Lindholm Signed-off-by: Ling Jia Signed-off-by: Peng Xie Reviewed-by: Yiqi Shu --- Silicon/Phytium/Phytium.dec = | 60 +++ Silicon/Phytium/Phytium.dsc.inc = | 388 ++++++++++++++++++++ Platform/Phytium/Durian/DurianPkg.dsc = | 302 +++++++++++++++ Platform/Phytium/Durian/DurianPkg.fdf = | 199 ++++++++++ Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLi= b.inf | 66 ++++ Silicon/Phytium/Include/PhytiumSystemServiceInterface.h = | 112 ++++++ Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLi= b.c | 135 +++++++ Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatformLi= bMem.c | 148 ++++++++ Maintainers.txt = | 7 + Silicon/Phytium/Phytium.fdf.inc = | 119 ++++++ Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/AArch64/PhytiumPl= atformHelper.S | 76 ++++ 11 files changed, 1612 insertions(+) diff --git a/Silicon/Phytium/Phytium.dec b/Silicon/Phytium/Phytium.dec new file mode 100644 index 000000000000..a064fd60a9c5 --- /dev/null +++ b/Silicon/Phytium/Phytium.dec @@ -0,0 +1,60 @@ +## @file=0D +# This package provides common open source Phytium silicon modules.=0D +#=0D +# Copyright (C) 2020, Phytium Technology Co,Ltd. All rights reserved.=0D +#=0D +# SPDX-License-Identifier:BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + DEC_SPECIFICATION =3D 0x00010005=0D + PACKAGE_NAME =3D PhytiumPkg=0D + PACKAGE_GUID =3D b34af0b4-3e7c-11eb-a9d0-0738806d2dec= =0D + PACKAGE_VERSION =3D 0.1=0D +=0D +##########################################################################= ######=0D +#=0D +# Include Section - list of Include Paths that are provided by this packag= e.=0D +# Comments are used for Keywords and Module Types.=0D +#=0D +# Supported Module Types:=0D +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_D= RIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION=0D +#=0D +##########################################################################= ######=0D +[Includes]=0D + Include # Root include for the package=0D +=0D +[Guids.common]=0D + gPhytiumPlatformTokenSpaceGuid =3D { 0x8c3abed4, 0x1fc8, 0x46d3, { 0xb4,= 0x17, 0xa3, 0x22, 0x38, 0x14, 0xde, 0x76 } }=0D + gPhytiumPlatformMemoryInforGuid =3D { 0xe5d0f31b, 0x18b2, 0x4ec1, { 0xba= , 0x20, 0x9c, 0x6d, 0xb7, 0x87, 0x91, 0x79 } }=0D + gPhytiumPlatformCpuInforGuid =3D { 0x60c3c4b0, 0xe189, 0x4cbb, { 0x88, 0= x6a, 0x96, 0x87, 0x21, 0xe0, 0xe0, 0xb0 } }=0D + gPhytiumPlatformPciHostInforGuid =3D { 0x24b99cf4, 0x2e51, 0x440e, { 0x8= c, 0x7a, 0xea, 0xa2, 0xe0, 0x29, 0x32, 0xf } }=0D + gShellSfHiiGuid =3D {0x7e57433d, 0x1016, 0x407a, { 0x9d, 0xb8, 0xf9, 0x5= 6, 0x12, 0x19, 0x66, 0x16 } }=0D +=0D +[PcdsFixedAtBuild.common]=0D + #=0D + # PCI configuration address space=0D + #=0D + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase|0x0|UINT64|0x00000000=0D + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize|0x0|UINT64|0x00000001=0D +=0D + #=0D + # PCI configuration address space=0D + #=0D + gPhytiumPlatformTokenSpaceGuid.PcdPciConfigBase|0x0|UINT64|0x00000002=0D + gPhytiumPlatformTokenSpaceGuid.PcdPciConfigSize|0x0|UINT64|0x00000003=0D +=0D + #=0D + # SPI Flash Controller Register Base Address and Size=0D + #=0D + gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashBase|0x0|UINT64|0x00000004=0D + gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashSize|0x0|UINT64|0x00000005=0D + gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerBase|0x0|UINT64|0x0000000= 6=0D + gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerSize|0x0|UINT64|0x0000000= 7=0D + gPhytiumPlatformTokenSpaceGuid.PcdRtcBaseAddress|0x0|UINT32|0x00000008=0D + gPhytiumPlatformTokenSpaceGuid.PcdLogoFile |{ 0x99, 0x8b, 0xAA, 0x7B, 0x= BB, 0x61, 0xD5, 0x11, 0x9A, 0x5D, 0xBB, 0x90, 0x27, 0x3F, 0xC2, 0x4D }|VOID= *|0x40000013=0D +=0D +[Protocols]=0D + gPhytiumSpiMasterProtocolGuid =3D { 0xdf093560, 0xf955, 0x11ea, { 0x96, = 0x42, 0x43, 0x9d, 0x80, 0xdd, 0x0b, 0x7c}}=0D + gPhytiumFlashProtocolGuid =3D { 0x00b4af42, 0xfbd0, 0x11ea, { 0x80, 0x3a= , 0x27, 0xea, 0x5e, 0x65, 0xe3, 0xf6}}=0D diff --git a/Silicon/Phytium/Phytium.dsc.inc b/Silicon/Phytium/Phytium.dsc.= inc new file mode 100644 index 000000000000..15b66f6bd55d --- /dev/null +++ b/Silicon/Phytium/Phytium.dsc.inc @@ -0,0 +1,388 @@ +## @file=0D +# This package provides common open source Phytium silicon modules.=0D +#=0D +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.=0D +#=0D +# SPDX-License-Identifier:BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +=0D +[LibraryClasses.common]=0D + ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib= .inf=0D + HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsing= Lib.inf=0D +=0D +!if $(TARGET) =3D=3D RELEASE=0D + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf=0D +!else=0D + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.in= f=0D +!endif=0D +=0D + DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseD= ebugPrintErrorLevelLib.inf=0D + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf=0D + SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchroniza= tionLib.inf=0D + PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibN= ull.inf=0D + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf=0D + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeC= offGetEntryPointLib.inf=0D + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf=0D + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf=0D + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompres= sLib.inf=0D + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf=0D +=0D + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf=0D + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf=0D + UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/U= efiRuntimeServicesTableLib.inf=0D + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf=0D + UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBoo= tServicesTableLib.inf=0D + DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableL= ib.inf=0D + UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntry= Point.inf=0D + UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiA= pplicationEntryPoint.inf=0D + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf=0D + UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServic= esLib.inf=0D +=0D + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf=0D + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf= =0D + HttpLib|NetworkPkg/Library/DxeHttpLib/DxeHttpLib.inf=0D +=0D + #=0D + # Assume everything is fixed at build=0D + #=0D + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf=0D + #BaseMemoryLib|MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.in= f=0D + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf=0D +=0D + # ARM Architectural Libraries=0D + CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMainte= nanceLib.inf=0D + DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/Def= aultExceptionHandlerLib.inf=0D + CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.in= f=0D + ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.= inf=0D + ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf=0D + ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf=0D + ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatfo= rmStackLib.inf=0D + ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf=0D + ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/Ar= mGenericTimerPhyCounterLib.inf=0D + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf=0D +=0D + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf=0D +=0D + TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf=0D + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf=0D +=0D + #=0D + # Uncomment (and comment out the next line) For RealView Debugger. The S= tandard IO window=0D + # in the debugger will show load and unload commands for symbols. You ca= n cut and paste this=0D + # into the command window to load symbols. We should be able to use a sc= ript to do this, but=0D + # the version of RVD I have does not support scripts accessing system me= mory.=0D + #=0D + PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeC= offExtraActionLibNull.inf=0D + DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.i= nf=0D + DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgent= TimerLibNull.inf=0D + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf=0D + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf=0D + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf=0D + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf=0D + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf=0D +=0D + #=0D + TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurem= entLibNull.inf=0D + AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLib= Null.inf=0D + PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecu= reLibNull.inf=0D + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf=0D + VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/Var= iablePolicyHelperLib.inf=0D + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf= =0D +=0D + # Scsi Requirements=0D + UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf=0D +=0D + # USB Requirements=0D + UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf=0D +=0D + # Networking Requirements=0D + NetLib|NetworkPkg/Library/DxeNetLib/DxeNetLib.inf=0D + DpcLib|NetworkPkg/Library/DxeDpcLib/DxeDpcLib.inf=0D + UdpIoLib|NetworkPkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf=0D + IpIoLib|NetworkPkg/Library/DxeIpIoLib/DxeIpIoLib.inf=0D +=0D + CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Customize= dDisplayLib.inf=0D + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf=0D + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf=0D + RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf=0D +=0D + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf=0D + ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseRepor= tStatusCodeLibNull.inf=0D + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf=0D + BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.i= nf=0D + SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf=0D +=0D + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManag= erLib.inf=0D + PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBoo= tManagerLib.inf=0D + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf=0D +=0D +[LibraryClasses.common.SEC]=0D + DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsB= aseLib.inf=0D + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf=0D + ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib= /PrePiExtractGuidedSectionLib.inf=0D + LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCusto= mDecompressLib.inf=0D + MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMe= moryAllocationLib.inf=0D + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf=0D + PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/Pre= PiHobListPointerLib.inf=0D + PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.= inf=0D + ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf=0D +=0D +[LibraryClasses.common.SEC, LibraryClasses.common.PEIM]=0D + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf=0D +=0D +[LibraryClasses.common.DXE_CORE]=0D + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf=0D + MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeC= oreMemoryAllocationLib.inf=0D + DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf= =0D + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExt= ractGuidedSectionLib.inf=0D + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf=0D + PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerform= anceLib.inf=0D +=0D +[LibraryClasses.common.DXE_DRIVER]=0D + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf=0D + SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeS= ecurityManagementLib.inf=0D + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.= inf=0D + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf=0D + VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyL= ib.inf=0D +=0D +[LibraryClasses.common.UEFI_APPLICATION]=0D + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.= inf=0D + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf=0D + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf=0D +=0D + # UiApp dependencies=0D + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf= =0D + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf=0D +=0D +[LibraryClasses.common.UEFI_DRIVER]=0D + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExt= ractGuidedSectionLib.inf=0D + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.= inf=0D + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf=0D + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf=0D +=0D +[LibraryClasses.common.DXE_RUNTIME_DRIVER]=0D + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf=0D + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf=0D + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf= =0D + ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/R= untimeDxeReportStatusCodeLib.inf=0D +=0D +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE=0D + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf=0D +!endif=0D +=0D +!if $(TARGET) !=3D RELEASE=0D + DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibS= erialPort.inf=0D +!endif=0D + VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyL= ibRuntimeDxe.inf=0D +[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER]=0D + #=0D + # PSCI support in EL3 may not be available if we are not running under a= PSCI=0D + # compliant secure firmware, but since the default VExpress EfiResetSyst= emLib=0D + # cannot be supported at runtime (due to the fact that the syscfg MMIO r= egisters=0D + # cannot be runtime remapped), it is our best bet to get ResetSystem fun= ctionality=0D + # on these platforms.=0D + #=0D + EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSyste= mLib.inf=0D +=0D +[LibraryClasses.ARM, LibraryClasses.AARCH64]=0D + #=0D + # It is not possible to prevent the ARM compiler for generic intrinsic f= unctions.=0D + # This library provides the instrinsic functions generate by a given com= piler.=0D + # [LibraryClasses.ARM] and NULL mean link this library into all ARM imag= es.=0D + #=0D + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf=0D +=0D + # Add support for GCC stack protector=0D + NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf=0D +=0D +[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION= , LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVE= R]=0D + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf=0D +=0D +[BuildOptions]=0D + RVCT:RELEASE_*_*_CC_FLAGS =3D -DMDEPKG_NDEBUG=0D + GCC:RELEASE_*_*_CC_FLAGS =3D -DMDEPKG_NDEBUG=0D +=0D +[BuildOptions.AARCH64.EDKII.DXE_RUNTIME_DRIVER]=0D + GCC:*_*_AARCH64_DLINK_FLAGS =3D -z common-page-size=3D0x10000=0D +=0D +##########################################################################= ######=0D +#=0D +# Pcd Section - list of all EDK II PCD Entries defined by this Platform=0D +#=0D +##########################################################################= ######=0D +=0D +[PcdsFeatureFlag.common]=0D + # If TRUE, Graphics Output Protocol will be installed on virtual handle = created by ConsplitterDxe.=0D + # It could be set FALSE to save size.=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE=0D +=0D + # Force the UEFI GIC driver to use GICv2 legacy mode. To use=0D + # GICv3 without GICv2 legacy in UEFI, the ARM Trusted Firmware needs=0D + # to configure the Non-Secure interrupts in the GIC Redistributors=0D + # which is not supported at the moment.=0D + gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE=0D + gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|FALSE=0D + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE=0D + gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE=0D + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE=0D +=0D + gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE=0D +=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE=0D +=0D + # Use the Vector Table location in CpuDxe. We will not copy the Vector T= able at PcdCpuVectorBaseAddress=0D + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE=0D +=0D + # Indicates if EFI 1.1 ISO 639-2 language supports are obsolete=0D + # TRUE - Deprecate global variable LangCodes.=0D + # FALSE - Does not deprecate global variable LangCodes.=0D + # Deprecate Global Variable LangCodes.=0D + gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultLangDeprecate|TRUE=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport|FALSE=0D +=0D +[PcdsFixedAtBuild.common]=0D + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000=0D + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000=0D + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000=0D + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000=0D + gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF=0D + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0=0D + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0=0D + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320=0D + gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE=0D +=0D + # DEBUG_ASSERT_ENABLED 0x01=0D + # DEBUG_PRINT_ENABLED 0x02=0D + # DEBUG_CODE_ENABLED 0x04=0D + # CLEAR_MEMORY_ENABLED 0x08=0D + # ASSERT_BREAKPOINT_ENABLED 0x10=0D + # ASSERT_DEADLOOP_ENABLED 0x20=0D +!if $(TARGET) =3D=3D RELEASE=0D + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21=0D +!else=0D + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f=0D +!endif=0D +=0D + # DEBUG_INIT 0x00000001 // Initialization=0D + # DEBUG_WARN 0x00000002 // Warnings=0D + # DEBUG_LOAD 0x00000004 // Load events=0D + # DEBUG_FS 0x00000008 // EFI File system=0D + # DEBUG_POOL 0x00000010 // Alloc & Free's=0D + # DEBUG_PAGE 0x00000020 // Alloc & Free's=0D + # DEBUG_INFO 0x00000040 // Verbose=0D + # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers=0D + # DEBUG_VARIABLE 0x00000100 // Variable=0D + # DEBUG_BM 0x00000400 // Boot Manager=0D + # DEBUG_BLKIO 0x00001000 // BlkIo Driver=0D + # DEBUG_NET 0x00004000 // SNI Driver=0D + # DEBUG_UNDI 0x00010000 // UNDI Driver=0D + # DEBUG_LOADFILE 0x00020000 // UNDI Driver=0D + # DEBUG_EVENT 0x00080000 // Event messages=0D + # DEBUG_GCD 0x00100000 // Global Coherency Database changes=0D + # DEBUG_CACHE 0x00200000 // Memory range cachability changes=0D + # DEBUG_ERROR 0x80000000 // Error=0D + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046=0D +=0D + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07=0D +=0D + #gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""=0D + #gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07=0D + #gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000=0D + # 20ms=0D + gEmbeddedTokenSpaceGuid.PcdTimerPeriod|200000=0D +=0D + #=0D + # Optional feature to help prevent EFI memory map fragments=0D + # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob=0D + # Values are in EFI Pages (4K). DXE Core will make sure that=0D + # at least this much of each type of memory can be allocated=0D + # from a single memory range. This way you only end up with=0D + # maximum of two fragements for each type in the memory map=0D + # (the memory used, and the free memory that was prereserved=0D + # but not used).=0D + #=0D + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0=0D + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0=0D + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0=0D + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80=0D + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|65=0D + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400=0D + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000=0D + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20=0D + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0=0D +=0D + # RunAxf support via Dynamic Shell Command protocol=0D + # We want to use the Shell Libraries but don't want it to initialise=0D + # automatically. We initialise the libraries when the command is called = by the=0D + # Shell.=0D + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE=0D +=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FAL= SE=0D +=0D +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE=0D + # override the default values from SecurityPkg to ensure images from all= sources are verified in secure boot=0D + gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04=0D + gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04= =0D + gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0= x04=0D +!endif=0D +=0D +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000=0D +!else=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x4000=0D +!endif=0D +=0D + # Default platform supported RFC 4646 languages: English & French & Chin= ese Simplified.=0D + # Default Value of PlatformLangCodes Variable.=0D + gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US;= zh-Hans"=0D +=0D + # Default current RFC 4646 language: Chinese Simplified.=0D + # Default Value of PlatformLang Variable.=0D + gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLang|"en-US"=0D + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4=0D + #=0D + # ACPI Table Version=0D + #=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20=0D + gArmPlatformTokenSpaceGuid.PL011UartInterrupt|67=0D +=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE=0D +=0D +[PcdsDynamicDefault.common.DEFAULT]=0D + ## This PCD defines the video horizontal resolution.=0D + # This PCD could be set to 0 then video resolution could be at highest = resolution.=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|640=0D + ## This PCD defines the video vertical resolution.=0D + # This PCD could be set to 0 then video resolution could be at highest = resolution.=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|480=0D +=0D + ## This PCD defines the Console output row and the default value is 80 a= ccording to UEFI spec.=0D + # This PCD could be set to 0 then console output could be at max column= and max row.=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|128=0D + ## This PCD defines the Console output column and the default value is 2= 5 according to UEFI spec.=0D + # This PCD could be set to 0 then console output could be at max column= and max row.=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|40=0D +=0D + ## Specify the video horizontal resolution of text setup.=0D + # @Prompt Video Horizontal Resolution of Text Setup=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640=0D +=0D + ## Specify the video vertical resolution of text setup.=0D + # @Prompt Video Vertical Resolution of Text Setup=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480=0D +=0D + ## Specify the console output column of text setup.=0D + # @Prompt Console Output Column of Text Setup=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn|128=0D + ## Specify the console output row of text setup.=0D + # @Prompt Console Output Row of Text Setup=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow|40=0D +=0D + ## The number of seconds that the firmware will wait before initiating t= he original default boot selection.=0D + # A value of 0 indicates that the default boot selection is to be initi= ated immediately on boot.=0D + # The value of 0xFFFF then firmware will wait for user input before boo= ting.=0D + # @Prompt Boot Timeout (s)=0D + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5=0D diff --git a/Platform/Phytium/Durian/DurianPkg.dsc b/Platform/Phytium/Duria= n/DurianPkg.dsc new file mode 100644 index 000000000000..ef01cc217ace --- /dev/null +++ b/Platform/Phytium/Durian/DurianPkg.dsc @@ -0,0 +1,302 @@ +## @file=0D +# This package provides common open source Phytium Platform modules.=0D +#=0D +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.=0D +#=0D +# SPDX-License-Identifier:BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +##########################################################################= ######=0D +#=0D +# Defines Section - statements that will be processed to create a Makefile= .=0D +#=0D +##########################################################################= ######=0D +[Defines]=0D + PLATFORM_NAME =3D DurianPkg=0D + PLATFORM_GUID =3D 8f7ac876-3e7c-11eb-86cb-33f68535d613= =0D + PLATFORM_VERSION =3D 0.1=0D + DSC_SPECIFICATION =3D 0x00010005=0D + OUTPUT_DIRECTORY =3D Build/$(PLATFORM_NAME)=0D + SUPPORTED_ARCHITECTURES =3D AARCH64=0D + BUILD_TARGETS =3D DEBUG|RELEASE=0D + SKUID_IDENTIFIER =3D DEFAULT=0D + FLASH_DEFINITION =3D Platform/Phytium/Durian/DurianPkg.fdf= =0D +=0D +!include Silicon/Phytium/Phytium.dsc.inc=0D +=0D +[LibraryClasses.common]=0D + # Phytium Platform library=0D + ArmPlatformLib|Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/= PhytiumPlatformLib.inf=0D +=0D + TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf=0D +=0D + # PL011 UART Driver and Dependency Libraries=0D + SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortL= ib.inf=0D + PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartCloc= kLib.inf=0D + PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf=0D +=0D +[LibraryClasses.common.DXE_DRIVER]=0D +=0D +=0D +##########################################################################= ######=0D +#=0D +# Pcd Section - list of all EDK II PCD Entries defined by this Platform=0D +#=0D +##########################################################################= ######=0D +[PcdsFixedAtBuild.common]=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"Durian Platform"=0D +=0D + gArmTokenSpaceGuid.PcdVFPEnabled|1=0D + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0x303=0D +=0D + gArmPlatformTokenSpaceGuid.PcdCoreCount|4=0D + gArmPlatformTokenSpaceGuid.PcdClusterCount|2=0D +=0D + #=0D + # NV Storage PCDs.=0D + #=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0xe00000= =0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000= =0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0xe1000= 0=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0001000= 0=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0xe20000= =0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000= =0D +=0D + # Size of the region used by UEFI in permanent memory (Reserved 64MB)=0D + gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000=0D +=0D + #=0D + # PL011 - Serial Terminal=0D + #=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x28001000=0D + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0=0D + gArmPlatformTokenSpaceGuid.PL011UartClkInHz|48000000=0D + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200=0D +=0D +=0D + #=0D + # ARM General Interrupt Controller=0D + #=0D + gArmTokenSpaceGuid.PcdGicDistributorBase|0x29900000=0D + gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x29980000=0D + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x29c00000=0D +=0D + # System IO space=0D + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase|0x0=0D + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize|0x40000000=0D +=0D + # System Memory (2GB ~ 4GB - 64MB), the top 64MB is reserved for PBF=0D + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000=0D + gArmTokenSpaceGuid.PcdSystemMemorySize|0x7B000000=0D +=0D + # Stack Size=0D + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000=0D +=0D + #=0D + # Designware PCI Root Complex=0D + #=0D + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x40000000=0D + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|28=0D + gPhytiumPlatformTokenSpaceGuid.PcdPciConfigBase|0x40000000=0D + gPhytiumPlatformTokenSpaceGuid.PcdPciConfigSize|0x10000000=0D + gArmTokenSpaceGuid.PcdPciBusMin|0=0D + gArmTokenSpaceGuid.PcdPciBusMax|255=0D + gArmTokenSpaceGuid.PcdPciIoBase|0x00000=0D + gArmTokenSpaceGuid.PcdPciIoSize|0xf00000=0D + gArmTokenSpaceGuid.PcdPciIoTranslation|0x50000000=0D + gArmTokenSpaceGuid.PcdPciMmio32Base|0x58000000=0D + gArmTokenSpaceGuid.PcdPciMmio32Size|0x28000000=0D + gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0=0D + gArmTokenSpaceGuid.PcdPciMmio64Base|0x1000000000=0D + gArmTokenSpaceGuid.PcdPciMmio64Size|0x1000000000=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE=0D +=0D + #=0D + # SPI Flash Control Register Base Address and Size=0D + #=0D + gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashBase|0x0=0D + gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashSize|0x1000000=0D + gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerBase|0x28014000=0D + gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerSize|0x1000=0D +=0D + #=0D + # RTC I2C Controller Register Base Address and Speed=0D + #=0D + gPhytiumPlatformTokenSpaceGuid.PcdRtcBaseAddress|0x2800D000=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"V1.0"=0D +=0D +##########################################################################= ######=0D +#=0D +# Components Section - list of all EDK II Modules needed by this Platform= =0D +#=0D +##########################################################################= ######=0D +[Components.common]=0D + #=0D + # PCD database=0D + #=0D + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf=0D +=0D + ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf=0D + ShellPkg/Application/Shell/Shell.inf {=0D + =0D + ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellComman= dLib.inf=0D + NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2Comm= andsLib.inf=0D + NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1Comm= andsLib.inf=0D + NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3Comm= andsLib.inf=0D + NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1Co= mmandsLib.inf=0D + NULL|ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewC= ommandLib.inf=0D + NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Comm= andsLib.inf=0D + NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1= CommandsLib.inf=0D + NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1= CommandsLib.inf=0D + HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandlePar= singLib.inf=0D + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf=0D + BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcf= gCommandLib.inf=0D + }=0D +=0D + ArmPlatformPkg/PrePi/PeiMPCore.inf {=0D + =0D + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf=0D + }=0D +=0D + #=0D + #Dxe core entry=0D + #=0D + MdeModulePkg/Core/Dxe/DxeMain.inf {=0D + =0D + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf=0D + NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32Gu= idedSectionExtractLib.inf=0D + }=0D +=0D + #DXE driver=0D + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf=0D + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf=0D + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {=0D + =0D + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf=0D + }=0D + MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf=0D + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf=0D +=0D + #=0D + # Common Arm Timer and Gic Components=0D + #=0D + ArmPkg/Drivers/CpuDxe/CpuDxe.inf=0D + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf=0D + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf=0D + ArmPkg/Drivers/TimerDxe/TimerDxe.inf=0D +=0D + #=0D + # security system=0D + #=0D + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {=0D + =0D + NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificatio= nLib.inf=0D + }=0D +=0D + #=0D + #network, mod for https boot.=0D + #=0D + NetworkPkg/SnpDxe/SnpDxe.inf=0D + NetworkPkg/DpcDxe/DpcDxe.inf=0D + NetworkPkg/MnpDxe/MnpDxe.inf=0D + NetworkPkg/ArpDxe/ArpDxe.inf=0D + NetworkPkg/Dhcp4Dxe/Dhcp4Dxe.inf=0D + NetworkPkg/Ip4Dxe/Ip4Dxe.inf=0D + NetworkPkg/Mtftp4Dxe/Mtftp4Dxe.inf=0D + NetworkPkg/Udp4Dxe/Udp4Dxe.inf=0D + NetworkPkg/VlanConfigDxe/VlanConfigDxe.inf=0D +=0D + NetworkPkg/Ip6Dxe/Ip6Dxe.inf=0D + NetworkPkg/Udp6Dxe/Udp6Dxe.inf=0D + NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf=0D + NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf=0D + NetworkPkg/TcpDxe/TcpDxe.inf=0D +=0D + NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf=0D +=0D + NetworkPkg/DnsDxe/DnsDxe.inf=0D + NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf=0D + NetworkPkg/HttpDxe/HttpDxe.inf=0D + #NetworkPkg/HttpBootDxe/HttpBootDxe.inf=0D +=0D + # FV Filesystem=0D + MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf=0D +=0D + #=0D + # Common Console Components=0D + #=0D + # ConIn,ConOut,StdErr=0D + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf=0D + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf=0D + MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf= =0D + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf=0D + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf=0D +=0D + SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDx= e.inf=0D +=0D + #=0D + # Hii database init=0D + #=0D + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf=0D +=0D + #=0D + # FAT filesystem + GPT/MBR partitioning=0D + #=0D + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf=0D + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf=0D + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf=0D + FatPkg/EnhancedFatDxe/Fat.inf=0D +=0D + #=0D + # Generic Watchdog Timer=0D + #=0D + ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf=0D +=0D + #=0D + # Usb Support=0D + #=0D + MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf=0D + MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf=0D + MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf=0D + MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf=0D + MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf=0D + MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf=0D + MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf=0D +=0D + #=0D + # IDE/AHCI Support=0D + #=0D + MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf=0D + MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf=0D + MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf=0D + MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf=0D + MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf=0D +=0D + #=0D + # The following 2 module perform the same work except one operate variab= le.=0D + # Only one of both should be put into fdf.=0D + #=0D + MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntim= eDxe.inf=0D +=0D + #=0D + # NVME Support=0D + #=0D + MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf=0D +=0D + #=0D + # Bds=0D + #=0D + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf=0D + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf=0D + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf=0D + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf=0D + MdeModulePkg/Universal/DriverSampleDxe/DriverSampleDxe.inf=0D + MdeModulePkg/Application/UiApp/UiApp.inf {=0D + =0D + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf= =0D + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf=0D + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanc= eManagerUiLib.inf=0D + }=0D + MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf=0D +=0D diff --git a/Platform/Phytium/Durian/DurianPkg.fdf b/Platform/Phytium/Duria= n/DurianPkg.fdf new file mode 100644 index 000000000000..f2f4cbc9ac7f --- /dev/null +++ b/Platform/Phytium/Durian/DurianPkg.fdf @@ -0,0 +1,199 @@ +## @file=0D +# This package provides common open source Phytium Platform modules.=0D +#=0D +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.=0D +#=0D +# SPDX-License-Identifier:BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +##########################################################################= ######=0D +#=0D +# FD Section=0D +# The [FD] Section is made up of the definition statements and a=0D +# description of what goes into the Flash Device Image. Each FD section= =0D +# defines one flash "device" image. A flash device image may be one of=0D +# the following: Removable media bootable image (like a boot floppy=0D +# image,) an Option ROM image (that would be "flashed" into an add-in=0D +# card,) a System "Flash" image (that would be burned into a system's=0D +# flash) or an Update ("Capsule") image that will be used to update and=0D +# existing system flash.=0D +#=0D +##########################################################################= ######=0D +=0D +[FD.PHYTIUM]=0D +BaseAddress =3D 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress=0D +Size =3D 0x01000000|gArmTokenSpaceGuid.PcdFdSize=0D +ErasePolarity =3D 1=0D +=0D +# This one is tricky, it must be: BlockSize * NumBlocks =3D Size=0D +BlockSize =3D 0x10000=0D +NumBlocks =3D 0x100=0D +=0D +##########################################################################= ######=0D +#=0D +# Following are lists of FD Region layout which correspond to the location= s of different=0D +# images within the flash device.=0D +#=0D +# Regions must be defined in ascending order and may not overlap.=0D +#=0D +# A Layout Region start with a eight digit hex offset (leading "0x" requir= ed) followed by=0D +# the pipe "|" character, followed by the size of the region, also in hex = with the leading=0D +# "0x" characters. Like:=0D +# Offset|Size=0D +# PcdOffsetCName|PcdSizeCName=0D +# RegionType =0D +#=0D +##########################################################################= ######=0D +=0D +0x00000000|0x200000=0D +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize=0D +FV =3D FVMAIN_COMPACT=0D +=0D +##########################################################################= ######=0D +#=0D +# FV Section=0D +#=0D +# [FV] section is used to define what components or modules are placed wit= hin a flash=0D +# device file. This section also defines order the components and modules= are positioned=0D +# within the image. The [FV] section consists of define statements, set s= tatements and=0D +# module statements.=0D +#=0D +##########################################################################= ######=0D +=0D +[FV.FvMain]=0D +BlockSize =3D 0x40=0D +NumBlocks =3D 0 # This FV gets compressed so make it just= big enough=0D +FvAlignment =3D 16 # FV alignment and FV attributes setting= .=0D +ERASE_POLARITY =3D 1=0D +MEMORY_MAPPED =3D TRUE=0D +STICKY_WRITE =3D TRUE=0D +LOCK_CAP =3D TRUE=0D +LOCK_STATUS =3D TRUE=0D +WRITE_DISABLED_CAP =3D TRUE=0D +WRITE_ENABLED_CAP =3D TRUE=0D +WRITE_STATUS =3D TRUE=0D +WRITE_LOCK_CAP =3D TRUE=0D +WRITE_LOCK_STATUS =3D TRUE=0D +READ_DISABLED_CAP =3D TRUE=0D +READ_ENABLED_CAP =3D TRUE=0D +READ_STATUS =3D TRUE=0D +READ_LOCK_CAP =3D TRUE=0D +READ_LOCK_STATUS =3D TRUE=0D +=0D + APRIORI DXE {=0D + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf=0D + }=0D +=0D + INF MdeModulePkg/Core/Dxe/DxeMain.inf=0D + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf=0D +=0D + #=0D + # PI DXE Drivers producing Architectural Protocols (EFI Services)=0D + #=0D + #INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf=0D + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf=0D + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf=0D + INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf=0D + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf=0D +=0D + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf=0D + INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRu= ntimeDxe.inf=0D +=0D + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf=0D + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf=0D + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf=0D + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf=0D +=0D + # Variable services=0D + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf=0D + INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.i= nf=0D +=0D + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf=0D +=0D + #=0D + # Multiple Console IO support=0D + #=0D + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf=0D + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf=0D + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe= .inf=0D + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf=0D + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf=0D +=0D + #=0D + # FAT filesystem + GPT/MBR partitioning=0D + #=0D + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf=0D + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf=0D + INF FatPkg/EnhancedFatDxe/Fat.inf=0D + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.i= nf=0D +=0D + #=0D + # SATA Controller=0D + #=0D + INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf=0D + INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf=0D + INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf=0D + INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf=0D + INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf=0D +=0D + #=0D + # NVMe boot devices=0D + #=0D + INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf=0D +=0D + #=0D + # NetWork=0D + #=0D + INF NetworkPkg/SnpDxe/SnpDxe.inf=0D + INF NetworkPkg/DpcDxe/DpcDxe.inf=0D + INF NetworkPkg/MnpDxe/MnpDxe.inf=0D + INF NetworkPkg/ArpDxe/ArpDxe.inf=0D + INF NetworkPkg/Dhcp4Dxe/Dhcp4Dxe.inf=0D + INF NetworkPkg/Ip4Dxe/Ip4Dxe.inf=0D + INF NetworkPkg/Mtftp4Dxe/Mtftp4Dxe.inf=0D + INF NetworkPkg/Udp4Dxe/Udp4Dxe.inf=0D + INF NetworkPkg/VlanConfigDxe/VlanConfigDxe.inf=0D +=0D + #=0D + # UEFI applications=0D + #=0D + INF ShellPkg/Application/Shell/Shell.inf=0D +=0D + #=0D + # Bds=0D + #=0D + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf=0D + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf=0D + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf=0D + INF MdeModulePkg/Universal/DriverSampleDxe/DriverSampleDxe.inf=0D + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf=0D + INF MdeModulePkg/Application/UiApp/UiApp.inf=0D +=0D +[FV.FVMAIN_COMPACT]=0D +FvAlignment =3D 16=0D +ERASE_POLARITY =3D 1=0D +MEMORY_MAPPED =3D TRUE=0D +STICKY_WRITE =3D TRUE=0D +LOCK_CAP =3D TRUE=0D +LOCK_STATUS =3D TRUE=0D +WRITE_DISABLED_CAP =3D TRUE=0D +WRITE_ENABLED_CAP =3D TRUE=0D +WRITE_STATUS =3D TRUE=0D +WRITE_LOCK_CAP =3D TRUE=0D +WRITE_LOCK_STATUS =3D TRUE=0D +READ_DISABLED_CAP =3D TRUE=0D +READ_ENABLED_CAP =3D TRUE=0D +READ_STATUS =3D TRUE=0D +READ_LOCK_CAP =3D TRUE=0D +READ_LOCK_STATUS =3D TRUE=0D +=0D + INF ArmPlatformPkg/PrePi/PeiMPCore.inf=0D +=0D + FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {=0D + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRE= D =3D TRUE {=0D + SECTION FV_IMAGE =3D FVMAIN=0D + }=0D + }=0D +=0D +!include Silicon/Phytium/Phytium.fdf.inc=0D diff --git a/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/Phyti= umPlatformLib.inf b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLi= b/PhytiumPlatformLib.inf new file mode 100644 index 000000000000..7ad0f31549ef --- /dev/null +++ b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatf= ormLib.inf @@ -0,0 +1,66 @@ +#/** @file=0D +# Library for Phytium Platform.=0D +#=0D +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#**/=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x00010019=0D + BASE_NAME =3D PhytiumPlatformLib=0D + FILE_GUID =3D fac08f56-40fe-11eb-a2a3-27b46864b1f3= =0D + MODULE_TYPE =3D BASE=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D ArmPlatformLib=0D +=0D +[Packages]=0D + MdePkg/MdePkg.dec=0D + MdeModulePkg/MdeModulePkg.dec=0D + EmbeddedPkg/EmbeddedPkg.dec=0D + ArmPkg/ArmPkg.dec=0D + ArmPlatformPkg/ArmPlatformPkg.dec=0D + Silicon/Phytium/Phytium.dec=0D +=0D +[LibraryClasses]=0D + IoLib=0D + ArmLib=0D + ArmSmcLib=0D + MemoryAllocationLib=0D + SerialPortLib=0D + HobLib=0D + BaseMemoryLib=0D +=0D +[Sources.common]=0D + PhytiumPlatformLib.c=0D + PhytiumPlatformLibMem.c=0D +=0D +[Sources.AARCH64]=0D + AArch64/PhytiumPlatformHelper.S=0D +=0D +[Guids]=0D + gPhytiumPlatformMemoryInforGuid=0D + gPhytiumPlatformCpuInforGuid=0D + gPhytiumPlatformPciHostInforGuid=0D +=0D +[FixedPcd]=0D + gArmTokenSpaceGuid.PcdSystemMemoryBase=0D + gArmTokenSpaceGuid.PcdSystemMemorySize=0D + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase=0D + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize=0D + gPhytiumPlatformTokenSpaceGuid.PcdPciConfigBase=0D + gPhytiumPlatformTokenSpaceGuid.PcdPciConfigSize=0D + gArmTokenSpaceGuid.PcdPciBusMin=0D + gArmTokenSpaceGuid.PcdPciBusMax=0D + gArmTokenSpaceGuid.PcdPciIoBase=0D + gArmTokenSpaceGuid.PcdPciIoSize=0D + gArmTokenSpaceGuid.PcdPciIoTranslation=0D + gArmTokenSpaceGuid.PcdPciMmio32Base=0D + gArmTokenSpaceGuid.PcdPciMmio32Size=0D + gArmTokenSpaceGuid.PcdPciMmio32Translation=0D + gArmTokenSpaceGuid.PcdPciMmio64Base=0D + gArmTokenSpaceGuid.PcdPciMmio64Size=0D +=0D +[Pcd]=0D + gArmPlatformTokenSpaceGuid.PcdCoreCount=0D diff --git a/Silicon/Phytium/Include/PhytiumSystemServiceInterface.h b/Sili= con/Phytium/Include/PhytiumSystemServiceInterface.h new file mode 100644 index 000000000000..ddea33dbc275 --- /dev/null +++ b/Silicon/Phytium/Include/PhytiumSystemServiceInterface.h @@ -0,0 +1,112 @@ +/** @file=0D +=0D + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
= =0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#ifndef __OEMSVC_H_=0D +#define __OEMSVC_H_=0D +=0D +/* SMC function IDs for OEM Service queries */=0D +#define PHYTIUM_OEM_SVC_PSSI_VERSION 0x8200ff03=0D +#define PHYTIUM_OEM_SVC_PBF_VERSION 0x82000001=0D +#define PHYTIUM_OEM_SVC_CPU_VERSION 0xc2000002=0D +#define PHYTIUM_OEM_SVC_CPU_MAPS 0xc2000003=0D +#define PHYTIUM_OEM_SVC_CPU_CONF 0xc2000004=0D +#define PHYTIUM_OEM_SVC_MEM_REGIONS 0xc2000005=0D +#define PHYTIUM_OEM_SVC_MCU_DIMMS 0xc2000006=0D +#define PHYTIUM_OEM_SVC_PCI_CONTROLLER 0xc2000007=0D +#define PHYTIUM_OEM_SVC_HOST_BRIDGE 0xc2000008=0D +#define PHYTIUM_OEM_SVC_GET_FLASH_CMD 0xC200000C=0D +=0D +#define PHYTIUM_IOBASE_MASK 0xfffffff=0D +#define PHYTIUM_MEMIO32_MASK 0xffffffff=0D +#define PHYTIUM_MEMIO64_MASK 0xffffffffff=0D +=0D +#pragma pack(1)=0D +=0D +typedef struct {=0D + UINT64 CpuMapCount;=0D + UINT64 CpuMap[1];=0D +} PHYTIUM_CPU_MAP_INFOR;=0D +=0D +=0D +typedef struct {=0D + UINT64 CpuFreq; // Hz=0D + UINT64 CpuL3CacheSize; // Byte=0D + UINT64 CpuL3CacheLineSize; // Byte=0D +} PHYTIUM_CPU_COURE_INFOR;=0D +=0D +typedef struct {=0D + UINT64 CupVersion; //cpu version=0D + PHYTIUM_CPU_COURE_INFOR CpuCoreInfo; //cpu core info=0D + PHYTIUM_CPU_MAP_INFOR CpuMapInfo; //cpu map info=0D +}PHYTIUM_CPU_INFO;=0D +=0D +typedef struct {=0D + UINT64 MemSize; // MB=0D + UINT64 MemDramId;=0D + UINT64 MemModuleId;=0D + UINT64 MemSerial;=0D + UINT64 MemSlotNumber;=0D + UINT64 MemFeatures;=0D +} MCU_DIMM;=0D +=0D +#define MCU_DIMM_MAXCOUNT 2=0D +=0D +typedef struct {=0D + UINT64 MemFreq; // MHz=0D + UINT64 MemDimmCount;=0D + MCU_DIMM McuDimm[1];=0D +} MCU_DIMMS;=0D +=0D +typedef struct {=0D + UINT64 MemStart;=0D + UINT64 MemSize;=0D + UINT64 MemNodeId;=0D +} MEMORY_BLOCK;=0D +=0D +typedef struct {=0D + UINT64 MemBlockCount;=0D + MEMORY_BLOCK MemBlock[1];=0D +} MEMORY_INFOR;=0D +=0D +typedef struct {=0D + UINT8 PciLane;=0D + UINT8 PciSpeed;=0D + UINT8 Reserved[6];=0D +} PCI_BLOCK;=0D +=0D +typedef struct {=0D + UINT64 PciCount;=0D + PCI_BLOCK PciBlock[1];=0D +} PHYTIUM_PCI_CONTROLLER;=0D +=0D +typedef struct {=0D + UINT8 BusStart;=0D + UINT8 BusEnd;=0D + UINT8 Reserved[6];=0D + UINT64 PciConfigBase;=0D + UINT64 IoBase;=0D + UINT64 IoSize;=0D + UINT64 Mem32Base;=0D + UINT64 Mem32Size;=0D + UINT64 Mem64Base;=0D + UINT64 Mem64Size;=0D + UINT16 IntA;=0D + UINT16 IntB;=0D + UINT16 IntC;=0D + UINT16 IntD;=0D +} PCI_HOST_BLOCK;=0D +=0D +typedef struct {=0D + UINT64 PciHostCount;=0D + PCI_HOST_BLOCK PciHostBlock[1];=0D +} PHYTIUM_PCI_HOST_BRIDGE;=0D +=0D +#pragma pack ()=0D +=0D +=0D +#endif /* __OEMSVC_H_ */=0D diff --git a/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/Phyti= umPlatformLib.c b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/= PhytiumPlatformLib.c new file mode 100644 index 000000000000..2affc9c131b9 --- /dev/null +++ b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatf= ormLib.c @@ -0,0 +1,135 @@ +/** @file=0D + Library for Phytium platform.=0D +=0D + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
= =0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +#include =0D +=0D +ARM_CORE_INFO mPhytiumMpCoreInfoTable[] =3D {=0D + {=0D + // Cluster 0, Core 0=0D + 0x0, 0x0,=0D +=0D + // MP Core MailBox Set/Get/Clear Addresses and Clear Value=0D + (EFI_PHYSICAL_ADDRESS)0,=0D + (EFI_PHYSICAL_ADDRESS)0,=0D + (EFI_PHYSICAL_ADDRESS)0,=0D + (UINT64)0xFFFFFFFF=0D + }=0D +};=0D +=0D +/*=0D + This function geted the current Boot Mode.=0D +=0D + This function returns the boot reason on the platform.=0D +=0D + @return Return the current Boot Mode of the platform.=0D +=0D +*/=0D +EFI_BOOT_MODE=0D +ArmPlatformGetBootMode (=0D + VOID=0D + )=0D +{=0D + return BOOT_WITH_FULL_CONFIGURATION;=0D +}=0D +=0D +=0D +/**=0D + Initialize controllers that must setup in the normal world.=0D +=0D + This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/= PlatformPeim=0D + in the PEI phase.=0D +=0D + @retval EFI_SUCCESS ArmPlatformInitialize() is executed successf= ully.=0D +=0D +**/=0D +RETURN_STATUS=0D +ArmPlatformInitialize (=0D + IN UINTN MpId=0D + )=0D +{=0D + return RETURN_SUCCESS;=0D +}=0D +=0D +=0D +/**=0D + This function Inited the system (or sometimes called permanent) memory.= =0D +=0D + This memory is generally represented by the DRAM.=0D +=0D + @param[in] None.=0D +=0D + @retval None.=0D +=0D +**/=0D +VOID=0D +ArmPlatformInitializeSystemMemory (=0D + VOID=0D + )=0D +{=0D + // Nothing to do here=0D +}=0D +=0D +=0D +/**=0D + This function geted the information of core.=0D +=0D + @param[out] CoreCount The count of CoreInfoTable.=0D + @param[out] ArmCoreTable The pointer of CoreInfoTable.=0D +=0D + @retval EFI_SUCCESS PrePeiCoreGetMpCoreInfo() is executed succes= sfully.=0D +=0D +**/=0D +EFI_STATUS=0D +PrePeiCoreGetMpCoreInfo (=0D + OUT UINTN *CoreCount,=0D + OUT ARM_CORE_INFO **ArmCoreTable=0D + )=0D +{=0D + *CoreCount =3D PcdGet32 (PcdCoreCount);=0D + *ArmCoreTable =3D mPhytiumMpCoreInfoTable;=0D + return EFI_SUCCESS;=0D +}=0D +=0D +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is un= defined in the contect of PrePeiCore=0D +EFI_GUID mArmMpCoreInfoPpiGuid =3D ARM_MP_CORE_INFO_PPI_GUID;=0D +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi =3D { PrePeiCoreGetMpCoreInfo };=0D +=0D +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] =3D=0D +{=0D + {=0D + EFI_PEI_PPI_DESCRIPTOR_PPI,=0D + &mArmMpCoreInfoPpiGuid,=0D + &mMpCoreInfoPpi=0D + }=0D +};=0D +=0D +=0D +/**=0D + This function geted the information of Ppitable.=0D +=0D + @param[out] PpiListSize The size of Ppitable.=0D + @param[out] PpiList The pointer of Ppitable.=0D +=0D + @retval None.=0D +=0D +**/=0D +VOID=0D +ArmPlatformGetPlatformPpiList (=0D + OUT UINTN *PpiListSize,=0D + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList=0D + )=0D +{=0D + *PpiListSize =3D sizeof(gPlatformPpiTable);=0D + *PpiList =3D gPlatformPpiTable;=0D +}=0D diff --git a/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/Phyti= umPlatformLibMem.c b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformL= ib/PhytiumPlatformLibMem.c new file mode 100644 index 000000000000..ff70cb28a20a --- /dev/null +++ b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/PhytiumPlatf= ormLibMem.c @@ -0,0 +1,148 @@ +/** @file=0D + Library of memory map for Phytium platform.=0D +=0D + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
= =0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +// Number of Virtual Memory Map Descriptors=0D +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 32=0D +=0D +// DDR attributes=0D +#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRI= TE_BACK=0D +#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNC= ACHED_UNBUFFERED=0D +=0D +/**=0D + Return the Virtual Memory Map of your platform=0D +=0D + This Virtual Memory Map is used by MemoryInitPei Module to initialize th= e MMU on your platform.=0D +=0D + @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR des= cribing a Physical-to-=0D + Virtual Memory mapping. This array must b= e ended by a zero-filled=0D + entry=0D +**/=0D +VOID=0D +ArmPlatformGetVirtualMemoryMap (=0D + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap=0D + )=0D +{=0D + ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;=0D + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;=0D + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;=0D + MEMORY_BLOCK *MemBlock =3D NULL;=0D + MEMORY_INFOR *MemInfor =3D NULL;=0D + ARM_SMC_ARGS ArmSmcArgs;=0D + UINT32 MemBlockCnt =3D 0, Index, Index1;=0D +=0D + CacheAttributes =3D ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;=0D +=0D + ASSERT (VirtualMemoryMap !=3D NULL);=0D + VirtualMemoryTable =3D (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_= SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MA= P_DESCRIPTORS));=0D + if (VirtualMemoryTable =3D=3D NULL) {=0D + return;=0D + }=0D +=0D + ResourceAttributes =3D=0D + EFI_RESOURCE_ATTRIBUTE_PRESENT |=0D + EFI_RESOURCE_ATTRIBUTE_INITIALIZED |=0D + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |=0D + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |=0D + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |=0D + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |=0D + EFI_RESOURCE_ATTRIBUTE_TESTED;=0D +=0D + MemInfor =3D AllocatePages(1);=0D + ASSERT(MemInfor !=3D NULL);=0D +=0D + ArmSmcArgs.Arg0 =3D PHYTIUM_OEM_SVC_MEM_REGIONS;=0D + ArmSmcArgs.Arg1 =3D (UINTN)MemInfor;=0D + ArmSmcArgs.Arg2 =3D EFI_PAGE_SIZE;=0D + ArmCallSmc (&ArmSmcArgs);=0D + if (ArmSmcArgs.Arg0 =3D=3D 0) {=0D + MemBlockCnt =3D MemInfor->MemBlockCount;=0D + MemBlock =3D MemInfor->MemBlock;=0D + } else {=0D + ASSERT(FALSE);=0D + }=0D +=0D + //Soc Io Space=0D + VirtualMemoryTable[Index].PhysicalBase =3D PcdGet64 (PcdSystemIoBase);= =0D + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdSystemIoBase);= =0D + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdSystemIoSize);= =0D + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE= _DEVICE;=0D +=0D + //=0D + // PCI Configuration Space=0D + //=0D + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdPciConfigBase= );=0D + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdPciConfigBase= );=0D + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdPciConfigSize= );=0D + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE;=0D +=0D + //=0D + // PCI Memory Space=0D + //=0D + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdPciIoBase) + = PcdGet64(PcdPciIoTranslation);=0D + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdPciIoBase) + = PcdGet64(PcdPciIoTranslation);=0D + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdPciIoSize);=0D + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE;=0D +=0D + //=0D + // PCI Memory Space=0D + //=0D + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet32 (PcdPciMmio32Base= );=0D + VirtualMemoryTable[Index].VirtualBase =3D PcdGet32 (PcdPciMmio32Base= );=0D + VirtualMemoryTable[Index].Length =3D PcdGet32 (PcdPciMmio32Size= );=0D + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE;=0D +=0D + //=0D + // 64-bit PCI Memory Space=0D + //=0D + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdPciMmio64Base= );=0D + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdPciMmio64Base= );=0D + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdPciMmio64Size= );=0D + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE;=0D +=0D + //DDR=0D + for (Index1 =3D 0; Index1 < MemBlockCnt; Index1++) {=0D + VirtualMemoryTable[++Index].PhysicalBase =3D MemBlock->MemStart;=0D + VirtualMemoryTable[Index].VirtualBase =3D MemBlock->MemStart;=0D + VirtualMemoryTable[Index].Length =3D MemBlock->MemSize;=0D + VirtualMemoryTable[Index].Attributes =3D CacheAttributes;=0D +=0D + BuildResourceDescriptorHob (=0D + EFI_RESOURCE_SYSTEM_MEMORY,=0D + ResourceAttributes,=0D + MemBlock->MemStart,=0D + MemBlock->MemSize);=0D +=0D + MemBlock ++;=0D + }=0D +=0D + // End of Table=0D + VirtualMemoryTable[++Index].PhysicalBase =3D 0;=0D + VirtualMemoryTable[Index].VirtualBase =3D 0;=0D + VirtualMemoryTable[Index].Length =3D 0;=0D + VirtualMemoryTable[Index].Attributes =3D (ARM_MEMORY_REGION_ATTRIBUT= ES)0;=0D +=0D + ASSERT((Index + 1) <=3D MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);=0D +=0D + for (Index1 =3D 0; Index1 < Index; Index1++) {=0D + DEBUG((DEBUG_ERROR, "PhysicalBase %12lx VirtualBase %12lx Length %12lx= Attributes %12lx\n", VirtualMemoryTable[Index1].PhysicalBase,\=0D + VirtualMemoryTable[Index1].VirtualBase, VirtualMemoryTable[Index1]= .Length, VirtualMemoryTable[Index1].Attributes));=0D + }=0D +=0D + *VirtualMemoryMap =3D VirtualMemoryTable;=0D +}=0D diff --git a/Maintainers.txt b/Maintainers.txt index 56e16fc48cb4..a23dab394a61 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -310,3 +310,10 @@ F: Silicon/SiFive/ M: Abner Chang =0D M: Gilbert Chen =0D R: Daniel Schaefer =0D +=0D +Phytium platforms and silicon=0D +F: Platform/Phytium/=0D +F: Silicon/silicon/=0D +M: Peng Xie =0D +M: Ling Jia =0D +R: Yiqi Shu =0D diff --git a/Silicon/Phytium/Phytium.fdf.inc b/Silicon/Phytium/Phytium.fdf.= inc new file mode 100644 index 000000000000..641266c6012f --- /dev/null +++ b/Silicon/Phytium/Phytium.fdf.inc @@ -0,0 +1,119 @@ +## @file=0D +# This package provides common open source Phytium silicon modules.=0D +#=0D +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.=0D +#=0D +# SPDX-License-Identifier:BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +##########################################################################= ##=0D +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section = #=0D +##########################################################################= ##=0D +#=0D +#[Rule.Common.DXE_DRIVER]=0D +# FILE DRIVER =3D $(NAMED_GUID) {=0D +# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_= NAME).depex=0D +# COMPRESS PI_STD {=0D +# GUIDED {=0D +# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi= =0D +# UI STRING=3D"$(MODULE_NAME)" Optional=0D +# VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_N= UMBER)=0D +# }=0D +# }=0D +# }=0D +#=0D +##########################################################################= ##=0D +=0D +[Rule.Common.SEC]=0D + FILE SEC =3D $(NAMED_GUID) RELOCS_STRIPPED FIXED {=0D + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME).efi= =0D + }=0D +=0D +[Rule.Common.PEI_CORE]=0D + FILE PEI_CORE =3D $(NAMED_GUID) FIXED {=0D + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME).efi= =0D + UI STRING =3D"$(MODULE_NAME)" Optional=0D + }=0D +=0D +[Rule.Common.PEIM]=0D + FILE PEIM =3D $(NAMED_GUID) FIXED {=0D + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex= =0D + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME).efi= =0D + UI STRING=3D"$(MODULE_NAME)" Optional=0D + }=0D +=0D +[Rule.Common.PEIM.TIANOCOMPRESSED]=0D + FILE PEIM =3D $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {=0D + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex= =0D + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED =3D TR= UE {=0D + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi=0D + UI STRING=3D"$(MODULE_NAME)" Optional=0D + }=0D + }=0D +=0D +[Rule.Common.DXE_CORE]=0D + FILE DXE_CORE =3D $(NAMED_GUID) {=0D + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi=0D + UI STRING=3D"$(MODULE_NAME)" Optional=0D + }=0D +=0D +[Rule.Common.UEFI_DRIVER]=0D + FILE DRIVER =3D $(NAMED_GUID) {=0D + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NA= ME).depex=0D + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi=0D + UI STRING=3D"$(MODULE_NAME)" Optional=0D + }=0D +=0D +[Rule.Common.DXE_DRIVER]=0D + FILE DRIVER =3D $(NAMED_GUID) {=0D + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NA= ME).depex=0D + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi=0D + UI STRING=3D"$(MODULE_NAME)" Optional=0D + }=0D +=0D +[Rule.Common.DXE_RUNTIME_DRIVER]=0D + FILE DRIVER =3D $(NAMED_GUID) {=0D + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NA= ME).depex=0D + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi=0D + UI STRING=3D"$(MODULE_NAME)" Optional=0D + }=0D +=0D +[Rule.Common.UEFI_APPLICATION]=0D + FILE APPLICATION =3D $(NAMED_GUID) {=0D + UI STRING =3D"$(MODULE_NAME)" Optional=0D + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi=0D + }=0D +=0D +[Rule.Common.UEFI_DRIVER.BINARY]=0D + FILE DRIVER =3D $(NAMED_GUID) {=0D + DXE_DEPEX DXE_DEPEX Optional |.depex=0D + PE32 PE32 |.efi=0D + UI STRING=3D"$(MODULE_NAME)" Optional=0D + VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_NUMBE= R)=0D + }=0D +=0D +[Rule.Common.UEFI_APPLICATION.BINARY]=0D + FILE APPLICATION =3D $(NAMED_GUID) {=0D + PE32 PE32 |.efi=0D + UI STRING=3D"$(MODULE_NAME)" Optional=0D + VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_NUMBE= R)=0D + }=0D +=0D +[Rule.Common.USER_DEFINED.BIOSINFO]=0D + FILE FREEFORM =3D $(NAMED_GUID) {=0D + RAW BIN Align =3D 16 $(INF_OUTPUT)/$(MODULE_NAME).acpi=0D + }=0D +=0D +[Rule.Common.UEFI_APPLICATION.UI]=0D + FILE APPLICATION =3D $(NAMED_GUID) {=0D + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi=0D + UI STRING=3D"Enter Setup"=0D + VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_NUMBE= R)=0D + }=0D +=0D +[Rule.Common.USER_DEFINED.ACPITABLE]=0D + FILE FREEFORM =3D $(NAMED_GUID) {=0D + RAW ACPI |.acpi=0D + RAW ASL |.aml=0D + }=0D diff --git a/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/AArch= 64/PhytiumPlatformHelper.S b/Silicon/Phytium/Phytium2000-4/Library/PhytiumP= latformLib/AArch64/PhytiumPlatformHelper.S new file mode 100644 index 000000000000..cce23b786197 --- /dev/null +++ b/Silicon/Phytium/Phytium2000-4/Library/PhytiumPlatformLib/AArch64/Phyt= iumPlatformHelper.S @@ -0,0 +1,76 @@ +#=0D +# Copyright (c) 2011-2013, ARM Limited. All rights reserved.=0D +#=0D +# This program and the accompanying materials=0D +# are licensed and made available under the terms and conditions of the B= SD License=0D +# which accompanies this distribution. The full text of the license may = be found at=0D +# http://opensource.org/licenses/bsd-license.php=0D +#=0D +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,=0D +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED.=0D +#=0D +#=0D +=0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +.text=0D +.align 2=0D +=0D +GCC_ASM_EXPORT(ArmPlatformPeiBootAction)=0D +GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)=0D +GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)=0D +GCC_ASM_EXPORT(ArmPlatformGetCorePosition)=0D +=0D +PrimaryCoreMpid: .word 0x0=0D +=0D +=0D +ASM_PFX(ArmPlatformPeiBootAction):=0D + // Save MPIDR_EL1[23:0] in a variable.=0D + mov x20, x30=0D + bl ASM_PFX(ArmReadMpidr)=0D + lsl w0, w0, #8=0D + lsr w0, w0, #8=0D + ldr x1, =3DPrimaryCoreMpid=0D + str w0, [x1]=0D + ret x20=0D +=0D +//UINTN=0D +//ArmPlatformGetPrimaryCoreMpId (=0D +// VOID=0D +// );=0D +ASM_PFX(ArmPlatformGetPrimaryCoreMpId):=0D + ldr x0, =3DPrimaryCoreMpid=0D + ldr w0, [x0]=0D + ret=0D +=0D +//UINTN=0D +//ArmPlatformIsPrimaryCore (=0D +// IN UINTN MpId=0D +// );=0D +ASM_PFX(ArmPlatformIsPrimaryCore):=0D + mov x20, x30=0D + bl ASM_PFX(ArmReadMpidr)=0D + lsl w0, w0, #8=0D + lsr w0, w0, #8=0D + ldr x1, =3DPrimaryCoreMpid=0D + ldr w1, [x1]=0D + cmp w0, w1=0D + cset x0, eq=0D + ret x20=0D +=0D +//UINTN=0D +//ArmPlatformGetCorePosition (=0D +// IN UINTN MpId=0D +// );=0D +// With this function: CorePos =3D (ClusterId * 4) + CoreId=0D +ASM_PFX(ArmPlatformGetCorePosition):=0D + and x1, x0, #ARM_CORE_MASK=0D + and x0, x0, #ARM_CLUSTER_MASK=0D + add x0, x1, x0, LSR #6=0D + ret=0D +=0D +ASM_FUNCTION_REMOVE_IF_UNREFERENCED=0D --=20 2.25.1