[PATCH v1 00/27] Fix Ecc reported errors in ArmPkg

[PATCH v1 00/27] Fix Ecc reported errors in ArmPkg

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

The Ecc tools available in the BaseTools package checks for
good practice coding standards. Some errors reported while
running Ecc on the ArmPkg require modifications.

The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

Pierre Gondois (27):
  ArmPkg: Fix Ecc error 8001 in Chipset
  ArmPkg: Fix Ecc error 8001 in SemihostLib
  ArmPkg: Fix Ecc error 8001 in Chipset
  ArmPkg: Fix Ecc error 8001 in ArmArchTimerLib
  ArmPkg: Fix Ecc error 9005 in CpuDxe
  ArmPkg: Fix Ecc error 10006 in ArmPkg.dsc
  ArmPkg: Fix Ecc error 10016 in StandaloneMmMmuLib
  ArmPkg: Fix Ecc error 10014 in ArmScmiDxe
  ArmPkg: Fix Ecc error 10014 in GenericWatchdogDxe
  ArmPkg: Fix Ecc error 10014 in MmCommunicationDxe
  ArmPkg: Fix Ecc error 10014 in SemihostLib
  ArmPkg: Remove ArmGic/ArmGicSecLib.c
  ArmPkg: Fix Ecc error 5003 in ArmExceptionLib
  ArmPkg: Fix Ecc error 6001 in MmCommunicationDxe
  ArmPkg: Fix Ecc error 6001 in ArmSoftFloatLib
  ArmPkg: Rename include guard in ArmGicLib.h
  ArmPkg: Fix Ecc error 7008 for SCMI_CLOCK_RATE
  ArmPkg: Fix Ecc error 7008 for OPTEE_MESSAGE_PARAM
  ArmPkg: Fix Ecc error 8005/8007 in ArmDisassemblerLib
  ArmPkg: Fix Ecc error 8005 for SCMI_PROTOCOL_ID
  ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_TYPE
  ArmPkg: Fix Ecc error 8005 for SCMI_STATUS
  ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID
  ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_BASE
  ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_CLOCK
  ArmPkg: Fix Ecc error 8005 for SCMI_CLOCK_RATE_FORMAT
  ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_PERFORMANCE

 ArmPkg/ArmPkg.dsc                             |   6 +-
 ArmPkg/Drivers/ArmGic/ArmGicSecLib.c          |  58 -------
 ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf      |   9 +-
 .../ArmScmiPerformanceProtocolPrivate.h       |   4 +-
 ArmPkg/Drivers/ArmScmiDxe/Scmi.c              |  10 +-
 ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c  |  24 +--
 ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c |  44 ++---
 ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c           |  10 +-
 .../ArmScmiDxe/ScmiPerformanceProtocol.c      |  30 ++--
 ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h       |  48 +++---
 ArmPkg/Drivers/CpuDxe/CpuMpCore.c             |   4 +-
 .../GenericWatchdogDxe/GenericWatchdogDxe.inf |   3 +-
 .../MmCommunicationDxe/MmCommunicate.h        |   8 +-
 .../MmCommunicationDxe/MmCommunication.inf    |   3 +-
 ArmPkg/Include/Chipset/AArch64.h              |  12 +-
 ArmPkg/Include/Chipset/AArch64Mmu.h           |   4 +-
 ArmPkg/Include/Chipset/ArmCortexA5x.h         |   8 +-
 ArmPkg/Include/Chipset/ArmV7.h                |   4 +-
 ArmPkg/Include/Library/ArmGicLib.h            |   8 +-
 ArmPkg/Include/Library/OpteeLib.h             |  11 +-
 ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h |  10 +-
 .../Include/Protocol/ArmScmiClock2Protocol.h  |   6 +-
 .../Include/Protocol/ArmScmiClockProtocol.h   |  32 ++--
 .../Protocol/ArmScmiPerformanceProtocol.h     |  14 +-
 .../Library/ArmArchTimerLib/ArmArchTimerLib.c |  12 +-
 .../ArmDisassemblerLib/ArmDisassembler.c      | 159 +++++++++---------
 .../ArmDisassemblerLib/ThumbDisassembler.c    | 158 ++++++++---------
 .../AArch64/AArch64Exception.c                |   4 +-
 .../AArch64/ExceptionSupport.S                |  10 +-
 .../ArmExceptionLib/Arm/ArmException.c        |   5 +-
 ArmPkg/Library/ArmSoftFloatLib/platform.h     |   6 +
 ArmPkg/Library/SemihostLib/SemihostLib.c      |  26 +--
 ArmPkg/Library/SemihostLib/SemihostLib.inf    |   3 +-
 ArmPkg/Library/SemihostLib/SemihostPrivate.h  |  80 ++++-----
 .../ArmMmuStandaloneMmLib.inf                 |   4 +-
 ArmPlatformPkg/PrePeiCore/AArch64/Exception.S |  10 +-
 36 files changed, 416 insertions(+), 431 deletions(-)
 delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicSecLib.c

--
2.17.1

[PATCH v1 01/27] ArmPkg: Fix Ecc error 8001 in Chipset

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Only capital letters are allowed to be used
for #define declarations

Edk2 coding standard stating that:
"Names starting with one or two underscores, such as
_MACRO_GUARD_FILE_NAME_H_, must not be used."
the include guard of ArmCortexA5x.h is also updated.

Ref:
https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/
5_source_files/53_include_files#
5-3-5-all-include-file-contents-must-be-protected-by-a-include-guard

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Include/Chipset/AArch64.h                     | 12 ++++++------
 ArmPkg/Include/Chipset/ArmCortexA5x.h                |  6 +++---
 ArmPkg/Include/Chipset/ArmV7.h                       |  4 ++--
 .../ArmExceptionLib/AArch64/ExceptionSupport.S       | 10 +++++-----
 ArmPlatformPkg/PrePeiCore/AArch64/Exception.S        | 10 +++++-----
 5 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index 0ade5cce91c3..d49f4d60b15d 100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -1,7 +1,7 @@
 /** @file

   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2011 - 2017, ARM Ltd. All rights reserved.<BR>
+  Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -39,7 +39,7 @@
 // MIDR - Main ID Register definitions
 #define ARM_CPU_TYPE_SHIFT      4
 #define ARM_CPU_TYPE_MASK       0xFFF
-#define ARM_CPU_TYPE_AEMv8      0xD0F
+#define ARM_CPU_TYPE_AEMV8      0xD0F
 #define ARM_CPU_TYPE_A53        0xD03
 #define ARM_CPU_TYPE_A57        0xD07
 #define ARM_CPU_TYPE_A72        0xD08
@@ -97,10 +97,10 @@
 #define ARM_VECTOR_CUR_SP0_FIQ  0x100
 #define ARM_VECTOR_CUR_SP0_SERR 0x180

-#define ARM_VECTOR_CUR_SPx_SYNC 0x200
-#define ARM_VECTOR_CUR_SPx_IRQ  0x280
-#define ARM_VECTOR_CUR_SPx_FIQ  0x300
-#define ARM_VECTOR_CUR_SPx_SERR 0x380
+#define ARM_VECTOR_CUR_SPX_SYNC 0x200
+#define ARM_VECTOR_CUR_SPX_IRQ  0x280
+#define ARM_VECTOR_CUR_SPX_FIQ  0x300
+#define ARM_VECTOR_CUR_SPX_SERR 0x380

 #define ARM_VECTOR_LOW_A64_SYNC 0x400
 #define ARM_VECTOR_LOW_A64_IRQ  0x480
diff --git a/ArmPkg/Include/Chipset/ArmCortexA5x.h b/ArmPkg/Include/Chipset/ArmCortexA5x.h
index 847a6e00430b..2661ed8c0182 100644
--- a/ArmPkg/Include/Chipset/ArmCortexA5x.h
+++ b/ArmPkg/Include/Chipset/ArmCortexA5x.h
@@ -6,8 +6,8 @@

 **/

-#ifndef __ARM_CORTEX_A5x_H__
-#define __ARM_CORTEX_A5x_H__
+#ifndef ARM_CORTEX_A5X_H__
+#define ARM_CORTEX_A5X_H__

 //
 // Cortex A5x feature bit definitions
@@ -41,4 +41,4 @@ ArmUnsetCpuExCrBit (
   IN  UINT64    Bits
   );

-#endif
+#endif // ARM_CORTEX_A5X_H__
diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h
index fe91031ef33d..025f87a56d16 100644
--- a/ArmPkg/Include/Chipset/ArmV7.h
+++ b/ArmPkg/Include/Chipset/ArmV7.h
@@ -1,7 +1,7 @@
 /** @file

   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2011-2015, ARM Ltd. All rights reserved.<BR>
+  Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -70,7 +70,7 @@
 // MIDR - Main ID Register definitions
 #define ARM_CPU_TYPE_SHIFT      4
 #define ARM_CPU_TYPE_MASK       0xFFF
-#define ARM_CPU_TYPE_AEMv8      0xD0F
+#define ARM_CPU_TYPE_AEMV8      0xD0F
 #define ARM_CPU_TYPE_A53        0xD03
 #define ARM_CPU_TYPE_A57        0xD07
 #define ARM_CPU_TYPE_A15        0xC0F
diff --git a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
index 5b10a1339ac1..9202952ee9c0 100644
--- a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
+++ b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2011 - 2014 ARM LTD. All rights reserved.<BR>
+// Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
 // Portion of Copyright (c) 2014 NVIDIA Corporation. All rights reserved.<BR>
 // Copyright (c) 2016 HP Development Company, L.P.
 //
@@ -200,19 +200,19 @@ ASM_PFX(SErrorSP0):
 //
 // Current EL with SPx: 0x200 - 0x380
 //
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_SYNC)
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPX_SYNC)
 ASM_PFX(SynchronousExceptionSPx):
   ExceptionEntry  EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS, SP0

-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_IRQ)
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPX_IRQ)
 ASM_PFX(IrqSPx):
   ExceptionEntry  EXCEPT_AARCH64_IRQ

-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_FIQ)
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPX_FIQ)
 ASM_PFX(FiqSPx):
   ExceptionEntry  EXCEPT_AARCH64_FIQ

-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_SERR)
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPX_SERR)
 ASM_PFX(SErrorSPx):
   ExceptionEntry  EXCEPT_AARCH64_SERROR

diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
index 59a3da2721e7..43e40f97c3ee 100644
--- a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
+++ b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+#  Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -51,22 +51,22 @@ _DefaultSError_t:
   mov  x0, #EXCEPT_AARCH64_SERROR
   TO_HANDLER

-VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SYNC)
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_SYNC)
 _DefaultSyncExceptHandler_h:
   mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
   TO_HANDLER

-VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_IRQ)
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_IRQ)
 _DefaultIrq_h:
   mov  x0, #EXCEPT_AARCH64_IRQ
   TO_HANDLER

-VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_FIQ)
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_FIQ)
 _DefaultFiq_h:
   mov  x0, #EXCEPT_AARCH64_FIQ
   TO_HANDLER

-VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SERR)
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_SERR)
 _DefaultSError_h:
   mov  x0, #EXCEPT_AARCH64_SERROR
   TO_HANDLER
--
2.17.1

Re: [edk2-devel] [PATCH v1 01/27] ArmPkg: Fix Ecc error 8001 in Chipset

[Sami Mujawar]

[-- Attachment #1: Type: text/plain, Size: 549 bytes --]

Hi Pierre,

On Thu, Jan 21, 2021 at 01:51 AM, PierreGondois wrote:

> 
> -#ifndef __ARM_CORTEX_A5x_H__
> -#define __ARM_CORTEX_A5x_H__
> +#ifndef ARM_CORTEX_A5X_H__
> +#define ARM_CORTEX_A5X_H__

There should be a single trailing underscore for #include guards. See https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/5_source_files/53_include_files#5-3-5-all-include-file-contents-must-be-protected-by-a-include-guard

With that changed:

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar

[-- Attachment #2: Type: text/html, Size: 837 bytes --]

[PATCH v1 02/27] ArmPkg: Fix Ecc error 8001 in SemihostLib

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Only capital letters are allowed to be used
for #define declarations

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Library/SemihostLib/SemihostLib.c     | 26 +++----
 ArmPkg/Library/SemihostLib/SemihostPrivate.h | 80 ++++++++++----------
 2 files changed, 53 insertions(+), 53 deletions(-)

diff --git a/ArmPkg/Library/SemihostLib/SemihostLib.c b/ArmPkg/Library/SemihostLib/SemihostLib.c
index a75d45850d43..d66de71182c8 100644
--- a/ArmPkg/Library/SemihostLib/SemihostLib.c
+++ b/ArmPkg/Library/SemihostLib/SemihostLib.c
@@ -44,7 +44,7 @@ SemihostFileOpen (
   OpenBlock.Mode        = Mode;
   OpenBlock.NameLength  = AsciiStrLen(FileName);

-  Result = Semihost_SYS_OPEN(&OpenBlock);
+  Result = SEMIHOST_SYS_OPEN (&OpenBlock);

   if (Result == -1) {
     return RETURN_NOT_FOUND;
@@ -66,7 +66,7 @@ SemihostFileSeek (
   SeekBlock.Handle   = FileHandle;
   SeekBlock.Location = Offset;

-  Result = Semihost_SYS_SEEK(&SeekBlock);
+  Result = SEMIHOST_SYS_SEEK (&SeekBlock);

   // Semihosting does not behave as documented. It returns the offset on
   // success.
@@ -95,7 +95,7 @@ SemihostFileRead (
   ReadBlock.Buffer = Buffer;
   ReadBlock.Length = *Length;

-  Result = Semihost_SYS_READ(&ReadBlock);
+  Result = SEMIHOST_SYS_READ (&ReadBlock);

   if ((*Length != 0) && (Result == *Length)) {
     return RETURN_ABORTED;
@@ -122,7 +122,7 @@ SemihostFileWrite (
   WriteBlock.Buffer = Buffer;
   WriteBlock.Length = *Length;

-  *Length = Semihost_SYS_WRITE(&WriteBlock);
+  *Length = SEMIHOST_SYS_WRITE (&WriteBlock);

   if (*Length != 0)
     return RETURN_ABORTED;
@@ -135,7 +135,7 @@ SemihostFileClose (
   IN UINTN  FileHandle
   )
 {
-  if (Semihost_SYS_CLOSE (&FileHandle) == -1) {
+  if (SEMIHOST_SYS_CLOSE (&FileHandle) == -1) {
     return RETURN_INVALID_PARAMETER;
   } else {
     return RETURN_SUCCESS;
@@ -154,7 +154,7 @@ SemihostFileLength (
     return RETURN_INVALID_PARAMETER;
   }

-  Result = Semihost_SYS_FLEN(&FileHandle);
+  Result = SEMIHOST_SYS_FLEN (&FileHandle);

   if (Result == -1) {
     return RETURN_ABORTED;
@@ -195,7 +195,7 @@ SemihostFileTmpName(
   TmpNameBlock.Identifier = Identifier;
   TmpNameBlock.Length     = Length;

-  Result = Semihost_SYS_TMPNAME (&TmpNameBlock);
+  Result = SEMIHOST_SYS_TMPNAME (&TmpNameBlock);

   if (Result != 0) {
     return  RETURN_ABORTED;
@@ -220,7 +220,7 @@ SemihostFileRemove (
   RemoveBlock.FileName    = FileName;
   RemoveBlock.NameLength  = AsciiStrLen(FileName);

-  Result = Semihost_SYS_REMOVE(&RemoveBlock);
+  Result = SEMIHOST_SYS_REMOVE (&RemoveBlock);

   if (Result == 0) {
     return RETURN_SUCCESS;
@@ -258,7 +258,7 @@ SemihostFileRename(
   RenameBlock.NewFileName       = NewFileName;
   RenameBlock.NewFileNameLength = AsciiStrLen (NewFileName);

-  Result = Semihost_SYS_RENAME (&RenameBlock);
+  Result = SEMIHOST_SYS_RENAME (&RenameBlock);

   if (Result != 0) {
     return  RETURN_ABORTED;
@@ -272,7 +272,7 @@ SemihostReadCharacter (
   VOID
   )
 {
-  return Semihost_SYS_READC();
+  return SEMIHOST_SYS_READC ();
 }

 VOID
@@ -280,7 +280,7 @@ SemihostWriteCharacter (
   IN CHAR8 Character
   )
 {
-  Semihost_SYS_WRITEC(&Character);
+  SEMIHOST_SYS_WRITEC (&Character);
 }

 VOID
@@ -288,7 +288,7 @@ SemihostWriteString (
   IN CHAR8 *String
   )
 {
-  Semihost_SYS_WRITE0(String);
+  SEMIHOST_SYS_WRITE0 (String);
 }

 UINT32
@@ -301,5 +301,5 @@ SemihostSystem (
   SystemBlock.CommandLine   = CommandLine;
   SystemBlock.CommandLength = AsciiStrLen(CommandLine);

-  return Semihost_SYS_SYSTEM(&SystemBlock);
+  return SEMIHOST_SYS_SYSTEM (&SystemBlock);
 }
diff --git a/ArmPkg/Library/SemihostLib/SemihostPrivate.h b/ArmPkg/Library/SemihostLib/SemihostPrivate.h
index 8d1fc6d6eb5a..30103b04b53f 100644
--- a/ArmPkg/Library/SemihostLib/SemihostPrivate.h
+++ b/ArmPkg/Library/SemihostLib/SemihostPrivate.h
@@ -1,7 +1,7 @@
 /** @file

   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
+  Copyright (c) 2013 - 2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -151,19 +151,19 @@ _Semihost_SYS_SYSTEM(
   IN SEMIHOST_SYSTEM_BLOCK *SystemBlock
   );

-#define Semihost_SYS_OPEN(OpenBlock)        _Semihost_SYS_OPEN(0x01, OpenBlock)
-#define Semihost_SYS_CLOSE(Handle)          _Semihost_SYS_CLOSE(0x02, Handle)
-#define Semihost_SYS_WRITE0(String)         _Semihost_SYS_WRITE0(0x04, String)
-#define Semihost_SYS_WRITEC(Character)      _Semihost_SYS_WRITEC(0x03, Character)
-#define Semihost_SYS_WRITE(WriteBlock)      _Semihost_SYS_WRITE(0x05, WriteBlock)
-#define Semihost_SYS_READ(ReadBlock)        _Semihost_SYS_READ(0x06, ReadBlock)
-#define Semihost_SYS_READC()                _Semihost_SYS_READC(0x07, 0)
-#define Semihost_SYS_SEEK(SeekBlock)        _Semihost_SYS_SEEK(0x0A, SeekBlock)
-#define Semihost_SYS_FLEN(Handle)           _Semihost_SYS_FLEN(0x0C, Handle)
-#define Semihost_SYS_TMPNAME(TmpNameBlock)  _Semihost_SYS_TMPNAME(0x0D, TmpNameBlock)
-#define Semihost_SYS_REMOVE(RemoveBlock)    _Semihost_SYS_REMOVE(0x0E, RemoveBlock)
-#define Semihost_SYS_RENAME(RenameBlock)    _Semihost_SYS_RENAME(0x0F, RenameBlock)
-#define Semihost_SYS_SYSTEM(SystemBlock)    _Semihost_SYS_SYSTEM(0x12, SystemBlock)
+#define SEMIHOST_SYS_OPEN(OpenBlock)        _Semihost_SYS_OPEN(0x01, OpenBlock)
+#define SEMIHOST_SYS_CLOSE(Handle)          _Semihost_SYS_CLOSE(0x02, Handle)
+#define SEMIHOST_SYS_WRITE0(String)         _Semihost_SYS_WRITE0(0x04, String)
+#define SEMIHOST_SYS_WRITEC(Character)      _Semihost_SYS_WRITEC(0x03, Character)
+#define SEMIHOST_SYS_WRITE(WriteBlock)      _Semihost_SYS_WRITE(0x05, WriteBlock)
+#define SEMIHOST_SYS_READ(ReadBlock)        _Semihost_SYS_READ(0x06, ReadBlock)
+#define SEMIHOST_SYS_READC()                _Semihost_SYS_READC(0x07, 0)
+#define SEMIHOST_SYS_SEEK(SeekBlock)        _Semihost_SYS_SEEK(0x0A, SeekBlock)
+#define SEMIHOST_SYS_FLEN(Handle)           _Semihost_SYS_FLEN(0x0C, Handle)
+#define SEMIHOST_SYS_TMPNAME(TmpNameBlock)  _Semihost_SYS_TMPNAME(0x0D, TmpNameBlock)
+#define SEMIHOST_SYS_REMOVE(RemoveBlock)    _Semihost_SYS_REMOVE(0x0E, RemoveBlock)
+#define SEMIHOST_SYS_RENAME(RenameBlock)    _Semihost_SYS_RENAME(0x0F, RenameBlock)
+#define SEMIHOST_SYS_SYSTEM(SystemBlock)    _Semihost_SYS_SYSTEM(0x12, SystemBlock)

 #elif defined(__GNUC__) // __CC_ARM

@@ -175,37 +175,37 @@ GccSemihostCall (
   IN UINTN    SystemBlockAddress
   ); // __attribute__ ((interrupt ("SVC")));

-#define Semihost_SYS_OPEN(OpenBlock)        GccSemihostCall(0x01, (UINTN)(OpenBlock))
-#define Semihost_SYS_CLOSE(Handle)          GccSemihostCall(0x02, (UINTN)(Handle))
-#define Semihost_SYS_WRITE0(String)         GccSemihostCall(0x04, (UINTN)(String))
-#define Semihost_SYS_WRITEC(Character)      GccSemihostCall(0x03, (UINTN)(Character))
-#define Semihost_SYS_WRITE(WriteBlock)      GccSemihostCall(0x05, (UINTN)(WriteBlock))
-#define Semihost_SYS_READ(ReadBlock)        GccSemihostCall(0x06, (UINTN)(ReadBlock))
-#define Semihost_SYS_READC()                GccSemihostCall(0x07, (UINTN)(0))
-#define Semihost_SYS_SEEK(SeekBlock)        GccSemihostCall(0x0A, (UINTN)(SeekBlock))
-#define Semihost_SYS_FLEN(Handle)           GccSemihostCall(0x0C, (UINTN)(Handle))
-#define Semihost_SYS_TMPNAME(TmpNameBlock)  GccSemihostCall(0x0D, (UINTN)(TmpNameBlock))
-#define Semihost_SYS_REMOVE(RemoveBlock)    GccSemihostCall(0x0E, (UINTN)(RemoveBlock))
-#define Semihost_SYS_RENAME(RenameBlock)    GccSemihostCall(0x0F, (UINTN)(RenameBlock))
-#define Semihost_SYS_SYSTEM(SystemBlock)    GccSemihostCall(0x12, (UINTN)(SystemBlock))
+#define SEMIHOST_SYS_OPEN(OpenBlock)        GccSemihostCall(0x01, (UINTN)(OpenBlock))
+#define SEMIHOST_SYS_CLOSE(Handle)          GccSemihostCall(0x02, (UINTN)(Handle))
+#define SEMIHOST_SYS_WRITE0(String)         GccSemihostCall(0x04, (UINTN)(String))
+#define SEMIHOST_SYS_WRITEC(Character)      GccSemihostCall(0x03, (UINTN)(Character))
+#define SEMIHOST_SYS_WRITE(WriteBlock)      GccSemihostCall(0x05, (UINTN)(WriteBlock))
+#define SEMIHOST_SYS_READ(ReadBlock)        GccSemihostCall(0x06, (UINTN)(ReadBlock))
+#define SEMIHOST_SYS_READC()                GccSemihostCall(0x07, (UINTN)(0))
+#define SEMIHOST_SYS_SEEK(SeekBlock)        GccSemihostCall(0x0A, (UINTN)(SeekBlock))
+#define SEMIHOST_SYS_FLEN(Handle)           GccSemihostCall(0x0C, (UINTN)(Handle))
+#define SEMIHOST_SYS_TMPNAME(TmpNameBlock)  GccSemihostCall(0x0D, (UINTN)(TmpNameBlock))
+#define SEMIHOST_SYS_REMOVE(RemoveBlock)    GccSemihostCall(0x0E, (UINTN)(RemoveBlock))
+#define SEMIHOST_SYS_RENAME(RenameBlock)    GccSemihostCall(0x0F, (UINTN)(RenameBlock))
+#define SEMIHOST_SYS_SYSTEM(SystemBlock)    GccSemihostCall(0x12, (UINTN)(SystemBlock))

 #else // __CC_ARM

 #define SEMIHOST_SUPPORTED  FALSE

-#define Semihost_SYS_OPEN(OpenBlock)        (-1)
-#define Semihost_SYS_CLOSE(Handle)          (-1)
-#define Semihost_SYS_WRITE0(String)
-#define Semihost_SYS_WRITEC(Character)
-#define Semihost_SYS_WRITE(WriteBlock)      (0)
-#define Semihost_SYS_READ(ReadBlock)        ((ReadBlock)->Length)
-#define Semihost_SYS_READC()                ('x')
-#define Semihost_SYS_SEEK(SeekBlock)        (-1)
-#define Semihost_SYS_FLEN(Handle)           (-1)
-#define Semihost_SYS_TMPNAME(TmpNameBlock)  (-1)
-#define Semihost_SYS_REMOVE(RemoveBlock)    (-1)
-#define Semihost_SYS_RENAME(RenameBlock)    (-1)
-#define Semihost_SYS_SYSTEM(SystemBlock)    (-1)
+#define SEMIHOST_SYS_OPEN(OpenBlock)        (-1)
+#define SEMIHOST_SYS_CLOSE(Handle)          (-1)
+#define SEMIHOST_SYS_WRITE0(String)
+#define SEMIHOST_SYS_WRITEC(Character)
+#define SEMIHOST_SYS_WRITE(WriteBlock)      (0)
+#define SEMIHOST_SYS_READ(ReadBlock)        ((ReadBlock)->Length)
+#define SEMIHOST_SYS_READC()                ('x')
+#define SEMIHOST_SYS_SEEK(SeekBlock)        (-1)
+#define SEMIHOST_SYS_FLEN(Handle)           (-1)
+#define SEMIHOST_SYS_TMPNAME(TmpNameBlock)  (-1)
+#define SEMIHOST_SYS_REMOVE(RemoveBlock)    (-1)
+#define SEMIHOST_SYS_RENAME(RenameBlock)    (-1)
+#define SEMIHOST_SYS_SYSTEM(SystemBlock)    (-1)

 #endif // __CC_ARM

--
2.17.1

Re: [edk2-devel] [PATCH v1 02/27] ArmPkg: Fix Ecc error 8001 in SemihostLib

[Sami Mujawar]

[-- Attachment #1: Type: text/plain, Size: 107 bytes --]

Thank you for this patch.

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar

[-- Attachment #2: Type: text/html, Size: 137 bytes --]

[PATCH v1 03/27] ArmPkg: Fix Ecc error 8001 in Chipset

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Only capital letters are allowed to be used for #define
declarations

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Include/Chipset/AArch64Mmu.h   | 4 ++--
 ArmPkg/Include/Chipset/ArmCortexA5x.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/ArmPkg/Include/Chipset/AArch64Mmu.h b/ArmPkg/Include/Chipset/AArch64Mmu.h
index 606fe7420d67..6c7ada16b18a 100644
--- a/ArmPkg/Include/Chipset/AArch64Mmu.h
+++ b/ArmPkg/Include/Chipset/AArch64Mmu.h
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -190,7 +190,7 @@

 // The value written to the T*SZ fields are defined as 2^(64-T*SZ). So a 39Bit
 // Virtual address range for 512GB of virtual space sets T*SZ to 25
-#define INPUT_ADDRESS_SIZE_TO_TxSZ(a)        (64 - a)
+#define INPUT_ADDRESS_SIZE_TO_TXSZ(a)        (64 - a)

 // Uses LPAE Page Table format

diff --git a/ArmPkg/Include/Chipset/ArmCortexA5x.h b/ArmPkg/Include/Chipset/ArmCortexA5x.h
index 2661ed8c0182..2cce9f7e2bbb 100644
--- a/ArmPkg/Include/Chipset/ArmCortexA5x.h
+++ b/ArmPkg/Include/Chipset/ArmCortexA5x.h
@@ -1,6 +1,6 @@
 /** @file

-  Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+  Copyright (c) 2012 - 2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

--
2.17.1

Re: [edk2-devel] [PATCH v1 03/27] ArmPkg: Fix Ecc error 8001 in Chipset

[Sami Mujawar]

[-- Attachment #1: Type: text/plain, Size: 726 bytes --]

On Thu, Jan 21, 2021 at 01:51 AM, PierreGondois wrote:

> 
> diff --git a/ArmPkg/Include/Chipset/ArmCortexA5x.h
> b/ArmPkg/Include/Chipset/ArmCortexA5x.h
> index 2661ed8c0182..2cce9f7e2bbb 100644
> --- a/ArmPkg/Include/Chipset/ArmCortexA5x.h
> +++ b/ArmPkg/Include/Chipset/ArmCortexA5x.h
> @@ -1,6 +1,6 @@
> /** @file
> 
> - Copyright (c) 2012-2014, ARM Limited. All rights reserved.
> + Copyright (c) 2012 - 2021, Arm Limited. All rights reserved.<BR>
> 
> SPDX-License-Identifier: BSD-2-Clause-Patent

There is no code change in this file. Can you exclude the changes in this file from the patch, please?

With that changed:

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar

[-- Attachment #2: Type: text/html, Size: 814 bytes --]

[PATCH v1 04/27] ArmPkg: Fix Ecc error 8001 in ArmArchTimerLib

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Only capital letters are allowed to be used for #define
declarations

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c
index 24d9dae4e660..875c835706d6 100644
--- a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c
+++ b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c
@@ -1,7 +1,7 @@
 /** @file
   Generic ARM implementation of TimerLib.h

-  Copyright (c) 2011-2016, ARM Limited. All rights reserved.
+  Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -20,9 +20,9 @@

 // Select appropriate multiply function for platform architecture.
 #ifdef MDE_CPU_ARM
-#define MultU64xN MultU64x32
+#define MULT_U64_X_N MultU64x32
 #else
-#define MultU64xN MultU64x64
+#define MULT_U64_X_N MultU64x64
 #endif


@@ -121,7 +121,7 @@ MicroSecondDelay (
   //  = MicroSeconds x TICKS_PER_MICRO_SEC
   //  = MicroSeconds x Frequency.10^-6
   TimerTicks64 = DivU64x32 (
-                   MultU64xN (
+                   MULT_U64_X_N (
                      MicroSeconds,
                      GetPlatformTimerFreq ()
                      ),
@@ -263,7 +263,7 @@ GetTimeInNanoSecond (
   // Time = --------- x 1,000,000,000
   //        Frequency
   //
-  NanoSeconds = MultU64xN (
+  NanoSeconds = MULT_U64_X_N (
                   DivU64x32Remainder (
                     Ticks,
                     TimerFreq,
@@ -276,7 +276,7 @@ GetTimeInNanoSecond (
   // will not overflow 64-bit.
   //
   NanoSeconds += DivU64x32 (
-                   MultU64xN (
+                   MULT_U64_X_N (
                      (UINT64) Remainder,
                      1000000000U),
                    TimerFreq
--
2.17.1

Re: [edk2-devel] [PATCH v1 04/27] ArmPkg: Fix Ecc error 8001 in ArmArchTimerLib

[Sami Mujawar]

[-- Attachment #1: Type: text/plain, Size: 121 bytes --]

Hi Pierre,

Thank you for this patch.

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar

[-- Attachment #2: Type: text/html, Size: 159 bytes --]

[PATCH v1 05/27] ArmPkg: Fix Ecc error 9005 in CpuDxe

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Only Doxygen commands '@bug', '@todo', '@example', '@file',
'@attention', '@param', '@post', '@pre', '@retval', '@return',
'@sa', '@since', '@test', '@note', '@par', '@endcode', '@code',
'@{', '@}' are allowed to mark the code

This patch removes the ":" character following the "@param"
doxygen command.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/CpuDxe/CpuMpCore.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/Drivers/CpuDxe/CpuMpCore.c b/ArmPkg/Drivers/CpuDxe/CpuMpCore.c
index d16ae3979207..8a9e8c2fa3a2 100644
--- a/ArmPkg/Drivers/CpuDxe/CpuMpCore.c
+++ b/ArmPkg/Drivers/CpuDxe/CpuMpCore.c
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -32,7 +32,7 @@ ARM_PROCESSOR_TABLE mArmProcessorTableTemplate = {
 };

 /** Publish ARM Processor Data table in UEFI SYSTEM Table.
- * @param:  HobStart               Pointer to the beginning of the HOB List from PEI.
+ * @param  HobStart               Pointer to the beginning of the HOB List from PEI.
  *
  * Description : This function iterates through HOB list and finds ARM processor Table Entry HOB.
  *               If  the ARM processor Table Entry HOB is found, the HOB data is copied to run-time memory
--
2.17.1

Re: [edk2-devel] [PATCH v1 05/27] ArmPkg: Fix Ecc error 9005 in CpuDxe

[Sami Mujawar]

[-- Attachment #1: Type: text/plain, Size: 124 bytes --]

Hi Pierre,

This patch looks good to me.

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar

[-- Attachment #2: Type: text/html, Size: 162 bytes --]

[PATCH v1 06/27] ArmPkg: Fix Ecc error 10006 in ArmPkg.dsc

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
There should be no unnecessary inclusion of library
classes in the INF file

This comes with the additional information:
The Library Class [BootLogoLib]
is not used in any platform
The Library Class [DxeServicesLib]
is not used in any platform
The Library Class [UefiBootManagerLib]
is not used in any platform
The Library Class [PeCoffExtraActionLib]
is not used in any platform

ArmPkg/ArmPkg.dsc builds the modules requiring thses libraries,
but doesn't build the required libraries. This patch adds
the missing libraries to the [LibraryClasses.common] section.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/ArmPkg.dsc | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 48059cf38ed3..ddab84f92165 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -2,7 +2,7 @@
 # ARM processor package.
 #
 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2018, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
 # Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
 # Copyright (c) Microsoft Corporation.<BR>
 #
@@ -35,14 +35,17 @@ [PcdsFixedAtBuild]
 [LibraryClasses.common]
   BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+  BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
   CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
   PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
   PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
   TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
+  UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
   UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
   UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
   UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
@@ -50,6 +53,7 @@ [LibraryClasses.common]
   UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
   PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
   PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+  PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf

   UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
   HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
--
2.17.1

[PATCH v1 07/27] ArmPkg: Fix Ecc error 10016 in StandaloneMmMmuLib

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Module file has FILE_GUID collision with other
module file

The two .inf files with clashing GUID are:
ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf

As ArmMmuBaseLib.inf is older than ArmMmuStandaloneMmLib.inf,
it has precedence.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf
index 85973687f5ad..0a147fff18c0 100644
--- a/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf
+++ b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf
@@ -1,6 +1,6 @@
 #/** @file
 #
-#  Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+#  Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -10,7 +10,7 @@
 [Defines]
   INF_VERSION                    = 0x0001001A
   BASE_NAME                      = ArmMmuStandaloneMmCoreLib
-  FILE_GUID                      = da8f0232-fb14-42f0-922c-63104d2c70bd
+  FILE_GUID                      = 44a741c2-655f-41fc-b066-179f5a9aa78a
   MODULE_TYPE                    = MM_CORE_STANDALONE
   VERSION_STRING                 = 1.0
   LIBRARY_CLASS                  = StandaloneMmMmuLib
--
2.17.1

[PATCH v1 08/27] ArmPkg: Fix Ecc error 10014 in ArmScmiDxe

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
No used module files found

The source files
[ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h]
[ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h]
[ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.h]
[ArmPkg/Drivers/ArmScmiDxe/ArmScmiBaseProtocolPrivate.h]
[ArmPkg/Drivers/ArmScmiDxe/ArmScmiClockProtocolPrivate.h]
are existing in module
ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
but are not described in INF the file.

The patch also re-orders the files in the
[Sources.common] section.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf b/ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
index 6cd3aa1c82ec..fc5f841c2b7c 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
+++ b/ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
@@ -1,6 +1,6 @@
 #/** @file
 #
-#  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+#  Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -18,11 +18,16 @@ [Defines]
   ENTRY_POINT                    = ArmScmiDxeEntryPoint

 [Sources.common]
-  Scmi.c
+  ArmScmiBaseProtocolPrivate.h
+  ArmScmiClockProtocolPrivate.h
+  ArmScmiPerformanceProtocolPrivate.h
   ScmiBaseProtocol.c
+  Scmi.c
   ScmiClockProtocol.c
   ScmiDxe.c
+  ScmiDxe.h
   ScmiPerformanceProtocol.c
+  ScmiPrivate.h

 [Packages]
   ArmPkg/ArmPkg.dec
--
2.17.1

[PATCH v1 09/27] ArmPkg: Fix Ecc error 10014 in GenericWatchdogDxe

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
No used module files found

The source files
[ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h]
is existing in module
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
but is not described in the INF file.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
index d725a2c85839..7dbd30783892 100644
--- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2013-2017, ARM Limited. All rights reserved.
+#  Copyright (c) 2013-2021, Arm Limited. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -13,6 +13,7 @@ [Defines]
   ENTRY_POINT                    = GenericWatchdogEntry

 [Sources.common]
+  GenericWatchdog.h
   GenericWatchdogDxe.c

 [Packages]
--
2.17.1

[PATCH v1 10/27] ArmPkg: Fix Ecc error 10014 in MmCommunicationDxe

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
No used module files found

The source files
[ArmPkg/Drivers/MmCommunicationDxe/MmCommunicate.h]
is existing in module
ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
but is not described in the INF file.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
index 2465fb77c58e..05b6de73ff34 100644
--- a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
+++ b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
@@ -2,7 +2,7 @@
 #
 #  DXE MM Communicate driver
 #
-#  Copyright (c) 2016 - 2019, ARM Limited. All rights reserved.
+#  Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -24,6 +24,7 @@ [Defines]
 #

 [Sources.AARCH64]
+  MmCommunicate.h
   MmCommunication.c

 [Packages]
--
2.17.1

[PATCH v1 11/27] ArmPkg: Fix Ecc error 10014 in SemihostLib

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
No used module files found

The source files
[ArmPkg/Library/SemihostLib/SemihostPrivate.h]
is existing in module
ArmPkg/Library/SemihostLib/SemihostLib.inf
but is not described in the INF file.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Library/SemihostLib/SemihostLib.inf | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/ArmPkg/Library/SemihostLib/SemihostLib.inf b/ArmPkg/Library/SemihostLib/SemihostLib.inf
index a46618d30eef..2a4409f6573b 100644
--- a/ArmPkg/Library/SemihostLib/SemihostLib.inf
+++ b/ArmPkg/Library/SemihostLib/SemihostLib.inf
@@ -2,7 +2,7 @@
 # Semihosting JTAG lib
 #
 # Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -25,6 +25,7 @@ [Defines]
 #
 [Sources.common]
   SemihostLib.c
+  SemihostPrivate.h

 [Sources.ARM]
   Arm/GccSemihost.S | GCC
--
2.17.1

[PATCH v1 12/27] ArmPkg: Remove ArmGic/ArmGicSecLib.c

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

Commit: 142fa386eb907df55c239311cd5fa2d40f5007dd
removes the ArmGicSecLib. The file ArmGic/ArmGicSecLib.c
was exclusively used by this library. Thus, this file should
also be removed.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/ArmGic/ArmGicSecLib.c | 58 ----------------------------
 1 file changed, 58 deletions(-)
 delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicSecLib.c

diff --git a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c b/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c
deleted file mode 100644
index 4af98bb6ec93..000000000000
--- a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#include <Base.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/ArmGicLib.h>
-
-/*
- * This function configures the interrupts set by the mask to be secure.
- *
- */
-VOID
-EFIAPI
-ArmGicSetSecureInterrupts (
-  IN  UINTN         GicDistributorBase,
-  IN  UINTN*        GicSecureInterruptMask,
-  IN  UINTN         GicSecureInterruptMaskSize
-  )
-{
-  UINTN  Index;
-  UINT32 InterruptStatus;
-
-  // We must not have more interrupts defined by the mask than the number of available interrupts
-  ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32));
-
-  // Set all the interrupts defined by the mask as Secure
-  for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) {
-    InterruptStatus = MmioRead32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4));
-    MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), InterruptStatus & (~GicSecureInterruptMask[Index]));
-  }
-}
-
-VOID
-EFIAPI
-ArmGicEnableDistributor (
-  IN  INTN          GicDistributorBase
-  )
-{
-  // Turn on the GIC distributor
-  MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1);
-}
-
-VOID
-EFIAPI
-ArmGicSetupNonSecure (
-  IN  UINTN         MpId,
-  IN  INTN          GicDistributorBase,
-  IN  INTN          GicInterruptInterfaceBase
-  )
-{
-  ArmGicV2SetupNonSecure (MpId, GicDistributorBase, GicInterruptInterfaceBase);
-}
--
2.17.1

[PATCH v1 13/27] ArmPkg: Fix Ecc error 5003 in ArmExceptionLib

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Function name should be left justified,
followed by the beginning of the parameter list,
with the closing parenthesis on its own line,
indented two spaces

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c | 4 +++-
 ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c         | 5 +++--
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c b/ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c
index 514f80a2d47a..fcf3dd16443e 100644
--- a/ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c
+++ b/ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c
@@ -2,6 +2,7 @@
 *  Exception Handling support specific for AArch64
 *
 *  Copyright (c) 2016 HP Development Company, L.P.
+*  Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -27,7 +28,8 @@ RegisterEl0Stack (
   IN  VOID    *Stack
   );

-RETURN_STATUS ArchVectorConfig(
+RETURN_STATUS
+ArchVectorConfig (
   IN  UINTN       VectorBaseAddress
   )
 {
diff --git a/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c b/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c
index 36c9f3f92616..40857c7f1faf 100644
--- a/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c
+++ b/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c
@@ -2,7 +2,7 @@
 *  Exception handling support specific for ARM
 *
 * Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-* Copyright (c) 2014, ARM Limited. All rights reserved.<BR>
+* Copyright (c) 2014 - 2021, Arm Limited. All rights reserved.<BR>
 * Copyright (c) 2016 HP Development Company, L.P.<BR>
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -26,7 +26,8 @@ PHYSICAL_ADDRESS        gExceptionVectorAlignmentMask = ARM_VECTOR_TABLE_ALIGNME
 // NOTE: This code assumes vectors are ARM and not Thumb code
 UINTN                   gDebuggerNoHandlerValue = 0xEAFFFFFE;

-RETURN_STATUS ArchVectorConfig(
+RETURN_STATUS
+ArchVectorConfig (
   IN  UINTN       VectorBaseAddress
   )
 {
--
2.17.1

[PATCH v1 14/27] ArmPkg: Fix Ecc error 6001 in MmCommunicationDxe

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
All include file contents should be guarded by
a #ifndef statement.

This patch replaces a "#if !defined [...]" statement
by a "#ifndef [...]" statement, preventing Ecc to
throw an error.

Edk2 coding standard stating that:
"Names starting with one or two underscores, such as
_MACRO_GUARD_FILE_NAME_H_, must not be used."
the include guard is also updated.

Ref:
https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/
5_source_files/53_include_files#
5-3-5-all-include-file-contents-must-be-protected-by-a-include-guard

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/MmCommunicationDxe/MmCommunicate.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunicate.h b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunicate.h
index fcc346ba7e3e..32753947e1cb 100644
--- a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunicate.h
+++ b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunicate.h
@@ -1,13 +1,13 @@
 /** @file

-  Copyright (c) 2016-2018, ARM Limited. All rights reserved.
+  Copyright (c) 2016-2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

 **/

-#if !defined _MM_COMMUNICATE_H_
-#define _MM_COMMUNICATE_H_
+#ifndef MM_COMMUNICATE_H_
+#define MM_COMMUNICATE_H_

 #define MM_MAJOR_VER_MASK        0xEFFF0000
 #define MM_MINOR_VER_MASK        0x0000FFFF
@@ -19,4 +19,4 @@
 #define MM_CALLER_MAJOR_VER      0x1UL
 #define MM_CALLER_MINOR_VER      0x0

-#endif /* _MM_COMMUNICATE_H_ */
+#endif /* MM_COMMUNICATE_H_ */
--
2.17.1

[PATCH v1 15/27] ArmPkg: Fix Ecc error 6001 in ArmSoftFloatLib

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
All include file contents should be guarded by
a #ifndef statement.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Library/ArmSoftFloatLib/platform.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/ArmPkg/Library/ArmSoftFloatLib/platform.h b/ArmPkg/Library/ArmSoftFloatLib/platform.h
index 07800a9d5b79..fddf9de04d52 100644
--- a/ArmPkg/Library/ArmSoftFloatLib/platform.h
+++ b/ArmPkg/Library/ArmSoftFloatLib/platform.h
@@ -1,11 +1,17 @@
 /*
  * Copyright (c) 2019, Linaro Limited
+ * Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
  *
  * SPDX-License-Identifier: BSD-2-Clause-Patent
  */

+#ifndef ARM_SOFT_FLOAT_LIB_H_
+#define ARM_SOFT_FLOAT_LIB_H_
+
 #define LITTLEENDIAN 1
 #define INLINE static inline
 #define SOFTFLOAT_BUILTIN_CLZ 1
 #define SOFTFLOAT_FAST_INT64
 #include "opts-GCC.h"
+
+#endif // ARM_SOFT_FLOAT_LIB_H_
--
2.17.1

[PATCH v1 16/27] ArmPkg: Rename include guard in ArmGicLib.h

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

Edk2 coding standard states that:
"Names starting with one or two underscores, such as
_MACRO_GUARD_FILE_NAME_H_, must not be used."

Ref:
https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/
5_source_files/53_include_files#
5-3-5-all-include-file-contents-must-be-protected-by-a-include-guard

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Include/Library/ArmGicLib.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h
index 7bcfc001115b..b4c320be119b 100644
--- a/ArmPkg/Include/Library/ArmGicLib.h
+++ b/ArmPkg/Include/Library/ArmGicLib.h
@@ -1,13 +1,13 @@
 /** @file
 *
-*  Copyright (c) 2011-2018, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
 **/

-#ifndef __ARMGIC_H
-#define __ARMGIC_H
+#ifndef ARMGIC_H_
+#define ARMGIC_H_

 #include <Library/ArmGicArchLib.h>

@@ -333,4 +333,4 @@ ArmGicV3SetPriorityMask (
   IN UINTN                  Priority
   );

-#endif
+#endif // ARMGIC_H_
--
2.17.1

[PATCH v1 17/27] ArmPkg: Fix Ecc error 7008 for SCMI_CLOCK_RATE

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Complex types should be typedef-ed

The error is due to the a nested structure declaration.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c  | 12 ++++++++----
 ArmPkg/Include/Protocol/ArmScmiClockProtocol.h | 14 ++++++++++----
 2 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c b/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
index c66c414385dd..5c06e31bda22 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
@@ -255,22 +255,26 @@ ClockDescribeRates (
       for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {
         Rate = &DescribeRates->Rates[RateOffset++];
         // Non-linear discrete rates.
-        RateArray[RateIndex++].Rate = ConvertTo64Bit (Rate->Low, Rate->High);
+        RateArray[RateIndex++].DiscreteRate.Rate =
+          ConvertTo64Bit (Rate->Low, Rate->High);
       }
     } else {
       for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {
         // Linear clock rates from minimum to maximum in steps
         // Minimum clock rate.
         Rate = &DescribeRates->Rates[RateOffset++];
-        RateArray[RateIndex].Min = ConvertTo64Bit (Rate->Low, Rate->High);
+        RateArray[RateIndex].ContinuousRate.Min =
+          ConvertTo64Bit (Rate->Low, Rate->High);

         Rate = &DescribeRates->Rates[RateOffset++];
         // Maximum clock rate.
-        RateArray[RateIndex].Max = ConvertTo64Bit (Rate->Low, Rate->High);
+        RateArray[RateIndex].ContinuousRate.Max =
+          ConvertTo64Bit (Rate->Low, Rate->High);

         Rate = &DescribeRates->Rates[RateOffset++];
         // Step.
-        RateArray[RateIndex++].Step = ConvertTo64Bit (Rate->Low, Rate->High);
+        RateArray[RateIndex++].ContinuousRate.Step =
+          ConvertTo64Bit (Rate->Low, Rate->High);
       }
     }
   } while (NUM_REMAIN_RATES (DescribeRates->NumRatesFlags) != 0);
diff --git a/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h b/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
index b4d970dee3e2..85b5b8d1e764 100644
--- a/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
+++ b/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
@@ -1,6 +1,6 @@
 /** @file

-  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+  Copyright (c) 2017-2021, Arm Limited. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -57,12 +57,18 @@ typedef enum {
    either Rate or Min/Max/Step triplet is valid.
 */
 typedef struct {
-  union {
   UINT64 Min;
-  UINT64 Rate;
-  };
   UINT64 Max;
   UINT64 Step;
+} SCMI_CLOCK_RATE_CONTINUOUS;
+
+typedef struct {
+  UINT64 Rate;
+} SCMI_CLOCK_RATE_DISCRETE;
+
+typedef union {
+  SCMI_CLOCK_RATE_CONTINUOUS ContinuousRate;
+  SCMI_CLOCK_RATE_DISCRETE DiscreteRate;
 } SCMI_CLOCK_RATE;

 #pragma pack()
--
2.17.1

[PATCH v1 18/27] ArmPkg: Fix Ecc error 7008 for OPTEE_MESSAGE_PARAM

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Complex types should be typedef-ed

The error is due to the a nested structure declaration.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Include/Library/OpteeLib.h | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/ArmPkg/Include/Library/OpteeLib.h b/ArmPkg/Include/Library/OpteeLib.h
index d71636143373..8ceab117d132 100644
--- a/ArmPkg/Include/Library/OpteeLib.h
+++ b/ArmPkg/Include/Library/OpteeLib.h
@@ -2,6 +2,7 @@
   OP-TEE specific header file.

   Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
+  Copyright (c) 2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -45,12 +46,14 @@ typedef struct {
   UINT64    C;
 } OPTEE_MESSAGE_PARAM_VALUE;

+typedef union {
+  OPTEE_MESSAGE_PARAM_MEMORY   Memory;
+  OPTEE_MESSAGE_PARAM_VALUE    Value;
+} OPTEE_MESSAGE_PARAM_UNION;
+
 typedef struct {
   UINT64 Attribute;
-  union {
-    OPTEE_MESSAGE_PARAM_MEMORY   Memory;
-    OPTEE_MESSAGE_PARAM_VALUE    Value;
-  } Union;
+  OPTEE_MESSAGE_PARAM_UNION Union;
 } OPTEE_MESSAGE_PARAM;

 #define OPTEE_MAX_CALL_PARAMS       4
--
2.17.1

[PATCH v1 19/27] ArmPkg: Fix Ecc error 8005/8007 in ArmDisassemblerLib

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
8005:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

8007:
There should be no use of short (single character) variable names

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 .../ArmDisassemblerLib/ArmDisassembler.c      | 159 +++++++++---------
 .../ArmDisassemblerLib/ThumbDisassembler.c    | 158 ++++++++---------
 2 files changed, 163 insertions(+), 154 deletions(-)

diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
index e67e13a50ace..03a9f1fbe2e5 100644
--- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
+++ b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
@@ -71,7 +71,7 @@ CHAR8 *gLdmStack[] = {


 #define SIGN(_U)  ((_U) ? "" : "-")
-#define WRITE(_W) ((_W) ? "!" : "")
+#define WRITE(_Write) ((_Write) ? "!" : "")
 #define BYTE(_B)  ((_B) ? "B":"")
 #define USER(_B)  ((_B) ? "^" : "")

@@ -159,23 +159,24 @@ DisassembleArmInstruction (
   )
 {
   UINT32    OpCode;
-  CHAR8     *Type, *Root;
-  BOOLEAN   I, P, U, B, W, L, S, H;
+  CHAR8     *Type;
+  CHAR8     *Root;
+  BOOLEAN   Imm, Pre, Up, WriteBack, Write, Load, Sign, Half;
   UINT32    Rn, Rd, Rm;
-  UINT32    imode, offset_8, offset_12;
+  UINT32    IMod, Offset8, Offset12;
   UINT32    Index;
-  UINT32    shift_imm, shift;
+  UINT32    ShiftImm, Shift;

   OpCode = **OpCodePtr;

-  I = (OpCode & BIT25) == BIT25;
-  P = (OpCode & BIT24) == BIT24;
-  U = (OpCode & BIT23) == BIT23;
-  B = (OpCode & BIT22) == BIT22;  // Also called S
-  W = (OpCode & BIT21) == BIT21;
-  L = (OpCode & BIT20) == BIT20;
-  S = (OpCode & BIT6) == BIT6;
-  H = (OpCode & BIT5) == BIT5;
+  Imm = (OpCode & BIT25) == BIT25; // I
+  Pre = (OpCode & BIT24) == BIT24; // P
+  Up = (OpCode & BIT23) == BIT23; // U
+  WriteBack = (OpCode & BIT22) == BIT22; // B, also called S
+  Write = (OpCode & BIT21) == BIT21; // W
+  Load = (OpCode & BIT20) == BIT20; // L
+  Sign = (OpCode & BIT6) == BIT6; // S
+  Half = (OpCode & BIT5) == BIT5; // H
   Rn = (OpCode >> 16) & 0xf;
   Rd = (OpCode >> 12) & 0xf;
   Rm = (OpCode & 0xf);
@@ -189,7 +190,7 @@ DisassembleArmInstruction (

   // LDREX, STREX
   if ((OpCode  & 0x0fe000f0) == 0x01800090) {
-    if (L) {
+    if (Load) {
       // A4.1.27  LDREX{<cond>} <Rd>, [<Rn>]
       AsciiSPrint (Buf, Size, "LDREX%a %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn]);
     } else {
@@ -201,89 +202,89 @@ DisassembleArmInstruction (

   // LDM/STM
   if ((OpCode  & 0x0e000000) == 0x08000000) {
-    if (L) {
+    if (Load) {
       // A4.1.20 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers>
       // A4.1.21 LDM{<cond>}<addressing_mode> <Rn>, <registers_without_pc>^
       // A4.1.22 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers_and_pc>^
-      AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B));
+      AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
     } else {
       // A4.1.97 STM{<cond>}<addressing_mode> <Rn>{!}, <registers>
       // A4.1.98 STM{<cond>}<addressing_mode> <Rn>, <registers>^
-      AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B));
+      AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
     }
     return;
   }

   // LDR/STR Address Mode 2
   if ( ((OpCode  & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000 ) == 0xf550f000) ) {
-    offset_12 = OpCode & 0xfff;
+    Offset12 = OpCode & 0xfff;
     if ((OpCode & 0xfd70f000 ) == 0xf550f000) {
       Index = AsciiSPrint (Buf, Size, "PLD");
     } else {
-      Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", L ? "LDR" : "STR", COND (OpCode), BYTE (B), (!(P) && W) ? "T":"", gReg[Rd]);
+      Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T":"", gReg[Rd]);
     }
-    if (P) {
-      if (!I) {
+    if (Pre) {
+      if (!Imm) {
         // A5.2.2 [<Rn>, #+/-<offset_12>]
         // A5.2.5 [<Rn>, #+/-<offset_12>]
-        AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x]%a", gReg[Rn], SIGN (U), offset_12, WRITE (W));
+        AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x]%a", gReg[Rn], SIGN (Up), Offset12, WRITE (Write));
       } else if ((OpCode & 0x03000ff0) == 0x03000000) {
         // A5.2.3 [<Rn>, +/-<Rm>]
         // A5.2.6 [<Rn>, +/-<Rm>]!
-        AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a]%a", gReg[Rn], SIGN (U), WRITE (W));
+        AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a]%a", gReg[Rn], SIGN (Up), WRITE (Write));
       } else {
         // A5.2.4 [<Rn>, +/-<Rm>, LSL #<shift_imm>]
         // A5.2.7 [<Rn>, +/-<Rm>, LSL #<shift_imm>]!
-        shift_imm = (OpCode >> 7) & 0x1f;
-        shift = (OpCode >> 5) & 0x3;
-        if (shift == 0x0) {
+        ShiftImm = (OpCode >> 7) & 0x1f;
+        Shift = (OpCode >> 5) & 0x3;
+        if (Shift == 0x0) {
           Type = "LSL";
-        } else if (shift == 0x1) {
+        } else if (Shift == 0x1) {
           Type = "LSR";
-          if (shift_imm == 0) {
-            shift_imm = 32;
+          if (ShiftImm == 0) {
+            ShiftImm = 32;
           }
-        } else if (shift == 0x2) {
+        } else if (Shift == 0x2) {
           Type = "ASR";
-        } else if (shift_imm == 0) {
-          AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));
+        } else if (ShiftImm == 0) {
+          AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (Up), gReg[Rm], WRITE (Write));
           return;
         } else {
           Type = "ROR";
         }

-        AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm, WRITE (W));
+        AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm, WRITE (Write));
       }
-    } else {  // !P
-      if (!I) {
+    } else {  // !Pre
+      if (!Imm) {
         // A5.2.8  [<Rn>], #+/-<offset_12>
-        AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (U), offset_12);
+        AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (Up), Offset12);
       } else if ((OpCode & 0x03000ff0) == 0x03000000) {
         // A5.2.9  [<Rn>], +/-<Rm>
-        AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]);
+        AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);
       } else {
         // A5.2.10 [<Rn>], +/-<Rm>, LSL #<shift_imm>
-        shift_imm = (OpCode >> 7) & 0x1f;
-        shift = (OpCode >> 5) & 0x3;
+        ShiftImm = (OpCode >> 7) & 0x1f;
+        Shift = (OpCode >> 5) & 0x3;

-        if (shift == 0x0) {
+        if (Shift == 0x0) {
           Type = "LSL";
-        } else if (shift == 0x1) {
+        } else if (Shift == 0x1) {
           Type = "LSR";
-          if (shift_imm == 0) {
-            shift_imm = 32;
+          if (ShiftImm == 0) {
+            ShiftImm = 32;
           }
-        } else if (shift == 0x2) {
+        } else if (Shift == 0x2) {
           Type = "ASR";
-        } else if (shift_imm == 0) {
-          AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (U), gReg[Rm]);
+        } else if (ShiftImm == 0) {
+          AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (Up), gReg[Rm]);
           // FIx me
           return;
         } else {
           Type = "ROR";
         }

-        AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm);
+        AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm);
       }
     }
     return;
@@ -292,18 +293,18 @@ DisassembleArmInstruction (
   if ((OpCode  & 0x0e000000) == 0x00000000) {
     // LDR/STR address mode 3
     // LDR|STR{<cond>}H|SH|SB|D <Rd>, <addressing_mode>
-    if (L) {
-      if (!S) {
+    if (Load) {
+      if (!Sign) {
         Root = "LDR%aH %a, ";
-      } else if (!H) {
+      } else if (!Half) {
         Root = "LDR%aSB %a, ";
       } else {
         Root = "LDR%aSH %a, ";
       }
     } else {
-      if (!S) {
+      if (!Sign) {
         Root = "STR%aH %a ";
-      } else if (!H) {
+      } else if (!Half) {
         Root = "LDR%aD %a ";
       } else {
         Root = "STR%aD %a ";
@@ -312,28 +313,28 @@ DisassembleArmInstruction (

     Index = AsciiSPrint (Buf, Size, Root, COND (OpCode), gReg[Rd]);

-    S = (OpCode & BIT6) == BIT6;
-    H = (OpCode & BIT5) == BIT5;
-    offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff;
-    if (P & !W) {
+    Sign = (OpCode & BIT6) == BIT6;
+    Half = (OpCode & BIT5) == BIT5;
+    Offset8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff;
+    if (Pre & !Write) {
       // Immediate offset/index
-      if (B) {
+      if (WriteBack) {
         // A5.3.2  [<Rn>, #+/-<offset_8>]
         // A5.3.4  [<Rn>, #+/-<offset_8>]!
-        AsciiSPrint  (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (U), offset_8, WRITE (W));
+        AsciiSPrint  (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (Up), Offset8, WRITE (Write));
       } else {
         // A5.3.3  [<Rn>, +/-<Rm>]
         // A5.3.5  [<Rn>, +/-<Rm>]!
-        AsciiSPrint  (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));
+        AsciiSPrint  (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (Up), gReg[Rm], WRITE (Write));
       }
     } else {
       // Register offset/index
-      if (B) {
+      if (WriteBack) {
         // A5.3.6 [<Rn>], #+/-<offset_8>
-        AsciiSPrint  (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (U), offset_8);
+        AsciiSPrint  (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (Up), Offset8);
       } else {
         // A5.3.7 [<Rn>], +/-<Rm>
-        AsciiSPrint  (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]);
+        AsciiSPrint  (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);
       }
     }
     return;
@@ -342,19 +343,19 @@ DisassembleArmInstruction (
   if ((OpCode  & 0x0fb000f0) == 0x01000050) {
     // A4.1.108  SWP   SWP{<cond>}B <Rd>, <Rm>, [<Rn>]
     // A4.1.109  SWPB  SWP{<cond>}B <Rd>, <Rm>, [<Rn>]
-    AsciiSPrint (Buf, Size, "SWP%a%a %a, %a, [%a]", COND (OpCode), BYTE (B), gReg[Rd], gReg[Rm], gReg[Rn]);
+    AsciiSPrint (Buf, Size, "SWP%a%a %a, %a, [%a]", COND (OpCode), BYTE (WriteBack), gReg[Rd], gReg[Rm], gReg[Rn]);
     return;
   }

   if ((OpCode  & 0xfe5f0f00) == 0xf84d0500) {
     // A4.1.90 SRS SRS<addressing_mode> #<mode>{!}
-    AsciiSPrint (Buf, Size, "SRS%a #0x%x%a", gLdmStack[(OpCode >> 23) & 3], OpCode & 0x1f, WRITE (W));
+    AsciiSPrint (Buf, Size, "SRS%a #0x%x%a", gLdmStack[(OpCode >> 23) & 3], OpCode & 0x1f, WRITE (Write));
     return;
   }

   if ((OpCode  & 0xfe500f00) == 0xf8100500) {
     // A4.1.59 RFE<addressing_mode> <Rn>{!}
-    AsciiSPrint (Buf, Size, "RFE%a %a", gLdmStack[(OpCode >> 23) & 3], gReg[Rn], WRITE (W));
+    AsciiSPrint (Buf, Size, "RFE%a %a", gLdmStack[(OpCode >> 23) & 3], gReg[Rn], WRITE (Write));
     return;
   }

@@ -369,9 +370,9 @@ DisassembleArmInstruction (
     if (((OpCode >> 6) & 0x7) == 0) {
       AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f));
     } else {
-      imode = (OpCode >> 18) & 0x3;
+      IMod = (OpCode >> 18) & 0x3;
       Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a",
-                      (imode == 3) ? "ID":"IE",
+                      (IMod == 3) ? "ID":"IE",
                       ((OpCode & BIT8) != 0) ? "A":"",
                       ((OpCode & BIT7) != 0) ? "I":"",
                       ((OpCode & BIT6) != 0) ? "F":"");
@@ -390,19 +391,19 @@ DisassembleArmInstruction (

   if ((OpCode  & 0x0fb00000) == 0x01000000) {
     // A4.1.38 MRS{<cond>} <Rd>, CPSR  MRS{<cond>} <Rd>, SPSR
-    AsciiSPrint (Buf, Size, "MRS%a %a, %a", COND (OpCode), gReg[Rd], B ? "SPSR" : "CPSR");
+    AsciiSPrint (Buf, Size, "MRS%a %a, %a", COND (OpCode), gReg[Rd], WriteBack ? "SPSR" : "CPSR");
     return;
   }


   if ((OpCode  & 0x0db00000) == 0x01200000) {
     // A4.1.38 MSR{<cond>} CPSR_<fields>, #<immediate> MSR{<cond>} CPSR_<fields>, <Rm>
-    if (I) {
+    if (Imm) {
       // MSR{<cond>} CPSR_<fields>, #<immediate>
-      AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode),  B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2));
+      AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode),  WriteBack ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2));
     } else {
       // MSR{<cond>} CPSR_<fields>, <Rm>
-      AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), B ? "SPSR" : "CPSR", gReg[Rd]);
+      AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), WriteBack ? "SPSR" : "CPSR", gReg[Rd]);
     }
     return;
   }
@@ -416,35 +417,35 @@ DisassembleArmInstruction (
   if ((OpCode  & 0x0e000000) == 0x0c000000) {
     // A4.1.19 LDC and A4.1.96 SDC
     if ((OpCode & 0xf0000000) == 0xf0000000) {
-      Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", L ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);
+      Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", Load ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);
     } else {
-      Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ",  L ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);
+      Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ",  Load ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);
     }

-    if (!P) {
-      if (!W) {
+    if (!Pre) {
+      if (!Write) {
         // A5.5.5.5 [<Rn>], <option>
       AsciiSPrint (&Buf[Index], Size - Index, "[%a], {0x%x}", gReg[Rn], OpCode & 0xff);
       } else {
         // A.5.5.4  [<Rn>], #+/-<offset_8>*4
-      AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x*4", gReg[Rn], SIGN (U), OpCode & 0xff);
+      AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x*4", gReg[Rn], SIGN (Up), OpCode & 0xff);
       }
     } else {
       // A5.5.5.2 [<Rn>, #+/-<offset_8>*4 ]!
-      AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (U), OpCode & 0xff, WRITE (W));
+      AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (Up), OpCode & 0xff, WRITE (Write));
     }

   }

   if ((OpCode  & 0x0f000010) == 0x0e000010) {
     // A4.1.32 MRC2, MCR2
-    AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", L ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);
+    AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", Load ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);
     return;
   }

   if ((OpCode  & 0x0ff00000) == 0x0c400000) {
     // A4.1.33 MRRC2, MCRR2
-    AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", L ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);
+    AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", Load ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);
     return;
   }

diff --git a/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c
index b665132d69bf..3129ec6b9270 100644
--- a/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c
+++ b/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c
@@ -9,6 +9,7 @@
   try to reuse existing case entries if possible.

   Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+  Copyright (c) 2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -451,7 +452,7 @@ SignExtend32 (
 // in the instruction address and you get back the aligned answer
 //
 UINT32
-PCAlign4 (
+PcAlign4 (
   IN  UINT32  Data
   )
 {
@@ -486,12 +487,19 @@ DisassembleThumbInstruction (
   UINT32  Index;
   UINT32  Offset;
   UINT16  Rd, Rn, Rm, Rt, Rt2;
-  BOOLEAN H1, H2, imod;
+  BOOLEAN H1Bit; // H1
+  BOOLEAN H2Bit; // H2
+  BOOLEAN IMod;  // imod
   //BOOLEAN ItFlag;
-  UINT32  PC, Target, msbit, lsbit;
+  UINT32  Pc, Target, MsBit, LsBit;
   CHAR8   *Cond;
-  BOOLEAN S, J1, J2, P, U, W;
-  UINT32  coproc, opc1, opc2, CRd, CRn, CRm;
+  BOOLEAN Sign;      // S
+  BOOLEAN J1Bit;     // J1
+  BOOLEAN J2Bit;     // J2
+  BOOLEAN Pre;       // P
+  BOOLEAN UAdd;      // U
+  BOOLEAN WriteBack; // W
+  UINT32  Coproc, Opc1, Opc2, CRd, CRn, CRm;
   UINT32  Mask;

   OpCodePtr = *OpCodePtrPtr;
@@ -504,10 +512,10 @@ DisassembleThumbInstruction (
   Rd = OpCode & 0x7;
   Rn = (OpCode >> 3) & 0x7;
   Rm = (OpCode >> 6) & 0x7;
-  H1 = (OpCode & BIT7) != 0;
-  H2 = (OpCode & BIT6) != 0;
-  imod = (OpCode & BIT4) != 0;
-  PC = (UINT32)(UINTN)OpCodePtr;
+  H1Bit = (OpCode & BIT7) != 0;
+  H2Bit = (OpCode & BIT6) != 0;
+  IMod = (OpCode & BIT4) != 0;
+  Pc = (UINT32)(UINTN)OpCodePtr;

   // Increment by the minimum instruction size, Thumb2 could be bigger
   *OpCodePtrPtr += 1;
@@ -548,7 +556,7 @@ DisassembleThumbInstruction (
       case LOAD_STORE_FORMAT3:
         // A6.5.1 <Rd>, [PC, #<8_bit_offset>]
         Target = (OpCode & 0xff) << 2;
-        AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [pc, #0x%x] ;0x%08x", (OpCode >> 8) & 7, Target, PCAlign4 (PC) + Target);
+        AsciiSPrint (&Buf[Offset], Size - Offset, " r%d, [pc, #0x%x] ;0x%08x", (OpCode >> 8) & 7, Target, PcAlign4 (Pc) + Target);
         return;
       case LOAD_STORE_FORMAT4:
         // Rt, [SP, #imm8]
@@ -583,16 +591,16 @@ DisassembleThumbInstruction (
         Cond = gCondition[(OpCode >> 8) & 0xf];
         Buf[Offset-5] = *Cond++;
         Buf[Offset-4] = *Cond;
-        AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%04x",  PC + 4 + SignExtend32 ((OpCode & 0xff) << 1, BIT8));
+        AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%04x",  Pc + 4 + SignExtend32 ((OpCode & 0xff) << 1, BIT8));
         return;
       case UNCONDITIONAL_BRANCH_SHORT:
         // A6.3.2 B  <target_address>
-        AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%04x", PC + 4 + SignExtend32 ((OpCode & 0x3ff) << 1, BIT11));
+        AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%04x", Pc + 4 + SignExtend32 ((OpCode & 0x3ff) << 1, BIT11));
         return;

       case BRANCH_EXCHANGE:
         // A6.3.3 BX|BLX <Rm>
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gReg[Rn | (H2 ? 8:0)]);
+        AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gReg[Rn | (H2Bit ? 8:0)]);
         return;

       case DATA_FORMAT1:
@@ -629,12 +637,12 @@ DisassembleThumbInstruction (
         return;
       case DATA_FORMAT8:
         // A6.4.3  <Rd>|<Rn>, <Rm>
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rd | (H1 ? 8:0)], gReg[Rn | (H2 ? 8:0)]);
+        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rd | (H1Bit ? 8:0)], gReg[Rn | (H2Bit ? 8:0)]);
         return;

       case CPS_FORMAT:
         // A7.1.24
-        AsciiSPrint (&Buf[Offset], Size - Offset, "%a %a%a%a", imod ? "ID":"IE", ((OpCode & BIT2) == 0) ? "":"a",  ((OpCode & BIT1) == 0) ? "":"i", ((OpCode & BIT0) == 0) ? "":"f");
+        AsciiSPrint (&Buf[Offset], Size - Offset, "%a %a%a%a", IMod ? "ID":"IE", ((OpCode & BIT2) == 0) ? "":"a",  ((OpCode & BIT1) == 0) ? "":"i", ((OpCode & BIT0) == 0) ? "":"f");
         return;

       case ENDIAN_FORMAT:
@@ -645,13 +653,13 @@ DisassembleThumbInstruction (
       case DATA_CBZ:
         // CB{N}Z <Rn>, <Lable>
         Target = ((OpCode >> 2) & 0x3e) | (((OpCode & BIT9) == BIT9) ? BIT6 : 0);
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %08x", gReg[Rd], PC + 4 + Target);
+        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %08x", gReg[Rd], Pc + 4 + Target);
         return;

       case ADR_FORMAT:
         // ADR <Rd>, <Label>
         Target = (OpCode & 0xff) << 2;
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %08x", gReg[(OpCode >> 8) & 7], PCAlign4 (PC) + Target);
+        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %08x", gReg[(OpCode >> 8) & 7], PcAlign4 (Pc) + Target);
         return;

       case IT_BLOCK:
@@ -708,32 +716,32 @@ DisassembleThumbInstruction (
         Target |= ((OpCode32 & BIT13) == BIT13)? BIT18 : 0;  // J1
         Target |= ((OpCode32 & BIT26) == BIT26)? BIT20 : 0;  // S
         Target = SignExtend32 (Target, BIT20);
-        AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PC + 4 + Target);
+        AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", Pc + 4 + Target);
         return;
       case B_T4:
         // S:I1:I2:imm10:imm11:0
         Target = ((OpCode32 << 1) & 0xffe) + ((OpCode32 >> 4) & 0x3ff000);
-        S  = (OpCode32 & BIT26) == BIT26;
-        J1 = (OpCode32 & BIT13) == BIT13;
-        J2 = (OpCode32 & BIT11) == BIT11;
-        Target |= (!(J2 ^ S) ? BIT22 : 0);  // I2
-        Target |= (!(J1 ^ S) ? BIT23 : 0);  // I1
-        Target |= (S ? BIT24 : 0);  // S
+        Sign  = (OpCode32 & BIT26) == BIT26;
+        J1Bit = (OpCode32 & BIT13) == BIT13;
+        J2Bit = (OpCode32 & BIT11) == BIT11;
+        Target |= (!(J2Bit ^ Sign) ? BIT22 : 0);  // I2
+        Target |= (!(J1Bit ^ Sign) ? BIT23 : 0);  // I1
+        Target |= (Sign ? BIT24 : 0);  // S
         Target = SignExtend32 (Target, BIT24);
-        AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PC + 4 + Target);
+        AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", Pc + 4 + Target);
         return;

       case BL_T2:
         // BLX  S:I1:I2:imm10:imm11:0
         Target = ((OpCode32 << 1) & 0xffc) + ((OpCode32 >> 4) & 0x3ff000);
-        S  = (OpCode32 & BIT26) == BIT26;
-        J1 = (OpCode32 & BIT13) == BIT13;
-        J2 = (OpCode32 & BIT11) == BIT11;
-        Target |= (!(J2 ^ S) ? BIT23 : 0);  // I2
-        Target |= (!(J1 ^ S) ? BIT24 : 0);  // I1
-        Target |= (S ? BIT25 : 0);  // S
+        Sign  = (OpCode32 & BIT26) == BIT26;
+        J1Bit = (OpCode32 & BIT13) == BIT13;
+        J2Bit = (OpCode32 & BIT11) == BIT11;
+        Target |= (!(J2Bit ^ Sign) ? BIT23 : 0);  // I2
+        Target |= (!(J1Bit ^ Sign) ? BIT24 : 0);  // I1
+        Target |= (Sign ? BIT25 : 0);  // S
         Target = SignExtend32 (Target, BIT25);
-        AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PCAlign4 (PC) + Target);
+        AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PcAlign4 (Pc) + Target);
         return;

       case POP_T2:
@@ -748,8 +756,8 @@ DisassembleThumbInstruction (

       case STM_FORMAT:
         // <Rn>{!}, <registers>
-        W = (OpCode32 & BIT21) == BIT21;
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, %a", gReg[(OpCode32 >> 16) & 0xf], W ? "!":"", ThumbMRegList (OpCode32 & 0xffff));
+        WriteBack = (OpCode32 & BIT21) == BIT21;
+        AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, %a", gReg[(OpCode32 >> 16) & 0xf], WriteBack ? "!":"", ThumbMRegList (OpCode32 & 0xffff));
         return;

       case LDM_REG_IMM12_SIGNED:
@@ -759,7 +767,7 @@ DisassembleThumbInstruction (
           // U == 0 means subtrack, U == 1 means add
           Target = -Target;
         }
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[(OpCode32 >> 12) & 0xf], PCAlign4 (PC) + Target);
+        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[(OpCode32 >> 12) & 0xf], PcAlign4 (Pc) + Target);
         return;

       case LDM_REG_INDIRECT_LSL:
@@ -784,36 +792,36 @@ DisassembleThumbInstruction (

       case LDM_REG_IMM8:
         // <rt>, [<rn>, {, #<imm8>}]{!}
-        W = (OpCode32 & BIT8) == BIT8;
-        U = (OpCode32 & BIT9) == BIT9;
-        P = (OpCode32 & BIT10) == BIT10;
+        WriteBack = (OpCode32 & BIT8) == BIT8;
+        UAdd = (OpCode32 & BIT9) == BIT9;
+        Pre = (OpCode32 & BIT10) == BIT10;
         Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a", gReg[Rt], gReg[Rn]);
-        if (P) {
+        if (Pre) {
           if ((OpCode32 & 0xff) == 0) {
-            AsciiSPrint (&Buf[Offset], Size - Offset, "]%a", W?"!":"");
+            AsciiSPrint (&Buf[Offset], Size - Offset, "]%a", WriteBack?"!":"");
           } else {
-            AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", U?"":"-" , OpCode32 & 0xff, W?"!":"");
+            AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", UAdd?"":"-" , OpCode32 & 0xff, WriteBack?"!":"");
           }
         } else {
-          AsciiSPrint (&Buf[Offset], Size - Offset, "], #%a0x%x", U?"":"-", OpCode32 & 0xff);
+          AsciiSPrint (&Buf[Offset], Size - Offset, "], #%a0x%x", UAdd?"":"-", OpCode32 & 0xff);
         }
         return;

       case LDRD_REG_IMM8_SIGNED:
         // LDRD <rt>, <rt2>, [<rn>, {, #<imm8>]}{!}
-        P = (OpCode32 & BIT24) == BIT24;  // index = P
-        U = (OpCode32 & BIT23) == BIT23;
-        W = (OpCode32 & BIT21) == BIT21;
+        Pre = (OpCode32 & BIT24) == BIT24;  // index = P
+        UAdd = (OpCode32 & BIT23) == BIT23;
+        WriteBack = (OpCode32 & BIT21) == BIT21;
         Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, [%a", gReg[Rt], gReg[Rt2], gReg[Rn]);
-        if (P) {
+        if (Pre) {
           if ((OpCode32 & 0xff) == 0) {
             AsciiSPrint (&Buf[Offset], Size - Offset, "]");
           } else {
-            AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", U?"":"-", (OpCode32 & 0xff) << 2, W?"!":"");
+            AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", UAdd?"":"-", (OpCode32 & 0xff) << 2, WriteBack?"!":"");
           }
         } else {
           if ((OpCode32 & 0xff) != 0) {
-            AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x", U?"":"-", (OpCode32 & 0xff) << 2);
+            AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x", UAdd?"":"-", (OpCode32 & 0xff) << 2);
           }
         }
         return;
@@ -825,7 +833,7 @@ DisassembleThumbInstruction (
           // U == 0 means subtrack, U == 1 means add
           Target = -Target;
         }
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rt], gReg[Rt2], PC + 4 + Target);
+        AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rt], gReg[Rt2], Pc + 4 + Target);
         return;

       case LDREXB:
@@ -840,14 +848,14 @@ DisassembleThumbInstruction (

       case SRS_FORMAT:
         // SP{!}, #<mode>
-        W = (OpCode32 & BIT21) == BIT21;
-        AsciiSPrint (&Buf[Offset], Size - Offset, " SP%a, #0x%x", W?"!":"", OpCode32 & 0x1f);
+        WriteBack = (OpCode32 & BIT21) == BIT21;
+        AsciiSPrint (&Buf[Offset], Size - Offset, " SP%a, #0x%x", WriteBack?"!":"", OpCode32 & 0x1f);
         return;

       case RFE_FORMAT:
         // <Rn>{!}
-        W = (OpCode32 & BIT21) == BIT21;
-        AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, #0x%x", gReg[Rn], W?"!":"");
+        WriteBack = (OpCode32 & BIT21) == BIT21;
+        AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, #0x%x", gReg[Rn], WriteBack?"!":"");
         return;

       case ADD_IMM12:
@@ -917,9 +925,9 @@ DisassembleThumbInstruction (
         // ADDR <Rd>, <label>
         Target = (OpCode32 & 0xff) | ((OpCode32 >> 8) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
         if ((OpCode & (BIT23 | BIT21)) == (BIT23 | BIT21)) {
-          Target = PCAlign4 (PC) - Target;
+          Target = PcAlign4 (Pc) - Target;
         } else {
-          Target = PCAlign4 (PC) + Target;
+          Target = PcAlign4 (Pc) + Target;
         }
         AsciiSPrint (&Buf[Offset], Size - Offset, " %a, 0x%08x", gReg[Rd], Target);
         return;
@@ -932,52 +940,52 @@ DisassembleThumbInstruction (

       case BFC_THUMB2:
         // BFI <Rd>, <Rn>, #<lsb>, #<width>
-        msbit = OpCode32 & 0x1f;
-        lsbit = ((OpCode32 >> 6) & 3) | ((OpCode >> 10) &  0x1c);
+        MsBit = OpCode32 & 0x1f;
+        LsBit = ((OpCode32 >> 6) & 3) | ((OpCode >> 10) &  0x1c);
         if ((Rn == 0xf) & (AsciiStrCmp (gOpThumb2[Index].Start, "BFC") == 0)){
           // BFC <Rd>, #<lsb>, #<width>
-          AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #%d, #%d", gReg[Rd], lsbit, msbit - lsbit + 1);
+          AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #%d, #%d", gReg[Rd], LsBit, MsBit - LsBit + 1);
         } else if (AsciiStrCmp (gOpThumb2[Index].Start, "BFI") == 0) {
-          AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], lsbit, msbit - lsbit + 1);
+          AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], LsBit, MsBit - LsBit + 1);
         } else {
-          AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], lsbit, msbit + 1);
+          AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], LsBit, MsBit + 1);
         }
         return;

       case CPD_THUMB2:
         // <coproc>,<opc1>,<CRd>,<CRn>,<CRm>,<opc2>
-        coproc = (OpCode32 >> 8)  & 0xf;
-        opc1   = (OpCode32 >> 20) & 0xf;
-        opc2   = (OpCode32 >> 5)  & 0x7;
+        Coproc = (OpCode32 >> 8)  & 0xf;
+        Opc1   = (OpCode32 >> 20) & 0xf;
+        Opc2   = (OpCode32 >> 5)  & 0x7;
         CRd    = (OpCode32 >> 12) & 0xf;
         CRn    = (OpCode32 >> 16) & 0xf;
         CRm    = OpCode32 & 0xf;
-        Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,c%d,c%d,c%d", coproc, opc1, CRd, CRn, CRm);
-        if (opc2 != 0) {
-          AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", opc2);
+        Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,c%d,c%d,c%d", Coproc, Opc1, CRd, CRn, CRm);
+        if (Opc2 != 0) {
+          AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", Opc2);
         }
         return;

       case MRC_THUMB2:
         // MRC  <coproc>,<opc1>,<Rt>,<CRn>,<CRm>,<opc2>
-        coproc = (OpCode32 >> 8)  & 0xf;
-        opc1   = (OpCode32 >> 20) & 0xf;
-        opc2   = (OpCode32 >> 5)  & 0x7;
+        Coproc = (OpCode32 >> 8)  & 0xf;
+        Opc1   = (OpCode32 >> 20) & 0xf;
+        Opc2   = (OpCode32 >> 5)  & 0x7;
         CRn    = (OpCode32 >> 16) & 0xf;
         CRm    = OpCode32 & 0xf;
-        Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,%a,c%d,c%d", coproc, opc1, gReg[Rt], CRn, CRm);
-        if (opc2 != 0) {
-          AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", opc2);
+        Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,%a,c%d,c%d", Coproc, Opc1, gReg[Rt], CRn, CRm);
+        if (Opc2 != 0) {
+          AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", Opc2);
         }
         return;

       case MRRC_THUMB2:
         // MRC  <coproc>,<opc1>,<Rt>,<Rt2>,<CRm>,<opc2>
-        coproc = (OpCode32 >> 8)  & 0xf;
-        opc1   = (OpCode32 >> 20) & 0xf;
+        Coproc = (OpCode32 >> 8)  & 0xf;
+        Opc1   = (OpCode32 >> 20) & 0xf;
         CRn    = (OpCode32 >> 16) & 0xf;
         CRm    = OpCode32 & 0xf;
-        Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,%a,%a,c%d", coproc, opc1, gReg[Rt], gReg[Rt2], CRm);
+        Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " p%d,#%d,%a,%a,c%d", Coproc, Opc1, gReg[Rt], gReg[Rt2], CRm);
         return;

       case THUMB2_2REGS:
--
2.17.1

[PATCH v1 20/27] ArmPkg: Fix Ecc error 8005 for SCMI_PROTOCOL_ID

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c   | 12 ++++++------
 ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c  | 14 +++++++-------
 ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c            | 10 +++++-----
 .../ArmScmiDxe/ScmiPerformanceProtocol.c       | 18 +++++++++---------
 ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h        | 14 +++++++-------
 5 files changed, 34 insertions(+), 34 deletions(-)

diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c b/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c
index d89587f9edf3..c84ce97f15ac 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c
@@ -1,6 +1,6 @@
 /** @file

-  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+  Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -34,7 +34,7 @@ BaseGetVersion (
   OUT UINT32              *Version
   )
 {
-  return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_BASE, Version);
+  return ScmiGetProtocolVersion (ScmiProtocolIdBase, Version);
 }

 /** Return total number of SCMI protocols supported by the SCP firmware.
@@ -57,7 +57,7 @@ BaseGetTotalProtocols (
   EFI_STATUS  Status;
   UINT32      *ReturnValues;

-  Status = ScmiGetProtocolAttributes (SCMI_PROTOCOL_ID_BASE, &ReturnValues);
+  Status = ScmiGetProtocolAttributes (ScmiProtocolIdBase, &ReturnValues);
   if (EFI_ERROR (Status)) {
     return Status;
   }
@@ -91,7 +91,7 @@ BaseDiscoverVendorDetails (
   SCMI_COMMAND  Cmd;
   UINT32        PayloadLength;

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
+  Cmd.ProtocolId = ScmiProtocolIdBase;
   Cmd.MessageId  = MessageId;

   PayloadLength = 0;
@@ -183,7 +183,7 @@ BaseDiscoverImplVersion (
   SCMI_COMMAND  Cmd;
   UINT32        PayloadLength;

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
+  Cmd.ProtocolId = ScmiProtocolIdBase;
   Cmd.MessageId  = SCMI_MESSAGE_ID_BASE_DISCOVER_IMPLEMENTATION_VERSION;

   PayloadLength = 0;
@@ -250,7 +250,7 @@ BaseDiscoverListProtocols (
     return EFI_BUFFER_TOO_SMALL;
   }

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
+  Cmd.ProtocolId = ScmiProtocolIdBase;
   Cmd.MessageId  = SCMI_MESSAGE_ID_BASE_DISCOVER_LIST_PROTOCOLS;

   Skip = 0;
diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c b/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
index 5c06e31bda22..b7892bfd7771 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
@@ -52,7 +52,7 @@ ClockGetVersion (
   OUT UINT32               *Version
   )
 {
-  return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_CLOCK, Version);
+  return ScmiGetProtocolVersion (ScmiProtocolIdClock, Version);
 }

 /** Return total number of clock devices supported by the clock management
@@ -76,7 +76,7 @@ ClockGetTotalClocks (
   EFI_STATUS  Status;
   UINT32     *ReturnValues;

-  Status = ScmiGetProtocolAttributes (SCMI_PROTOCOL_ID_CLOCK, &ReturnValues);
+  Status = ScmiGetProtocolAttributes (ScmiProtocolIdClock, &ReturnValues);
   if (EFI_ERROR (Status)) {
     return Status;
   }
@@ -122,7 +122,7 @@ ClockGetClockAttributes (

   *MessageParams = ClockId;

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
+  Cmd.ProtocolId = ScmiProtocolIdClock;
   Cmd.MessageId  = SCMI_MESSAGE_ID_CLOCK_ATTRIBUTES;

   PayloadLength = sizeof (ClockId);
@@ -203,7 +203,7 @@ ClockDescribeRates (
     return Status;
   }

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
+  Cmd.ProtocolId = ScmiProtocolIdClock;
   Cmd.MessageId  = SCMI_MESSAGE_ID_CLOCK_DESCRIBE_RATES;

   *MessageParams++  = ClockId;
@@ -320,7 +320,7 @@ ClockRateGet (
   // Fill arguments for clock protocol command.
   *MessageParams  = ClockId;

-  Cmd.ProtocolId  = SCMI_PROTOCOL_ID_CLOCK;
+  Cmd.ProtocolId  = ScmiProtocolIdClock;
   Cmd.MessageId   = SCMI_MESSAGE_ID_CLOCK_RATE_GET;

   PayloadLength = sizeof (ClockId);
@@ -374,7 +374,7 @@ ClockRateSet (
   ClockRateSetAttributes->Rate.Low   = (UINT32)Rate;
   ClockRateSetAttributes->Rate.High  = (UINT32)(Rate >> 32);

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
+  Cmd.ProtocolId = ScmiProtocolIdClock;
   Cmd.MessageId  = SCMI_MESSAGE_ID_CLOCK_RATE_SET;

   PayloadLength = sizeof (CLOCK_RATE_SET_ATTRIBUTES);
@@ -421,7 +421,7 @@ ClockEnable (
   ClockConfigSetAttributes->ClockId    = ClockId;
   ClockConfigSetAttributes->Attributes = Enable ? BIT0 : 0;

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
+  Cmd.ProtocolId = ScmiProtocolIdClock;
   Cmd.MessageId  = SCMI_MESSAGE_ID_CLOCK_CONFIG_SET;

   PayloadLength = sizeof (CLOCK_CONFIG_SET_ATTRIBUTES);
diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c b/ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c
index e95f56e670ed..d5890a7633a2 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c
@@ -1,6 +1,6 @@
 /** @file

-  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+  Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -24,9 +24,9 @@
 #include "ScmiPrivate.h"

 STATIC CONST SCMI_PROTOCOL_ENTRY Protocols[] = {
-  { SCMI_PROTOCOL_ID_BASE, ScmiBaseProtocolInit },
-  { SCMI_PROTOCOL_ID_PERFORMANCE, ScmiPerformanceProtocolInit },
-  { SCMI_PROTOCOL_ID_CLOCK, ScmiClockProtocolInit }
+  { ScmiProtocolIdBase, ScmiBaseProtocolInit },
+  { ScmiProtocolIdPerformance, ScmiPerformanceProtocolInit },
+  { ScmiProtocolIdClock, ScmiClockProtocolInit }
 };

 /** ARM SCMI driver entry point function.
@@ -61,7 +61,7 @@ ArmScmiDxeEntryPoint (
   UINT32              SupportedListSize;

   // Every SCMI implementation must implement the base protocol.
-  ASSERT (Protocols[0].Id == SCMI_PROTOCOL_ID_BASE);
+  ASSERT (Protocols[0].Id == ScmiProtocolIdBase);

   Status = ScmiBaseProtocolInit (&ImageHandle);
   if (EFI_ERROR (Status)) {
diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c b/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c
index 712f95d6ea40..51cad4d2c602 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c
@@ -1,6 +1,6 @@
 /** @file

-  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+  Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -35,7 +35,7 @@ PerformanceGetVersion (
   OUT UINT32                     *Version
   )
 {
-  return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_PERFORMANCE, Version);
+  return ScmiGetProtocolVersion (ScmiProtocolIdPerformance, Version);
 }

 /** Return protocol attributes of the performance management protocol.
@@ -59,7 +59,7 @@ PerformanceGetAttributes (
   UINT32* ReturnValues;

   Status = ScmiGetProtocolAttributes (
-             SCMI_PROTOCOL_ID_PERFORMANCE,
+             ScmiProtocolIdPerformance,
              &ReturnValues
              );
   if (EFI_ERROR (Status)) {
@@ -107,7 +107,7 @@ PerformanceDomainAttributes (

   *MessageParams = DomainId;

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+  Cmd.ProtocolId = ScmiProtocolIdPerformance;
   Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_DOMAIN_ATTRIBUTES;

   PayloadLength = sizeof (DomainId);
@@ -179,7 +179,7 @@ PerformanceDescribeLevels (

   *MessageParams++ = DomainId;

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+  Cmd.ProtocolId = ScmiProtocolIdPerformance;
   Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS;

   do {
@@ -258,7 +258,7 @@ PerformanceLimitsSet (
   *MessageParams++ = Limits->RangeMax;
   *MessageParams   = Limits->RangeMin;

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+  Cmd.ProtocolId = ScmiProtocolIdPerformance;
   Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_SET;

   PayloadLength = sizeof (DomainId) + sizeof (SCMI_PERFORMANCE_LIMITS);
@@ -304,7 +304,7 @@ PerformanceLimitsGet (

   *MessageParams = DomainId;

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+  Cmd.ProtocolId = ScmiProtocolIdPerformance;
   Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_GET;

   PayloadLength = sizeof (DomainId);
@@ -354,7 +354,7 @@ PerformanceLevelSet (
   *MessageParams++ = DomainId;
   *MessageParams   = Level;

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+  Cmd.ProtocolId = ScmiProtocolIdPerformance;
   Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_SET;

   PayloadLength = sizeof (DomainId) + sizeof (Level);
@@ -399,7 +399,7 @@ PerformanceLevelGet (

   *MessageParams = DomainId;

-  Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
+  Cmd.ProtocolId = ScmiProtocolIdPerformance;
   Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_GET;

   PayloadLength = sizeof (DomainId);
diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h b/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
index 7763c848aedc..5f1225f54cd9 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
@@ -1,6 +1,6 @@
 /** @file

-  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+  Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -13,12 +13,12 @@

 // SCMI protocol IDs.
 typedef enum {
-  SCMI_PROTOCOL_ID_BASE         = 0x10,
-  SCMI_PROTOCOL_ID_POWER_DOMAIN = 0x11,
-  SCMI_PROTOCOL_ID_SYSTEM_POWER = 0x12,
-  SCMI_PROTOCOL_ID_PERFORMANCE  = 0x13,
-  SCMI_PROTOCOL_ID_CLOCK        = 0x14,
-  SCMI_PROTOCOL_ID_SENSOR       = 0x15
+  ScmiProtocolIdBase        = 0x10,
+  ScmiProtocolIdPowerDomain = 0x11,
+  ScmiProtocolIdSystemPower = 0x12,
+  ScmiProtocolIdPerformance = 0x13,
+  ScmiProtocolIdClock       = 0x14,
+  ScmiProtocolIdSensor      = 0x15
 } SCMI_PROTOCOL_ID;

 // SCMI message types.
--
2.17.1

[PATCH v1 21/27] ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_TYPE

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/ArmScmiDxe/Scmi.c        | 2 +-
 ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/ArmPkg/Drivers/ArmScmiDxe/Scmi.c b/ArmPkg/Drivers/ArmScmiDxe/Scmi.c
index 847868a7749e..25f6cc3371af 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/Scmi.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/Scmi.c
@@ -95,7 +95,7 @@ ScmiCommandExecute (
   // Fill in message header.
   MessageHeader = SCMI_MESSAGE_HEADER (
                     Command->MessageId,
-                    SCMI_MESSAGE_TYPE_COMMAND,
+                    ScmiMessageTypeCommand,
                     Command->ProtocolId
                     );

diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h b/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
index 5f1225f54cd9..6de57a5c9514 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
@@ -23,9 +23,9 @@ typedef enum {

 // SCMI message types.
 typedef enum {
-  SCMI_MESSAGE_TYPE_COMMAND          = 0,
-  SCMI_MESSAGE_TYPE_DELAYED_RESPONSE = 2, // Skipping 1 is deliberate.
-  SCMI_MESSAGE_TYPE_NOTIFICATION     = 3
+  ScmiMessageTypeCommand         = 0,
+  ScmiMessageTypeDelayedResponse = 2, // Skipping 1 is deliberate.
+  ScmiMessageTypeNotification    = 3
 } SCMI_MESSAGE_TYPE;

 // SCMI response error codes.
--
2.17.1

[PATCH v1 22/27] ArmPkg: Fix Ecc error 8005 for SCMI_STATUS

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/ArmScmiDxe/Scmi.c        |  2 +-
 ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h | 22 +++++++++++-----------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/ArmPkg/Drivers/ArmScmiDxe/Scmi.c b/ArmPkg/Drivers/ArmScmiDxe/Scmi.c
index 25f6cc3371af..a1bf1b95c052 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/Scmi.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/Scmi.c
@@ -123,7 +123,7 @@ ScmiCommandExecute (

   Response = (SCMI_MESSAGE_RESPONSE*)MtlGetChannelPayload (Channel);

-  if (Response->Status != SCMI_SUCCESS) {
+  if (Response->Status != ScmiSuccess) {
     DEBUG ((DEBUG_ERROR, "SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
       Command->ProtocolId,
       Command->MessageId,
diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h b/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
index 6de57a5c9514..118961dbe219 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
@@ -30,17 +30,17 @@ typedef enum {

 // SCMI response error codes.
 typedef enum {
-  SCMI_SUCCESS            =  0,
-  SCMI_NOT_SUPPORTED      = -1,
-  SCMI_INVALID_PARAMETERS = -2,
-  SCMI_DENIED             = -3,
-  SCMI_NOT_FOUND          = -4,
-  SCMI_OUT_OF_RANGE       = -5,
-  SCMI_BUSY               = -6,
-  SCMI_COMMS_ERROR        = -7,
-  SCMI_GENERIC_ERROR      = -8,
-  SCMI_HARDWARE_ERROR     = -9,
-  SCMI_PROTOCOL_ERROR     = -10
+  ScmiSuccess           =  0,
+  ScmiNotSupported      = -1,
+  ScmiInvalidParameters = -2,
+  ScmiDenied            = -3,
+  ScmiNotFound          = -4,
+  ScmiOutOfRange        = -5,
+  ScmiBusy              = -6,
+  ScmiCommsError        = -7,
+  ScmiGenericError      = -8,
+  ScmiHardwareError     = -9,
+  ScmiProtocolError     = -10
 } SCMI_STATUS;

 // SCMI message IDs common to all protocols.
--
2.17.1

[PATCH v1 23/27] ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/ArmScmiDxe/Scmi.c        | 6 +++---
 ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/ArmPkg/Drivers/ArmScmiDxe/Scmi.c b/ArmPkg/Drivers/ArmScmiDxe/Scmi.c
index a1bf1b95c052..3793c0663666 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/Scmi.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/Scmi.c
@@ -195,7 +195,7 @@ ScmiGetProtocolVersion (

   Status = ScmiProtocolDiscoveryCommon (
              ProtocolId,
-             SCMI_MESSAGE_ID_PROTOCOL_VERSION,
+             ScmiMessageIdProtocolVersion,
              (UINT32**)&ProtocolVersion
              );
   if (EFI_ERROR (Status)) {
@@ -224,7 +224,7 @@ ScmiGetProtocolAttributes (
 {
   return ScmiProtocolDiscoveryCommon (
            ProtocolId,
-           SCMI_MESSAGE_ID_PROTOCOL_ATTRIBUTES,
+           ScmiMessageIdProtocolAttributes,
            ReturnValues
            );
 }
@@ -246,7 +246,7 @@ ScmiGetProtocolMessageAttributes (
 {
   return ScmiProtocolDiscoveryCommon (
            ProtocolId,
-           SCMI_MESSAGE_ID_PROTOCOL_MESSAGE_ATTRIBUTES,
+           ScmiMessageIdProtocolMessageAttributes,
            ReturnValues
            );
 }
diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h b/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
index 118961dbe219..e56c9e0dc342 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
@@ -45,9 +45,9 @@ typedef enum {

 // SCMI message IDs common to all protocols.
 typedef enum {
-  SCMI_MESSAGE_ID_PROTOCOL_VERSION            = 0x0,
-  SCMI_MESSAGE_ID_PROTOCOL_ATTRIBUTES         = 0x1,
-  SCMI_MESSAGE_ID_PROTOCOL_MESSAGE_ATTRIBUTES = 0x2
+  ScmiMessageIdProtocolVersion           = 0x0,
+  ScmiMessageIdProtocolAttributes        = 0x1,
+  ScmiMessageIdProtocolMessageAttributes = 0x2
 } SCMI_MESSAGE_ID;

 // Not defined in SCMI specification but will help to identify a message.
--
2.17.1

[PATCH v1 24/27] ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_BASE

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h b/ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h
index 2f93ec92325e..73ad3e32a2f5 100644
--- a/ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h
+++ b/ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h
@@ -1,6 +1,6 @@
 /** @file

-  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+  Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -158,10 +158,10 @@ typedef struct _SCMI_BASE_PROTOCOL {

 // SCMI Message IDs for Base protocol.
 typedef enum {
-  SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR                  = 0x3,
-  SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR              = 0x4,
-  SCMI_MESSAGE_ID_BASE_DISCOVER_IMPLEMENTATION_VERSION  = 0x5,
-  SCMI_MESSAGE_ID_BASE_DISCOVER_LIST_PROTOCOLS          = 0x6
+  ScmiMessageIdBaseDiscoverVendor                 = 0x3,
+  ScmiMessageIdBaseDiscoverSubVendor              = 0x4,
+  ScmiMessageIdBaseDiscoverImplementationVersion  = 0x5,
+  ScmiMessageIdBaseDiscoverListProtocols          = 0x6
 } SCMI_MESSAGE_ID_BASE;

 #endif /* ARM_SCMI_BASE_PROTOCOL_H_ */
--
2.17.1

[PATCH v1 25/27] ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_CLOCK

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c   | 12 ++++++------
 ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c  | 10 +++++-----
 ArmPkg/Include/Protocol/ArmScmiClockProtocol.h | 10 +++++-----
 3 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c b/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c
index c84ce97f15ac..2c6206be9368 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c
@@ -69,9 +69,9 @@ BaseGetTotalProtocols (

 /** Common function which returns vendor details.

-  @param[in] MessageId       SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR
+  @param[in] MessageId       ScmiMessageIdBaseDiscoverVendor
                              OR
-                             SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR
+                             ScmiMessageIdBaseDiscoverSubVendor

   @param[out] VendorIdentifier ASCII name of the vendor/subvendor.

@@ -133,7 +133,7 @@ BaseDiscoverVendor (
   )
 {
   return BaseDiscoverVendorDetails (
-           SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR,
+           ScmiMessageIdBaseDiscoverVendor,
            VendorIdentifier
            );
 }
@@ -156,7 +156,7 @@ BaseDiscoverSubVendor (
   )
 {
   return BaseDiscoverVendorDetails (
-           SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR,
+           ScmiMessageIdBaseDiscoverSubVendor,
            VendorIdentifier
            );
 }
@@ -184,7 +184,7 @@ BaseDiscoverImplVersion (
   UINT32        PayloadLength;

   Cmd.ProtocolId = ScmiProtocolIdBase;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_BASE_DISCOVER_IMPLEMENTATION_VERSION;
+  Cmd.MessageId  = ScmiMessageIdBaseDiscoverImplementationVersion;

   PayloadLength = 0;

@@ -251,7 +251,7 @@ BaseDiscoverListProtocols (
   }

   Cmd.ProtocolId = ScmiProtocolIdBase;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_BASE_DISCOVER_LIST_PROTOCOLS;
+  Cmd.MessageId  = ScmiMessageIdBaseDiscoverListProtocols;

   Skip = 0;

diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c b/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
index b7892bfd7771..9cd3a7ed232d 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
@@ -123,7 +123,7 @@ ClockGetClockAttributes (
   *MessageParams = ClockId;

   Cmd.ProtocolId = ScmiProtocolIdClock;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_CLOCK_ATTRIBUTES;
+  Cmd.MessageId  = ScmiMessageIdClockAttributes;

   PayloadLength = sizeof (ClockId);

@@ -204,7 +204,7 @@ ClockDescribeRates (
   }

   Cmd.ProtocolId = ScmiProtocolIdClock;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_CLOCK_DESCRIBE_RATES;
+  Cmd.MessageId  = ScmiMessageIdClockDescribeRates;

   *MessageParams++  = ClockId;

@@ -321,7 +321,7 @@ ClockRateGet (
   *MessageParams  = ClockId;

   Cmd.ProtocolId  = ScmiProtocolIdClock;
-  Cmd.MessageId   = SCMI_MESSAGE_ID_CLOCK_RATE_GET;
+  Cmd.MessageId   = ScmiMessageIdClockRateGet;

   PayloadLength = sizeof (ClockId);

@@ -375,7 +375,7 @@ ClockRateSet (
   ClockRateSetAttributes->Rate.High  = (UINT32)(Rate >> 32);

   Cmd.ProtocolId = ScmiProtocolIdClock;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_CLOCK_RATE_SET;
+  Cmd.MessageId  = ScmiMessageIdClockRateSet;

   PayloadLength = sizeof (CLOCK_RATE_SET_ATTRIBUTES);

@@ -422,7 +422,7 @@ ClockEnable (
   ClockConfigSetAttributes->Attributes = Enable ? BIT0 : 0;

   Cmd.ProtocolId = ScmiProtocolIdClock;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_CLOCK_CONFIG_SET;
+  Cmd.MessageId  = ScmiMessageIdClockConfigSet;

   PayloadLength = sizeof (CLOCK_CONFIG_SET_ATTRIBUTES);

diff --git a/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h b/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
index 85b5b8d1e764..cd62f05a58fd 100644
--- a/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
+++ b/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
@@ -22,11 +22,11 @@ extern EFI_GUID gArmScmiClockProtocolGuid;

 // Message Type for clock management protocol.
 typedef enum {
-  SCMI_MESSAGE_ID_CLOCK_ATTRIBUTES     = 0x3,
-  SCMI_MESSAGE_ID_CLOCK_DESCRIBE_RATES = 0x4,
-  SCMI_MESSAGE_ID_CLOCK_RATE_SET       = 0x5,
-  SCMI_MESSAGE_ID_CLOCK_RATE_GET       = 0x6,
-  SCMI_MESSAGE_ID_CLOCK_CONFIG_SET     = 0x7
+  ScmiMessageIdClockAttributes    = 0x3,
+  ScmiMessageIdClockDescribeRates = 0x4,
+  ScmiMessageIdClockRateSet       = 0x5,
+  ScmiMessageIdClockRateGet       = 0x6,
+  ScmiMessageIdClockConfigSet     = 0x7
 } SCMI_MESSAGE_ID_CLOCK;

 typedef enum {
--
2.17.1

[PATCH v1 26/27] ArmPkg: Fix Ecc error 8005 for SCMI_CLOCK_RATE_FORMAT

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c   | 8 ++++----
 ArmPkg/Include/Protocol/ArmScmiClock2Protocol.h | 6 +++---
 ArmPkg/Include/Protocol/ArmScmiClockProtocol.h  | 8 ++++----
 3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c b/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
index 9cd3a7ed232d..cc223d672028 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
@@ -152,10 +152,10 @@ ClockGetClockAttributes (
   @param[in] This        A pointer to SCMI_CLOCK_PROTOCOL Instance.
   @param[in] ClockId     Identifier for the clock device.

-  @param[out] Format      SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
+  @param[out] Format      ScmiClockRateFormatDiscrete: Clock device
                           supports range of clock rates which are non-linear.

-                          SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
+                          ScmiClockRateFormatLinear: Clock device supports
                           range of linear clock rates from Min to Max in steps.

   @param[out] TotalRates  Total number of rates.
@@ -236,7 +236,7 @@ ClockDescribeRates (
       *TotalRates = NUM_RATES (DescribeRates->NumRatesFlags)
                     + NUM_REMAIN_RATES (DescribeRates->NumRatesFlags);

-      if (*Format == SCMI_CLOCK_RATE_FORMAT_DISCRETE) {
+      if (*Format == ScmiClockRateFormatDiscrete) {
          RequiredArraySize = (*TotalRates) * sizeof (UINT64);
       } else {
          // We need to return triplet of 64 bit value for each rate
@@ -251,7 +251,7 @@ ClockDescribeRates (

     RateOffset = 0;

-    if (*Format == SCMI_CLOCK_RATE_FORMAT_DISCRETE) {
+    if (*Format == ScmiClockRateFormatDiscrete) {
       for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {
         Rate = &DescribeRates->Rates[RateOffset++];
         // Non-linear discrete rates.
diff --git a/ArmPkg/Include/Protocol/ArmScmiClock2Protocol.h b/ArmPkg/Include/Protocol/ArmScmiClock2Protocol.h
index 950141cbd2da..0e26491a62c4 100644
--- a/ArmPkg/Include/Protocol/ArmScmiClock2Protocol.h
+++ b/ArmPkg/Include/Protocol/ArmScmiClock2Protocol.h
@@ -1,6 +1,6 @@
 /** @file

-  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+  Copyright (c) 2017-2021, Arm Limited. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -89,10 +89,10 @@ EFI_STATUS
   @param[in] This        A pointer to SCMI_CLOCK2_PROTOCOL Instance.
   @param[in] ClockId     Identifier for the clock device.

-  @param[out] Format      SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
+  @param[out] Format      ScmiClockRateFormatDiscrete: Clock device
                           supports range of clock rates which are non-linear.

-                          SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
+                          ScmiClockRateFormatLinear: Clock device supports
                           range of linear clock rates from Min to Max in steps.

   @param[out] TotalRates  Total number of rates.
diff --git a/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h b/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
index cd62f05a58fd..4210a53cf98d 100644
--- a/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
+++ b/ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
@@ -30,8 +30,8 @@ typedef enum {
 } SCMI_MESSAGE_ID_CLOCK;

 typedef enum {
-  SCMI_CLOCK_RATE_FORMAT_DISCRETE, // Non-linear range.
-  SCMI_CLOCK_RATE_FORMAT_LINEAR    // Linear range.
+  ScmiClockRateFormatDiscrete, // Non-linear range.
+  ScmiClockRateFormatLinear    // Linear range.
 } SCMI_CLOCK_RATE_FORMAT;

 // Clock management protocol version.
@@ -139,10 +139,10 @@ EFI_STATUS
   @param[in] This        A pointer to SCMI_CLOCK_PROTOCOL Instance.
   @param[in] ClockId     Identifier for the clock device.

-  @param[out] Format      SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
+  @param[out] Format      ScmiClockRateFormatDiscrete: Clock device
                           supports range of clock rates which are non-linear.

-                          SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
+                          ScmiClockRateFormatLinear: Clock device supports
                           range of linear clock rates from Min to Max in steps.

   @param[out] TotalRates  Total number of rates.
--
2.17.1

[PATCH v1 27/27] ArmPkg: Fix Ecc error 8005 for SCMI_MESSAGE_ID_PERFORMANCE

[PierreGondois]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v1

 .../ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h |  4 ++--
 .../Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c   | 12 ++++++------
 .../Include/Protocol/ArmScmiPerformanceProtocol.h  | 14 +++++++-------
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h b/ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h
index b274b5ab2ad4..b178aa3fdf10 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h
+++ b/ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h
@@ -1,6 +1,6 @@
 /** @file

-  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+  Copyright (c) 2017-2021, Arm Limited. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -22,7 +22,7 @@
 #define NUM_REMAIN_PERF_LEVELS_SHIFT  16
 #define NUM_REMAIN_PERF_LEVELS(Lvls) (Lvls >> NUM_REMAIN_PERF_LEVELS_SHIFT)

-/** Return values for SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS command.
+/** Return values for ScmiMessageIdPerformanceDescribeLevels command.
   SCMI Spec section 4.5.2.5
 **/
 typedef struct {
diff --git a/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c b/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c
index 51cad4d2c602..684ed713d52c 100644
--- a/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c
+++ b/ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c
@@ -108,7 +108,7 @@ PerformanceDomainAttributes (
   *MessageParams = DomainId;

   Cmd.ProtocolId = ScmiProtocolIdPerformance;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_DOMAIN_ATTRIBUTES;
+  Cmd.MessageId  = ScmiMessageIdPerformanceDomainAttributes;

   PayloadLength = sizeof (DomainId);

@@ -180,7 +180,7 @@ PerformanceDescribeLevels (
   *MessageParams++ = DomainId;

   Cmd.ProtocolId = ScmiProtocolIdPerformance;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS;
+  Cmd.MessageId  = ScmiMessageIdPerformanceDescribeLevels;

   do {

@@ -259,7 +259,7 @@ PerformanceLimitsSet (
   *MessageParams   = Limits->RangeMin;

   Cmd.ProtocolId = ScmiProtocolIdPerformance;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_SET;
+  Cmd.MessageId  = ScmiMessageIdPerformanceLimitsSet;

   PayloadLength = sizeof (DomainId) + sizeof (SCMI_PERFORMANCE_LIMITS);

@@ -305,7 +305,7 @@ PerformanceLimitsGet (
   *MessageParams = DomainId;

   Cmd.ProtocolId = ScmiProtocolIdPerformance;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_GET;
+  Cmd.MessageId  = ScmiMessageIdPerformanceLimitsGet;

   PayloadLength = sizeof (DomainId);

@@ -355,7 +355,7 @@ PerformanceLevelSet (
   *MessageParams   = Level;

   Cmd.ProtocolId = ScmiProtocolIdPerformance;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_SET;
+  Cmd.MessageId  = ScmiMessageIdPerformanceLevelSet;

   PayloadLength = sizeof (DomainId) + sizeof (Level);

@@ -400,7 +400,7 @@ PerformanceLevelGet (
   *MessageParams = DomainId;

   Cmd.ProtocolId = ScmiProtocolIdPerformance;
-  Cmd.MessageId  = SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_GET;
+  Cmd.MessageId  = ScmiMessageIdPerformanceLevelGet;

   PayloadLength = sizeof (DomainId);

diff --git a/ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h b/ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h
index 96a4d66737bd..8c70aa75281e 100644
--- a/ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h
+++ b/ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h
@@ -1,6 +1,6 @@
 /** @file

-  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+  Copyright (c) 2017-2021, Arm Limited. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -247,12 +247,12 @@ typedef struct _SCMI_PERFORMANCE_PROTOCOL {
 } SCMI_PERFORMANCE_PROTOCOL;

 typedef enum {
-  SCMI_MESSAGE_ID_PERFORMANCE_DOMAIN_ATTRIBUTES = 0x3,
-  SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS   = 0x4,
-  SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_SET        = 0x5,
-  SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_GET        = 0x6,
-  SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_SET         = 0x7,
-  SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_GET         = 0x8,
+  ScmiMessageIdPerformanceDomainAttributes = 0x3,
+  ScmiMessageIdPerformanceDescribeLevels   = 0x4,
+  ScmiMessageIdPerformanceLimitsSet        = 0x5,
+  ScmiMessageIdPerformanceLimitsGet        = 0x6,
+  ScmiMessageIdPerformanceLevelSet         = 0x7,
+  ScmiMessageIdPerformanceLevelGet         = 0x8,
 } SCMI_MESSAGE_ID_PERFORMANCE;

 #endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_H_ */
--
2.17.1