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[82.27.183.148]) by smtp.gmail.com with ESMTPSA id o9sm24874212wrw.81.2021.01.25.09.51.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Jan 2021 09:51:10 -0800 (PST) Date: Mon, 25 Jan 2021 17:51:08 +0000 From: "Leif Lindholm" To: Rebecca Cran Cc: devel@edk2.groups.io, Ard Biesheuvel , nd@arm.com, Sami Mujawar , Liming Gao , Michael D Kinney , Zhiguang Liu Subject: Re: [PATCH v6 12/22] ArmPkg: Add Library/OemMiscLib.h Message-ID: <20210125175108.GC1664@vanye> References: <20210114163628.31952-1-rebecca@nuviainc.com> <20210114163628.31952-13-rebecca@nuviainc.com> MIME-Version: 1.0 In-Reply-To: <20210114163628.31952-13-rebecca@nuviainc.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Jan 14, 2021 at 09:36:18 -0700, Rebecca Cran wrote: > OemMiscLib.h provides the interface which platforms should implement to > interact with the SmbiosMiscDxe and ProcessorSubClassDxe drivers to > update SMBIOS tables. > > Signed-off-by: Rebecca Cran Acked-by: Leif Lindholm > --- > ArmPkg/Include/Library/OemMiscLib.h | 166 ++++++++++++++++++++ > 1 file changed, 166 insertions(+) > > diff --git a/ArmPkg/Include/Library/OemMiscLib.h b/ArmPkg/Include/Library/OemMiscLib.h > new file mode 100644 > index 000000000000..a14eb36a60e3 > --- /dev/null > +++ b/ArmPkg/Include/Library/OemMiscLib.h > @@ -0,0 +1,166 @@ > +/** @file > +* > +* Copyright (c) 2021, NUVIA Inc. All rights reserved. > +* Copyright (c) 2015, Hisilicon Limited. All rights reserved. > +* Copyright (c) 2015, Linaro Limited. All rights reserved. > +* > +* SPDX-License-Identifier: BSD-2-Clause-Patent > +* > +**/ > + > + > +#ifndef OEM_MISC_LIB_H_ > +#define OEM_MISC_LIB_H_ > + > +#include > +#include > + > +typedef enum > +{ > + CpuCacheL1 = 0, > + CpuCacheL2, > + CpuCacheL3, > + CpuCacheL4, > + CpuCacheL5, > + CpuCacheL6, > + CpuCacheL7, > + CpuCacheLevelMax > +} OEM_MISC_CPU_CACHE_LEVEL; > + > +typedef struct > +{ > + UINT8 Voltage; ///< Processor voltage > + UINT16 CurrentSpeed; ///< Current clock speed in MHz > + UINT16 MaxSpeed; ///< Maximum clock speed in MHz > + UINT16 ExternalClock; ///< External clock speed in MHz > + UINT16 CoreCount; ///< Number of cores available > + UINT16 CoresEnabled; ///< Number of cores enabled > + UINT16 ThreadCount; ///< Number of threads per processor > +} OEM_MISC_PROCESSOR_DATA; > + > +typedef enum > +{ > + ProductNameType01, > + SerialNumType01, > + UuidType01, > + SystemManufacturerType01, > + SkuNumberType01, > + FamilyType01, > + AssertTagType02, > + SerialNumberType02, > + BoardManufacturerType02, > + SkuNumberType02, > + ChassisLocationType02, > + AssetTagType03, > + SerialNumberType03, > + VersionType03, > + ChassisTypeType03, > + ManufacturerType03, > + SkuNumberType03, > + SmbiosHiiStringFieldMax > +} OEM_MISC_SMBIOS_HII_STRING_FIELD; > + > +/* > + * The following are functions that the each platform needs to > + * implement in its OemMiscLib library. > + */ > + > +/** Gets the CPU frequency of the specified processor. > + > + @param ProcessorIndex Index of the processor to get the frequency for. > + > + @return CPU frequency in Hz > +**/ > +EFIAPI > +UINTN > +OemGetCpuFreq ( > + IN UINT8 ProcessorIndex > + ); > + > +/** Gets information about the specified processor and stores it in > + the structures provided. > + > + @param ProcessorIndex Index of the processor to get the information for. > + @param ProcessorStatus Processor status. > + @param ProcessorCharacteristics Processor characteritics. > + @param MiscProcessorData Miscellaneous processor information. > + > + @return TRUE on success, FALSE on failure. > +**/ > +EFIAPI > +BOOLEAN > +OemGetProcessorInformation ( > + IN UINTN ProcessorIndex, > + IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus, > + IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics, > + IN OUT OEM_MISC_PROCESSOR_DATA *MiscProcessorData > + ); > + > +/** Gets information about the cache at the specified cache level. > + > + @param ProcessorIndex The processor to get information for. > + @param CacheLevel The cache level to get information for. > + @param InstructionOrUnifiedCache Whether the cache is instruction or > + unified, not data. > + @param SmbiosCacheTable The SMBIOS Type7 cache information structure. > + > + @return TRUE on success, FALSE on failure. > +**/ > +EFIAPI > +BOOLEAN > +OemGetCacheInformation ( > + IN UINT8 ProcessorIndex, > + IN UINT8 CacheLevel, > + IN BOOLEAN InstructionOrUnifiedCache, > + IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable > + ); > + > +/** Gets the maximum number of sockets supported by the platform. > + > + @return The maximum number of sockets. > +**/ > +EFIAPI > +UINT8 > +OemGetProcessorMaxSockets ( > + VOID > + ); > + > +/** Gets the type of chassis for the system. > + > + @param ChassisType The type of the chassis. > + > + @retval EFI_SUCCESS The chassis type was fetched successfully. > +**/ > +EFIAPI > +EFI_STATUS > +OemGetChassisType ( > + OUT UINT8 *ChassisType > + ); > + > +/** Returns whether the specified processor is present or not. > + > + @param ProcessIndex The processor index to check. > + > + @return TRUE is the processor is present, FALSE otherwise. > +**/ > +EFIAPI > +BOOLEAN > +OemIsSocketPresent ( > + IN UINTN ProcessorIndex > + ); > + > +/** Updates the HII string for the specified field. > + > + @param mHiiHandle The HII handle. > + @param TokenToUpdate The string to update. > + @param Offset The field to get information about. > +**/ > +EFIAPI > +VOID > +OemUpdateSmbiosInfo ( > + IN EFI_HII_HANDLE HiiHandle, > + IN EFI_STRING_ID TokenToUpdate, > + IN OEM_MISC_SMBIOS_HII_STRING_FIELD Offset > + ); > + > +#endif // OEM_MISC_LIB_H_ > -- > 2.26.2 >