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From: "Sheng Wei" <w.sheng@intel.com>
To: devel@edk2.groups.io
Cc: Michael D Kinney <michael.d.kinney@intel.com>,
	Liming Gao <gaoliming@byosoft.com.cn>,
	Zhiguang Liu <zhiguang.liu@intel.com>,
	Jiewen Yao <jiewen.yao@intel.com>
Subject: [PATCH 1/2] MdePkg/Include: Add CET instructions to Nasm.inc
Date: Fri, 29 Jan 2021 15:59:45 +0800	[thread overview]
Message-ID: <20210129075946.31684-2-w.sheng@intel.com> (raw)
In-Reply-To: <20210129075946.31684-1-w.sheng@intel.com>

This is to add instruction SAVEPREVSSP, CLRSSBSY and RSTORSSP_RAX in Nasm,
because these instructions are not supported yet.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3192

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
---
 MdePkg/Include/Ia32/Nasm.inc | 14 +++++++++++++-
 MdePkg/Include/X64/Nasm.inc  | 14 +++++++++++++-
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/Ia32/Nasm.inc b/MdePkg/Include/Ia32/Nasm.inc
index 31ce861f1e..9c1b7796ea 100644
--- a/MdePkg/Include/Ia32/Nasm.inc
+++ b/MdePkg/Include/Ia32/Nasm.inc
@@ -1,6 +1,6 @@
 ;------------------------------------------------------------------------------
 ;
-; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
 ; SPDX-License-Identifier: BSD-2-Clause-Patent
 ;
 ; Abstract:
@@ -20,3 +20,15 @@
 %macro INCSSP_EAX      0
     DB 0xF3, 0x0F, 0xAE, 0xE8
 %endmacro
+
+%macro SAVEPREVSSP     0
+    DB 0xF3, 0x0F, 0x01, 0xEA
+%endmacro
+
+%macro CLRSSBSY_EAX    0
+    DB 0x67, 0xF3, 0x0F, 0xAE, 0x30
+%endmacro
+
+%macro RSTORSSP_EAX    0
+    DB 0x67, 0xF3, 0x0F, 0x01, 0x28
+%endmacro
diff --git a/MdePkg/Include/X64/Nasm.inc b/MdePkg/Include/X64/Nasm.inc
index 42412735ea..c5189982bb 100644
--- a/MdePkg/Include/X64/Nasm.inc
+++ b/MdePkg/Include/X64/Nasm.inc
@@ -1,6 +1,6 @@
 ;------------------------------------------------------------------------------
 ;
-; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
 ; SPDX-License-Identifier: BSD-2-Clause-Patent
 ;
 ; Abstract:
@@ -20,3 +20,15 @@
 %macro INCSSP_RAX      0
     DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8
 %endmacro
+
+%macro SAVEPREVSSP     0
+    DB 0xF3, 0x0F, 0x01, 0xEA
+%endmacro
+
+%macro CLRSSBSY_RAX    0
+    DB 0xF3, 0x0F, 0xAE, 0x30
+%endmacro
+
+%macro RSTORSSP_RAX    0
+    DB 0xF3, 0x0F, 0x01, 0x28
+%endmacro
-- 
2.16.2.windows.1


  reply	other threads:[~2021-01-29  7:59 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-29  7:59 [PATCH 0/2] Fix #DF issue when enable CET shadow stack feature Sheng Wei
2021-01-29  7:59 ` Sheng Wei [this message]
2021-01-29  7:59 ` [PATCH 2/2] UefiCpuPkg/CpuExceptionHandlerLib: Clear CET shadow stack token busy bit Sheng Wei
2021-01-31  1:38   ` Yao, Jiewen
     [not found]   ` <165F2D66EAF4D84C.16314@groups.io>
2021-01-31  1:46     ` [edk2-devel] " Yao, Jiewen
2021-02-03  2:43       ` Sheng Wei
2021-02-05  9:35         ` Sheng Wei
2021-02-05 15:13           ` Laszlo Ersek

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