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[174.52.16.57]) by smtp.gmail.com with ESMTPSA id 12sm11809361qkg.39.2021.01.31.15.25.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 31 Jan 2021 15:25:40 -0800 (PST) From: "Rebecca Cran" To: devel@edk2.groups.io Cc: Rebecca Cran , leif@nuviainc.com, Ard Biesheuvel , nd@arm.com, Sami Mujawar , Liming Gao , Michael D Kinney , Zhiguang Liu , Samer El-Haj-Mahmoud , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v7 12/21] ArmPkg: Add Universal/Smbios/OemMiscLibNull Date: Sun, 31 Jan 2021 16:25:02 -0700 Message-Id: <20210131232511.18340-13-rebecca@nuviainc.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210131232511.18340-1-rebecca@nuviainc.com> References: <20210131232511.18340-1-rebecca@nuviainc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a Null implementation of OemMiscLib. OemMiscLib provides functions that platforms implement to fill in SMBIOS information for the SmbiosMiscDxe and ProcessSubClassDxe drivers. Signed-off-by: Rebecca Cran Acked-by: Leif Lindholm --- ArmPkg/ArmPkg.dsc | 2 + ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf | 31 +++++ ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c | 143 ++++++++++++++++++++ 3 files changed, 176 insertions(+) diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc index 48059cf38ed3..0f77a6da4483 100644 --- a/ArmPkg/ArmPkg.dsc +++ b/ArmPkg/ArmPkg.dsc @@ -84,6 +84,8 @@ [LibraryClasses.common] ArmMtlLib|ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf + OemMiscLib|ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf + [LibraryClasses.common.PEIM] HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf diff --git a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf new file mode 100644 index 000000000000..b21eeade64b5 --- /dev/null +++ b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf @@ -0,0 +1,31 @@ +#/** @file +# OemMiscLib.inf +# +# Copyright (c) 2021, NUVIA Inc. All rights reserved. +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION = 1.29 + BASE_NAME = OemMiscLibNull + FILE_GUID = e80b8e6b-fffb-4c39-b433-41de67c9d7b8 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = OemMiscLib + +[Sources.common] + OemMiscLib.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + BaseMemoryLib + diff --git a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c new file mode 100644 index 000000000000..8233904647e5 --- /dev/null +++ b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c @@ -0,0 +1,143 @@ +/** @file +* OemMiscLib.c +* +* Copyright (c) 2021, NUVIA Inc. All rights reserved. +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include +#include + +#include + + +/** Gets the CPU frequency of the specified processor. + + @param ProcessorIndex Index of the processor to get the frequency for. + + @return CPU frequency in Hz +**/ +EFIAPI +UINTN +OemGetCpuFreq ( + IN UINT8 ProcessorIndex + ) +{ + ASSERT (FALSE); + return 0; +} + +/** Gets information about the specified processor and stores it in + the structures provided. + + @param ProcessorIndex Index of the processor to get the information for. + @param ProcessorStatus Processor status. + @param ProcessorCharacteristics Processor characteritics. + @param MiscProcessorData Miscellaneous processor information. + + @return TRUE on success, FALSE on failure. +**/ +EFIAPI +BOOLEAN +OemGetProcessorInformation ( + IN UINTN ProcessorIndex, + IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus, + IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics, + IN OUT OEM_MISC_PROCESSOR_DATA *MiscProcessorData + ) +{ + ASSERT (FALSE); + return TRUE; +} + +/** Gets information about the cache at the specified cache level. + + @param ProcessorIndex The processor to get information for. + @param CacheLevel The cache level to get information for. + @param InstructionOrUnifiedCache Whether the cache is instruction or + unified, not data. + @param SmbiosCacheTable The SMBIOS Type7 cache information structure. + + @return TRUE on success, FALSE on failure. +**/ +EFIAPI +BOOLEAN +OemGetCacheInformation ( + IN UINT8 ProcessorIndex, + IN UINT8 CacheLevel, + IN BOOLEAN InstructionOrUnifiedCache, + IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable + ) +{ + ASSERT (FALSE); + return TRUE; +} + +/** Gets the maximum number of sockets supported by the platform. + + @return The maximum number of sockets. +**/ +EFIAPI +UINT8 +OemGetProcessorMaxSockets ( + VOID + ) +{ + ASSERT (FALSE); + return 1; +} + +/** Gets the type of chassis for the system. + + @param ChassisType The type of the chassis. + + @retval EFI_SUCCESS The chassis type was fetched successfully. +**/ +EFI_STATUS +EFIAPI +OemGetChassisType ( + UINT8 *ChassisType + ) +{ + ASSERT (FALSE); + *ChassisType = MiscChassisTypeUnknown; + return EFI_SUCCESS; +} + +/** Returns whether the specified processor is present or not. + + @param ProcessIndex The processor index to check. + + @return TRUE is the processor is present, FALSE otherwise. +**/ +EFIAPI +BOOLEAN +OemIsSocketPresent ( + IN UINTN ProcessorIndex + ) +{ + ASSERT (FALSE); + return FALSE; +} + +/** Updates the HII string for the specified field. + + @param mHiiHandle The HII handle. + @param TokenToUpdate The string to update. + @param Offset The field to get information about. +**/ +EFIAPI +VOID +OemUpdateSmbiosInfo ( + IN EFI_HII_HANDLE mHiiHandle, + IN EFI_STRING_ID TokenToUpdate, + IN OEM_MISC_SMBIOS_HII_STRING_FIELD Offset + ) +{ + ASSERT (FALSE); +} -- 2.26.2