From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qv1-f46.google.com (mail-qv1-f46.google.com [209.85.219.46]) by mx.groups.io with SMTP id smtpd.web09.26062.1612135523620719279 for ; Sun, 31 Jan 2021 15:25:23 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=LkWNG7Z6; spf=pass (domain: nuviainc.com, ip: 209.85.219.46, mailfrom: rebecca@nuviainc.com) Received: by mail-qv1-f46.google.com with SMTP id r13so2957273qvm.11 for ; Sun, 31 Jan 2021 15:25:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=D2gEjFelyPSjnUpcU9RoYvNbAEFfhxFoj8ehlO3TW7A=; b=LkWNG7Z6Baq90+RRJOvh+5+NmlS5OOVjnCoEFLEySlRVn0IiMoAwlMzBx9XiOdPOBu g72/nk9Zr+zs5Z7DQpS+3GiG0PNdMMdU+C9Tps3vmsunz6hEEIQ4eczK+chW8tSmZDqy BkPnl7FGLpxQfnmAxkpm9fX4TG70sjQFO90fkM7HcbQj4nY25aG75rPmoTtjiifaskDZ 6CeGpvVIB6p95gOnErPt9zEKjvU+9xtDeChnhjYoyMKWPSMW97ld6kT1a5K1onTGbtrs dPwn/TosC0LczbpWl0oxKJCtBOz6v9knJSWa4SBDh3zlMxsJlUxvkpLPgLDXks5jK536 0LxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=D2gEjFelyPSjnUpcU9RoYvNbAEFfhxFoj8ehlO3TW7A=; b=TUHvcmeoi3AikZ1qvLyDpi0Ly2rMqaXXjuCVE/3ywIJUZk/UOu236i1fvZ3s4J0OWP zA5oppHtSzGoYvgxpl8MCSlg2iVBpakJFIJnfCjxZVtdR0sUw95nUDaS81HkhYgaI6OO 3b4Uv0DbCbAwTyrnWfEO1SXWjmyudCr8vy6DzhyVkB5I+JqeHo4LKFDZQRMl+vBzHNnW 3ekWKw29zQNjeTd3tMSVeCUp1iD+r1Wz23IxcLdKb18EffPUI128F4k2PH+zvfu/GmWp CZNKD6Jm662kCP0LwcPUOiSUbl2emkxizpcybPvtTH529+vrARTf6n1VIgiCVQASzg0j 1qDQ== X-Gm-Message-State: AOAM530pS2zth+OOlfO+Jn3iHEprduzNpxxIH3BSLd9iqE8IpaoptAnP oF0IOZy1NrUfNOV3fJPZjQlFSl+aDTo09haeBX6WkR0v5s8dVwAXOyi1DmmnArjwPyrD/BEQ+KJ wrKgijqE/Ul4RQAtCnj74vkezivyG3OvbURcsjP1urwU9K/lkaWEtj7vUwLgdtXljDKUN4Q== X-Google-Smtp-Source: ABdhPJyJVvRvvgV8HrlmGnxuK3FFgf3IXo9/Bz/US+BsP8fSH1ymRlOfRChzl8Ra2azOD89v+iYzxw== X-Received: by 2002:a0c:f008:: with SMTP id z8mr10928821qvk.21.1612135522606; Sun, 31 Jan 2021 15:25:22 -0800 (PST) Return-Path: Received: from cube.int.bluestop.org (c-174-52-16-57.hsd1.ut.comcast.net. [174.52.16.57]) by smtp.gmail.com with ESMTPSA id 12sm11809361qkg.39.2021.01.31.15.25.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 31 Jan 2021 15:25:22 -0800 (PST) From: "Rebecca Cran" To: devel@edk2.groups.io Cc: Rebecca Cran , leif@nuviainc.com, Ard Biesheuvel , nd@arm.com, Sami Mujawar , Liming Gao , Michael D Kinney , Zhiguang Liu , Samer El-Haj-Mahmoud , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Sami Mujawar Subject: [PATCH v7 03/21] ArmPkg: Add register encoding definition for MMFR2 Date: Sun, 31 Jan 2021 16:24:53 -0700 Message-Id: <20210131232511.18340-4-rebecca@nuviainc.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210131232511.18340-1-rebecca@nuviainc.com> References: <20210131232511.18340-1-rebecca@nuviainc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add register encoding definition for Memory Model Feature Register 2. We need to define it here because we build for ARMv8.0, which doesn't have it. Signed-off-by: Rebecca Cran Reviewed-by: Leif Lindholm Reviewed-by: Sami Mujawar --- ArmPkg/Include/Chipset/AArch64.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h index 0ade5cce91c3..7c2b592f92ee 100644 --- a/ArmPkg/Include/Chipset/AArch64.h +++ b/ArmPkg/Include/Chipset/AArch64.h @@ -112,6 +112,10 @@ #define ARM_VECTOR_LOW_A32_FIQ 0x700 #define ARM_VECTOR_LOW_A32_SERR 0x780 +// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we +// build for ARMv8.0, we need to define the register here. +#define ID_AA64MMFR2_EL1 S3_0_C0_C7_2 + #define VECTOR_BASE(tbl) \ .section .text.##tbl##,"ax"; \ .align 11; \ -- 2.26.2