From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga03.intel.com (mga03.intel.com []) by mx.groups.io with SMTP id smtpd.web11.17412.1612681659774081729 for ; Sat, 06 Feb 2021 23:07:40 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: w.sheng@intel.com) IronPort-SDR: /xN8Q8R7gCB7Gejgms+2PlXhSIo9YhZtdBfnWBqVHRZ6V89FYVDAv+2YDOivBTTsfKwPXuwc4I y2M4C+VI6A9Q== X-IronPort-AV: E=McAfee;i="6000,8403,9887"; a="181652891" X-IronPort-AV: E=Sophos;i="5.81,159,1610438400"; d="scan'208";a="181652891" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Feb 2021 23:07:33 -0800 IronPort-SDR: x3shwtn87tuqa55f5HQIH4CTRasHnKqvP9BrWtQgmhzGVkWAdr4EIbvZFZDKF2el2Edf/wcIua X/BVxvXIcGJw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,159,1610438400"; d="scan'208";a="435191105" Received: from shwdesssddpdwei.ccr.corp.intel.com ([10.239.157.35]) by orsmga001.jf.intel.com with ESMTP; 06 Feb 2021 23:07:31 -0800 From: "Sheng Wei" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Laszlo Ersek , Rahul Kumar , Jiewen Yao , Roger Feng Subject: [PATCH v3 0/1] Fix CET shadow stack token busy bit clear issue Date: Sun, 7 Feb 2021 15:07:28 +0800 Message-Id: <20210207070729.104936-1-w.sheng@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 If CET shadows stack feature enabled in SMM and stack switch is enabled. When code execute from SMM handler to SMM exception, CPU will check SMM exception shadow stack token busy bit if it is cleared or not. If it is set, it will trigger #DF exception. If it is not set, CPU will set the busy bit when enter SMM exception. So, the busy bit should be cleared when return back form SMM exception to SMM handler. Otherwise, keeping busy bit 1 will cause to trigger #DF exception when enter SMM exception next time. So, we use instruction SAVEPREVSSP, CLRSSBSY and RSTORSSP to clear the shadow stack token busy bit before RETF instruction in SMM exception. Since open CI is using NASM 2.14.02, it has not supported CET instructions yet. Use DB xx xx xx xx to replace the assembly instruction before NASM 2.15.01 is used. Change from patch v1 to patch v2: 1 Add behavior description in source code comment. 2 Structure interrupt shadow stack memory in InitShadowStack(). 3 Update commit comment. Change from patch v2 to patch v3: 1 Add comment /UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3192 Signed-off-by: Sheng Wei Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Rahul Kumar Cc: Jiewen Yao Cc: Roger Feng Sheng Wei (1): UefiCpuPkg/CpuExceptionHandlerLib: Clear CET shadow stack token busy bit .../DxeCpuExceptionHandlerLib.inf | 3 ++ .../PeiCpuExceptionHandlerLib.inf | 3 ++ .../SecPeiCpuExceptionHandlerLib.inf | 4 ++ .../SmmCpuExceptionHandlerLib.inf | 3 ++ .../X64/Xcode5ExceptionHandlerAsm.nasm | 48 ++++++++++++++++++++-- .../Xcode5SecPeiCpuExceptionHandlerLib.inf | 4 ++ UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c | 15 ++++++- 7 files changed, 76 insertions(+), 4 deletions(-) -- 2.16.2.windows.1