[PATCH v2 01/26] ArmPkg: Fix Ecc error 8001 in Chipset

["PierreGondois" <pierre.gondois@arm.com>]

From: Pierre Gondois <Pierre.Gondois@arm.com>

This patch fixes the following Ecc reported error:
Only capital letters are allowed to be used
for #define declarations

Edk2 coding standard stating that:
"Names starting with one or two underscores, such as
_MACRO_GUARD_FILE_NAME_H_, must not be used."
the include guard of ArmCortexA5x.h is also updated.

Ref:
https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/
5_source_files/53_include_files#
5-3-5-all-include-file-contents-must-be-protected-by-a-include-guard

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/1552_Ecc_ArmPkg_BIS_v2

Notes:
    v2:
     - Only use one trailing underscore for the
       ARM_CORTEX_A5x_H__ include guard. [Sami]
     - 2 patches had the same name and fixed the same
       Ecc error in V1. They are merged in V2. [Pierre]

 ArmPkg/Include/Chipset/AArch64.h                     | 12 ++++++------
 ArmPkg/Include/Chipset/AArch64Mmu.h                  |  4 ++--
 ArmPkg/Include/Chipset/ArmCortexA5x.h                |  8 ++++----
 ArmPkg/Include/Chipset/ArmV7.h                       |  4 ++--
 .../ArmExceptionLib/AArch64/ExceptionSupport.S       | 10 +++++-----
 ArmPlatformPkg/PrePeiCore/AArch64/Exception.S        | 10 +++++-----
 6 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index 0ade5cce91c3..d49f4d60b15d 100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -1,7 +1,7 @@
 /** @file

   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2011 - 2017, ARM Ltd. All rights reserved.<BR>
+  Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -39,7 +39,7 @@
 // MIDR - Main ID Register definitions
 #define ARM_CPU_TYPE_SHIFT      4
 #define ARM_CPU_TYPE_MASK       0xFFF
-#define ARM_CPU_TYPE_AEMv8      0xD0F
+#define ARM_CPU_TYPE_AEMV8      0xD0F
 #define ARM_CPU_TYPE_A53        0xD03
 #define ARM_CPU_TYPE_A57        0xD07
 #define ARM_CPU_TYPE_A72        0xD08
@@ -97,10 +97,10 @@
 #define ARM_VECTOR_CUR_SP0_FIQ  0x100
 #define ARM_VECTOR_CUR_SP0_SERR 0x180

-#define ARM_VECTOR_CUR_SPx_SYNC 0x200
-#define ARM_VECTOR_CUR_SPx_IRQ  0x280
-#define ARM_VECTOR_CUR_SPx_FIQ  0x300
-#define ARM_VECTOR_CUR_SPx_SERR 0x380
+#define ARM_VECTOR_CUR_SPX_SYNC 0x200
+#define ARM_VECTOR_CUR_SPX_IRQ  0x280
+#define ARM_VECTOR_CUR_SPX_FIQ  0x300
+#define ARM_VECTOR_CUR_SPX_SERR 0x380

 #define ARM_VECTOR_LOW_A64_SYNC 0x400
 #define ARM_VECTOR_LOW_A64_IRQ  0x480
diff --git a/ArmPkg/Include/Chipset/AArch64Mmu.h b/ArmPkg/Include/Chipset/AArch64Mmu.h
index 606fe7420d67..6c7ada16b18a 100644
--- a/ArmPkg/Include/Chipset/AArch64Mmu.h
+++ b/ArmPkg/Include/Chipset/AArch64Mmu.h
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -190,7 +190,7 @@

 // The value written to the T*SZ fields are defined as 2^(64-T*SZ). So a 39Bit
 // Virtual address range for 512GB of virtual space sets T*SZ to 25
-#define INPUT_ADDRESS_SIZE_TO_TxSZ(a)        (64 - a)
+#define INPUT_ADDRESS_SIZE_TO_TXSZ(a)        (64 - a)

 // Uses LPAE Page Table format

diff --git a/ArmPkg/Include/Chipset/ArmCortexA5x.h b/ArmPkg/Include/Chipset/ArmCortexA5x.h
index 847a6e00430b..e597eee947cf 100644
--- a/ArmPkg/Include/Chipset/ArmCortexA5x.h
+++ b/ArmPkg/Include/Chipset/ArmCortexA5x.h
@@ -1,13 +1,13 @@
 /** @file

-  Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+  Copyright (c) 2012 - 2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

 **/

-#ifndef __ARM_CORTEX_A5x_H__
-#define __ARM_CORTEX_A5x_H__
+#ifndef ARM_CORTEX_A5X_H_
+#define ARM_CORTEX_A5X_H_

 //
 // Cortex A5x feature bit definitions
@@ -41,4 +41,4 @@ ArmUnsetCpuExCrBit (
   IN  UINT64    Bits
   );

-#endif
+#endif // ARM_CORTEX_A5X_H_
diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h
index fe91031ef33d..025f87a56d16 100644
--- a/ArmPkg/Include/Chipset/ArmV7.h
+++ b/ArmPkg/Include/Chipset/ArmV7.h
@@ -1,7 +1,7 @@
 /** @file

   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2011-2015, ARM Ltd. All rights reserved.<BR>
+  Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -70,7 +70,7 @@
 // MIDR - Main ID Register definitions
 #define ARM_CPU_TYPE_SHIFT      4
 #define ARM_CPU_TYPE_MASK       0xFFF
-#define ARM_CPU_TYPE_AEMv8      0xD0F
+#define ARM_CPU_TYPE_AEMV8      0xD0F
 #define ARM_CPU_TYPE_A53        0xD03
 #define ARM_CPU_TYPE_A57        0xD07
 #define ARM_CPU_TYPE_A15        0xC0F
diff --git a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
index 5b10a1339ac1..9202952ee9c0 100644
--- a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
+++ b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2011 - 2014 ARM LTD. All rights reserved.<BR>
+// Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
 // Portion of Copyright (c) 2014 NVIDIA Corporation. All rights reserved.<BR>
 // Copyright (c) 2016 HP Development Company, L.P.
 //
@@ -200,19 +200,19 @@ ASM_PFX(SErrorSP0):
 //
 // Current EL with SPx: 0x200 - 0x380
 //
-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_SYNC)
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPX_SYNC)
 ASM_PFX(SynchronousExceptionSPx):
   ExceptionEntry  EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS, SP0

-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_IRQ)
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPX_IRQ)
 ASM_PFX(IrqSPx):
   ExceptionEntry  EXCEPT_AARCH64_IRQ

-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_FIQ)
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPX_FIQ)
 ASM_PFX(FiqSPx):
   ExceptionEntry  EXCEPT_AARCH64_FIQ

-VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_SERR)
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPX_SERR)
 ASM_PFX(SErrorSPx):
   ExceptionEntry  EXCEPT_AARCH64_SERROR

diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
index 59a3da2721e7..43e40f97c3ee 100644
--- a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
+++ b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+#  Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -51,22 +51,22 @@ _DefaultSError_t:
   mov  x0, #EXCEPT_AARCH64_SERROR
   TO_HANDLER

-VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SYNC)
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_SYNC)
 _DefaultSyncExceptHandler_h:
   mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
   TO_HANDLER

-VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_IRQ)
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_IRQ)
 _DefaultIrq_h:
   mov  x0, #EXCEPT_AARCH64_IRQ
   TO_HANDLER

-VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_FIQ)
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_FIQ)
 _DefaultFiq_h:
   mov  x0, #EXCEPT_AARCH64_FIQ
   TO_HANDLER

-VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SERR)
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_SERR)
 _DefaultSError_h:
   mov  x0, #EXCEPT_AARCH64_SERROR
   TO_HANDLER
--
2.17.1