From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mx.groups.io with SMTP id smtpd.web08.15899.1612898814201046208 for ; Tue, 09 Feb 2021 11:26:54 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.120, mailfrom: nathaniel.l.desimone@intel.com) IronPort-SDR: dcv2V8sSG5twITE2VYe7xr/kZS4AZvxZeb5QXPvuUHjfw1ReNnlOIoZvfYE70WwTZJ3lYGEQdB jLEzey3ZmvFA== X-IronPort-AV: E=McAfee;i="6000,8403,9890"; a="179388116" X-IronPort-AV: E=Sophos;i="5.81,166,1610438400"; d="scan'208";a="179388116" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2021 11:26:53 -0800 IronPort-SDR: R4Wh5sI3iqx49UP9oTtaYSzk769OoOklnIIv1GdjPvdlxFPUdF9k0xYbrvinpr6BXAnF3SWvuI Jtw5UyUjgE1Q== X-IronPort-AV: E=Sophos;i="5.81,166,1610438400"; d="scan'208";a="436376313" Received: from nldesimo-desk1.amr.corp.intel.com ([10.209.53.68]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2021 11:26:53 -0800 From: "Nate DeSimone" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-platforms] [PATCH v1] IntelSiliconPkg: Add DWORD_ALIGN macro Date: Tue, 9 Feb 2021 11:26:44 -0800 Message-Id: <20210209192644.3862-1-nathaniel.l.desimone@intel.com> X-Mailer: git-send-email 2.27.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Adds a macro that rounds a given integer up to the nearest DWORD. The config block data structure needs to be DWORD aligned. Since config blocks are run-length encoded, the size of all config blocks therefore needs to be in DWORD increments. This macro aids in storing arbitary data in a config block. Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Nate DeSimone --- Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h b/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h index 37a3968168..0233137e99 100644 --- a/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h +++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h @@ -9,6 +9,8 @@ #ifndef _CONFIG_BLOCK_LIB_H_ #define _CONFIG_BLOCK_LIB_H_ +#define DWORD_ALIGN(x) (((x) & 3) ? 0 : 1) ? x : (((x) + 4) & ((UINTN) ~0x3)) + /** Create config block table. -- 2.27.0.windows.1