Re: [PATCH v1 07/10] Silicon/Phytium: Added flash driver support to Phytium Silicon

["Leif Lindholm" <leif@nuviainc.com>]

On Fri, Feb 05, 2021 at 18:06:27 +0800, Ling Jia wrote:
> The SpiNorFlashDxe provided norflash initialization,
> read-write, erase and other interfaces.
> 
> Signed-off-by: Ling Jia <jialing@phytium.com.cn>
> ---
>  Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec                   |   1 +
>  Platform/Phytium/DurianPkg/DurianPkg.dsc                                |   5 +
>  Platform/Phytium/DurianPkg/DurianPkg.fdf                                |   1 +
>  Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf   |  48 +++
>  Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.h     |  96 +++++
>  Silicon/Phytium/PhytiumCommonPkg/Include/Protocol/SpiNorFlashProtocol.h |  74 ++++
>  Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.c     | 425 ++++++++++++++++++++
>  7 files changed, 650 insertions(+)
> 
> diff --git a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec
> index 69842b89e021..2686ba3cc3a2 100644
> --- a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec
> +++ b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec
> @@ -48,3 +48,4 @@ [PcdsFixedAtBuild.common]
>  
>  [Protocols]
>    gSpiMasterProtocolGuid = { 0xdf093560, 0xf955, 0x11ea, { 0x96, 0x42, 0x43, 0x9d, 0x80, 0xdd, 0x0b, 0x7c}}
> +  gSpiNorFlashProtocolGuid = { 0x00b4af42, 0xfbd0, 0x11ea, { 0x80, 0x3a, 0x27, 0xea, 0x5e, 0x65, 0xe3, 0xf6}}
> diff --git a/Platform/Phytium/DurianPkg/DurianPkg.dsc b/Platform/Phytium/DurianPkg/DurianPkg.dsc
> index 68849d16a00c..884e01643498 100644
> --- a/Platform/Phytium/DurianPkg/DurianPkg.dsc
> +++ b/Platform/Phytium/DurianPkg/DurianPkg.dsc
> @@ -229,6 +229,11 @@ [Components.common]
>    #
>    Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf
>  
> +  #
> +  # NOR Flash driver
> +  #
> +  Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf
> +
>    #
>    # Usb Support
>    #
> diff --git a/Platform/Phytium/DurianPkg/DurianPkg.fdf b/Platform/Phytium/DurianPkg/DurianPkg.fdf
> index f4f12a910d5a..76b02417344d 100644
> --- a/Platform/Phytium/DurianPkg/DurianPkg.fdf
> +++ b/Platform/Phytium/DurianPkg/DurianPkg.fdf
> @@ -96,6 +96,7 @@ [FV.FvMain]
>    INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
>  
>    INF Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf
> +  INF Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf
>  
>    INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
>    INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
> diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf
> new file mode 100644
> index 000000000000..8a36bd49bceb
> --- /dev/null
> +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf
> @@ -0,0 +1,48 @@
> +#/** @file
> +#  Phytium NorFlash Drivers.
> +#
> +#  Copyright (C) 2020, Phytium Technology Co,Ltd. All rights reserved.<BR>
> +#
> +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#**/
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001b
> +  BASE_NAME                      = SpiNorFlashDxe
> +  FILE_GUID                      = f37ef706-187c-48fd-9102-ddbf86f551be
> +  MODULE_TYPE                    = DXE_RUNTIME_DRIVER
> +  VERSION_STRING                 = 1.0
> +  ENTRY_POINT                    = NorFlashPlatformEntryPoint
> +
> +[Sources.common]
> +  SpiNorFlashDxe.c
> +  SpiNorFlashDxe.h
> +
> +[Packages]
> +  ArmPkg/ArmPkg.dec
> +  MdePkg/MdePkg.dec
> +  Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec
> +
> +[LibraryClasses]
> +  BaseLib
> +  DebugLib
> +  IoLib
> +  UefiLib
> +  UefiBootServicesTableLib
> +  UefiRuntimeLib
> +  UefiDriverEntryPoint
> +
> +[FixedPcd]
> +  gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashBase
> +  gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashSize
> +  gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerBase
> +[Guids]
> +  gEfiEventVirtualAddressChangeGuid
> +
> +[Protocols]
> +  gSpiMasterProtocolGuid
> +  gSpiNorFlashProtocolGuid
> +
> + [Depex]
> +  TRUE
> diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.h b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.h
> new file mode 100644
> index 000000000000..bcafe3b36d2e
> --- /dev/null
> +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.h
> @@ -0,0 +1,96 @@
> +/** @file
> +  Phytium NorFlash Drivers Header.
> +
> +  Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef SPI_NORFALSH_DXE_H_
> +#define SPI_NORFALSH_DXE_H_
> +
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiRuntimeLib.h>
> +#include <Protocol/SpiProtocol.h>
> +#include <Protocol/SpiNorFlashProtocol.h>

.h files should only include those headers they use themselves.

> +
> +//
> +//  Norflash registers
> +//
> +#define REG_FLASH_CAP 0x000
> +#define REG_RD_CFG    0x004
> +#define REG_WR_CFG    0x008
> +#define REG_FLUSH_REG 0x00C
> +#define REG_CMD_PORT  0x010
> +#define REG_ADDR_PORT 0x014
> +#define REG_HD_PORT   0x018
> +#define REG_LD_PORT   0x01C
> +#define REG_CS_CFG    0x020
> +#define REG_WIP_CFG   0x024
> +#define REG_WP_REG    0x028
> +
> +#define NORFLASH_SIGNATURE     SIGNATURE_32 ('F', 'T', 'S', 'F')
> +
> +//
> +// Platform Nor Flash Functions
> +//
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformEraseSingleBlock (
> +  IN UINTN                BlockAddress
> +  );
> +
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformErase (
> +  IN UINT64                  Offset,
> +  IN UINT64                  Length
> +  );
> +
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformRead (
> +  IN UINTN                Address,
> +  IN VOID                 *Buffer,
> +  OUT UINT32              Len
> +  );
> +
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformWrite (
> +  IN UINTN                Address,
> +  IN VOID                 *Buffer,
> +  IN UINT32               Len
> +  );
> +
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformGetDevices (
> +  OUT NOR_FLASH_DEVICE_DESCRIPTION *NorFlashDevices
> +  );
> +
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformInitialization (
> +  VOID
> +  );
> +
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformEntryPoint (
> +  IN EFI_HANDLE         ImageHandle,
> +  IN EFI_SYSTEM_TABLE   *SystemTable
> +  );
> +
> +typedef struct {
> +  EFI_NORFLASH_DRV_PROTOCOL FlashProtocol;
> +  UINTN                   Signature;
> +  EFI_HANDLE              Handle;
> +} NorFlash_Device;
> +
> +#endif // SPI_NORFALSH_DXE_H_
> diff --git a/Silicon/Phytium/PhytiumCommonPkg/Include/Protocol/SpiNorFlashProtocol.h b/Silicon/Phytium/PhytiumCommonPkg/Include/Protocol/SpiNorFlashProtocol.h
> new file mode 100644
> index 000000000000..b3ae26c5d44f
> --- /dev/null
> +++ b/Silicon/Phytium/PhytiumCommonPkg/Include/Protocol/SpiNorFlashProtocol.h
> @@ -0,0 +1,74 @@
> +/** @file
> +  The Header of Protocol For NorFlash.
> +
> +  Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef SPI_NORFALSH_H_
> +#define SPI_NORFALSH_H_

Typo:
NORFALSH_H_ should be
NORFLASH_H_

> +
> +typedef struct _EFI_NORFLASH_DRV_PROTOCOL EFI_NORFLASH_DRV_PROTOCOL;
> +extern EFI_GUID gSpiNorFlashProtocolGuid;
> +
> +typedef struct {
> +  UINTN       DeviceBaseAddress;    // Start address of the Device Base Address (DBA)
> +  UINTN       RegionBaseAddress;    // Start address of one single region
> +  UINTN       Size;
> +  UINTN       BlockSize;
> +  EFI_GUID    Guid;
> +} NOR_FLASH_DEVICE_DESCRIPTION;
> +
> +typedef
> +EFI_STATUS
> +(EFIAPI *NORFLASH_PLATFORM_ERASE_INTERFACE) (
> +  IN UINT64                  Offset,
> +  IN UINT64                  Length
> +  );
> +
> +typedef
> +EFI_STATUS
> +(EFIAPI *NORFLASH_PLATFORM_ERASESIGLEBLOCK_INTERFACE) (
> +  IN UINTN            BlockAddress
> +  );
> +
> +typedef
> +EFI_STATUS
> +(EFIAPI *NORFLASH_PLATFORM_READ_INTERFACE) (
> +  IN UINTN                Address,
> +  IN VOID                 *Buffer,
> +  OUT UINT32              Len
> +  );
> +
> +typedef
> +EFI_STATUS
> +(EFIAPI *NORFLASH_PLATFORM_WRITE_INTERFACE) (
> +  IN UINTN                Address,
> +  IN VOID                 *Buffer,
> +  IN UINT32               Len
> +  );
> +
> +typedef
> +EFI_STATUS
> +(EFIAPI *NORFLASH_PLATFORM_GETDEVICE_INTERFACE) (
> +  OUT NOR_FLASH_DEVICE_DESCRIPTION *NorFlashDevices
> +  );
> +
> +typedef
> +EFI_STATUS
> +(EFIAPI *NORFLASH_PLATFORM_INIT_INTERFACE) (
> +  VOID
> +  );
> +
> +struct _EFI_NORFLASH_DRV_PROTOCOL{
> +  NORFLASH_PLATFORM_INIT_INTERFACE       Initialization;
> +  NORFLASH_PLATFORM_GETDEVICE_INTERFACE  GetDevices;
> +  NORFLASH_PLATFORM_ERASE_INTERFACE       Erase;
> +  NORFLASH_PLATFORM_ERASESIGLEBLOCK_INTERFACE  EraseSingleBlock;
> +  NORFLASH_PLATFORM_READ_INTERFACE        Read;
> +  NORFLASH_PLATFORM_WRITE_INTERFACE       Write;
> +};
> +
> +#endif // SPI_NORFALSH_H_
> diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.c b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.c
> new file mode 100644
> index 000000000000..de8ad1c6bf91
> --- /dev/null
> +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.c
> @@ -0,0 +1,425 @@
> +/** @file
> +  Phytium NorFlash Drivers.
> +
> +  Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "SpiNorFlashDxe.h"
> +
> +typedef struct {
> +  UINT32 Flash_Index;
> +  UINT32 Flash_Write;
> +  UINT32 Flash_Erase;
> +  UINT32 Flash_Pp;
> +}FLASH_CMD_INFO;
> +
> +STATIC EFI_EVENT       mSpiNorFlashVirtualAddrChangeEvent;
> +STATIC UINTN           mNorFlashControlBase;
> +STATIC UINT32          mCmd_Write;

No '_' in variable names.

> +STATIC UINT32          mCmd_Eares;

Is this a typo for Erase?

> +STATIC UINT32          mCmd_Pp;

I am slightly unsure of this mechanism.
These commands are only set once - is the intent to implement a single
driver for several versions of chip?

Also, these commands are all initialised with 8-bit values, and then
they are still masked on use. Would it not be easier to make them
8-bit variables?

> +
> +#define SPI_FLASH_BASE           FixedPcdGet64 (PcdSpiFlashBase)
> +#define SPI_FLASH_SIZE           FixedPcdGet64 (PcdSpiFlashSize)
> +
> +EFI_SPI_DRV_PROTOCOL *pSpiMasterProtocol;

All global variables should have 'm' or 'g' prefix.
The "p" is Hungarian notation again.

> +
> +NorFlash_Device *flash_Instance;

'm' or 'g' prefix, and no '_' in variable names.

> +extern EFI_GUID gSpiMasterProtocolGuid;
> +extern EFI_GUID gSpiNorFlashProtocolGuid;

Please move these to header files.

> +
> +NOR_FLASH_DEVICE_DESCRIPTION mNorFlashDevices = {
> +    SPI_FLASH_BASE,   /* Device Base Address */
> +    SPI_FLASH_BASE,   /* Region Base Address */
> +    SIZE_1MB * 16,    /* Size */
> +    SIZE_64KB,        /* Block Size */
> +    {0xE7223039, 0x5836, 0x41E1, { 0xB5, 0x42, 0xD7, 0xEC, 0x73, 0x6C, 0x5E, 0x59 } }
> +};
> +
> +
> +/**
> +  This function writed up to 256 bytes to flash through spi driver.
> +
> +  @param[in] Address             The address of the flash.
> +  @param[in] Buffer              The pointer of buffer to be writed.
> +  @param[in] BufferSizeInBytes   The bytes to be writed.
> +
> +  @retval EFI_SUCCESS           NorFlashWrite256() is executed successfully.
> +
> +**/
> +STATIC
> +EFI_STATUS
> +NorFlashWrite256 (
> +  IN UINTN            Address,
> +  IN VOID             *Buffer,
> +  IN UINT32           BufferSizeInBytes
> +  )
> +{
> +  UINT32     Index;
> +  UINT8      Cmd_id;
> +  UINT32     *TemBuffer;

TempBuffer would be a more traditional name than
TemBuffer

> +
> +  TemBuffer= Buffer;

Space before '='.

> +
> +  if(BufferSizeInBytes > 256) {
> +    DEBUG((DEBUG_ERROR, "The max length is 256 bytes.\n"));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  if(BufferSizeInBytes % 4 != 0) {

Use () around BufferSizeInBytes % 4

> +    DEBUG((DEBUG_ERROR, "The length must four bytes aligned.\n"));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  if(Address % 4 != 0) {

Use () around Address % 4

> +    DEBUG((DEBUG_ERROR, "The address must four bytes aligned.\n"));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  Cmd_id = (UINT8)(mCmd_Pp & 0xff);
> +  pSpiMasterProtocol->SpiSetConfig (Cmd_id, 0x400000, REG_CMD_PORT);
> +  pSpiMasterProtocol->SpiSetConfig (0, 0x1, REG_LD_PORT);
> +
> +  Cmd_id = (UINT8)(mCmd_Write & 0xff);
> +  pSpiMasterProtocol->SpiSetConfig (Cmd_id, 0x000208, REG_WR_CFG);
> +
> +  for(Index = 0; Index < BufferSizeInBytes / 4; Index++) {

Use () around ... / ...

> +    MmioWrite32(Address + Index * 4, TemBuffer[Index]);
> +  }

I get the impression all of these live-coded 4 are in fact
sizeof (UINT32). So please use the actual expression instead.

It would be OK to use a local variable called something like
WriteSize and only do the sizeof once.

> +
> +  pSpiMasterProtocol->SpiSetConfig (0, 0x1, REG_FLUSH_REG);
> +
> +  pSpiMasterProtocol->SpiSetConfig (0, 0x0, REG_WR_CFG);
> +
> +  return EFI_SUCCESS;
> +}
> +
> +/**
> +  This function erased a sector of flash through spi driver.
> +
> +  @param[in] BlockAddress  The sector address to be erased.
> +
> +  @retval    None.
> +
> +**/
> +STATIC
> +inline void
> +NorFlashPlatformEraseSector (
> +  IN  UINTN BlockAddress
> +  )
> +{
> +  UINT8 Cmd_id = 0;

CmdId would be the appropriate name according to the coding style.
Also, it always gets assigned immediately, so no need for the = 0;

/
    Leif

> +
> +  Cmd_id = (UINT8)(mCmd_Pp & 0xff);
> +  pSpiMasterProtocol->SpiSetConfig (Cmd_id, 0x400000, REG_CMD_PORT);
> +  pSpiMasterProtocol->SpiSetConfig (0, 0x1, REG_LD_PORT);
> +
> +  Cmd_id = (UINT8)(mCmd_Eares & 0xff);
> +  pSpiMasterProtocol->SpiSetConfig (Cmd_id, 0x408000, REG_CMD_PORT);
> +  pSpiMasterProtocol->SpiSetConfig (0, BlockAddress, REG_ADDR_PORT);
> +  pSpiMasterProtocol->SpiSetConfig (0, 0x1, REG_LD_PORT);
> +
> +}
> +
> +
> +/**
> +  Fixup internal data so that EFI can be call in virtual mode.
> +  Call the passed in Child Notify event and convert any pointers in
> +  lib to virtual mode.
> +
> +  @param[in] Event   The Event that is being processed.
> +
> +  @param[in] Context Event Context.
> +
> +  @retval            None.
> +
> +**/
> +VOID
> +EFIAPI
> +PlatformNorFlashVirtualNotifyEvent (
> +  IN EFI_EVENT            Event,
> +  IN VOID                 *Context
> +  )
> +{
> +  EfiConvertPointer (0x0, (VOID **)&mNorFlashControlBase);
> +  EfiConvertPointer (0x0, (VOID**)&pSpiMasterProtocol->SpiGetConfig);
> +  EfiConvertPointer (0x0, (VOID**)&pSpiMasterProtocol->SpiSetConfig);
> +  EfiConvertPointer (0x0, (VOID**)&pSpiMasterProtocol);
> +}
> +
> +
> +/**
> +  This function inited the flash platform.
> +
> +  @param None.
> +
> +  @retval EFI_SUCCESS           NorFlashPlatformInitialization() is executed successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformInitialization (
> +  VOID
> +  )
> +{
> +
> +  mCmd_Write = 0x2;
> +  mCmd_Eares = 0xD8;
> +  mCmd_Pp =    0x6;
> +
> +  mNorFlashControlBase = FixedPcdGet64 (PcdSpiControllerBase);
> +
> +  return EFI_SUCCESS;
> +}
> +
> +
> +/**
> +  This function geted the flash device information.
> +
> +  @param[out] NorFlashDevices    the pointer to store flash device information.
> +  @param[out] Count              the number of the flash device.
> +
> +  @retval EFI_SUCCESS           NorFlashPlatformGetDevices() is executed successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformGetDevices (
> +  OUT NOR_FLASH_DEVICE_DESCRIPTION   *NorFlashDevices
> +  )
> +{
> +
> +  *NorFlashDevices = mNorFlashDevices;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +
> +/**
> +  This function readed flash content form the specified area of flash.
> +
> +  @param[in] Address             The address of the flash.
> +  @param[in] Buffer              The pointer of the Buffer to be stored.
> +  @param[out] Len                The bytes readed form flash.
> +
> +  @retval EFI_SUCCESS            NorFlashPlatformRead() is executed successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformRead (
> +  IN UINTN                Address,
> +  IN VOID                 *Buffer,
> +  OUT UINT32              Len
> +  )
> +{
> +
> +  DEBUG((DEBUG_BLKIO, "NorFlashPlatformRead: Address: 0x%lx Buffer:0x%p Len:0x%x\n", Address, Buffer, Len));
> +
> +  CopyMem ((VOID *)Buffer, (VOID *)Address, Len);
> +
> +  return EFI_SUCCESS;
> +}
> +
> +
> +/**
> +  This function erased one block flash content.
> +
> +  @param[in] BlockAddress        the BlockAddress to be erased.
> +
> +  @retval EFI_SUCCESS            NorFlashPlatformEraseSingleBlock() is executed successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformEraseSingleBlock (
> +  IN UINTN            BlockAddress
> +  )
> +{
> +
> +  NorFlashPlatformEraseSector (BlockAddress);
> +
> +  return EFI_SUCCESS;
> +}
> +
> +
> +/**
> +  This function erased the flash content of the specified area.
> +
> +  @param[in] Offset              the offset of the flash.
> +  @param[in] Length              length to be erased.
> +
> +  @retval EFI_SUCCESS            NorFlashPlatformErase() is executed successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformErase (
> +  IN UINT64                  Offset,
> +  IN UINT64                  Length
> +  )
> +{
> +  EFI_STATUS     Status;
> +  UINT64         Index;
> +  UINT64         Count;
> +
> +  Status = EFI_SUCCESS;
> +  if ((Length % SIZE_64KB) == 0) {
> +    Count = Length / SIZE_64KB;
> +    for (Index = 0; Index < Count; Index++) {
> +      NorFlashPlatformEraseSingleBlock (Offset);
> +      Offset += SIZE_64KB;
> +    }
> +  } else {
> +    Status = EFI_INVALID_PARAMETER;
> +  }
> +
> +  return Status;
> +}
> +
> +
> +/**
> +  This function writed data to flash.
> +
> +  @param[in] Address             the address of the flash.
> +
> +  @param[in] Buffer              the pointer of the Buffer to be writed.
> +
> +  @param[in] BufferSizeInBytes   the bytes of the Buffer.
> +
> +  @retval EFI_SUCCESS            NorFlashPlatformWrite() is executed successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformWrite (
> +  IN UINTN            Address,
> +  IN VOID             *Buffer,
> +  IN UINT32           BufferSizeInBytes
> +  )
> +{
> +  UINT32 Index;
> +  UINT32 Remainder;
> +  UINT32 Quotient;
> +  EFI_STATUS Status;
> +  UINTN TmpAddress;
> +
> +  Index = 0;
> +  Remainder = 0;
> +  Quotient = 0;
> +  TmpAddress = Address;
> +  Remainder  = BufferSizeInBytes % 256;
> +  Quotient   = BufferSizeInBytes / 256;
> +
> +  if(BufferSizeInBytes <= 256) {
> +    Status = NorFlashWrite256 (TmpAddress, Buffer, BufferSizeInBytes);
> +  } else {
> +    for(Index = 0; Index < Quotient; Index++) {
> +        Status = NorFlashWrite256 (TmpAddress, Buffer, 256);
> +        TmpAddress += 256;
> +        Buffer += 256;
> +    }
> +
> +    if(Remainder != 0) {
> +      Status = NorFlashWrite256 (TmpAddress, Buffer, Remainder);
> +    }
> +  }
> +
> +  if(EFI_ERROR (Status)) {
> +    ASSERT_EFI_ERROR (Status);
> +  }
> +
> +  return EFI_SUCCESS;
> +
> +}
> +
> +
> +/**
> +  This function inited the flash driver protocol.
> +
> +  @param[in] NorFlashProtocol    A pointer to the norflash protocol struct.
> +
> +  @retval EFI_SUCCESS       NorFlashPlatformInitProtocol() is executed successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformInitProtocol (
> +  IN EFI_NORFLASH_DRV_PROTOCOL *NorFlashProtocol
> +  )
> +{
> +  NorFlashProtocol->Initialization    = NorFlashPlatformInitialization;
> +  NorFlashProtocol->GetDevices        = NorFlashPlatformGetDevices;
> +  NorFlashProtocol->Erase             = NorFlashPlatformErase;
> +  NorFlashProtocol->EraseSingleBlock  = NorFlashPlatformEraseSingleBlock;
> +  NorFlashProtocol->Read              = NorFlashPlatformRead;
> +  NorFlashProtocol->Write             = NorFlashPlatformWrite;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +
> +/**
> +  This function is the entrypoint of the norflash driver.
> +
> +  @param[in] ImageHandle    The firmware allocated handle for the EFI image.
> +
> +  @param[in] SystemTable    A pointer to the EFI System Table.
> +
> +  @retval EFI_SUCCESS       The entry point is executed successfully.
> +
> +  @retval other             Some error occurs when executing this entry point.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +NorFlashPlatformEntryPoint (
> +  IN EFI_HANDLE         ImageHandle,
> +  IN EFI_SYSTEM_TABLE   *SystemTable
> +  )
> +{
> +  EFI_STATUS     Status;
> +
> +  Status = gBS->LocateProtocol (
> +    &gSpiMasterProtocolGuid,
> +    NULL,
> +    (VOID **)&pSpiMasterProtocol
> +  );
> +  if (EFI_ERROR (Status)) {
> +    return EFI_DEVICE_ERROR;
> +  }
> +
> +  flash_Instance = AllocateRuntimeZeroPool (sizeof (NorFlash_Device));
> +  if (flash_Instance == NULL) {
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  NorFlashPlatformInitProtocol (&flash_Instance->FlashProtocol);
> +
> +  flash_Instance->Signature = NORFLASH_SIGNATURE;
> +
> +  Status = gBS->InstallMultipleProtocolInterfaces (
> +                  &(flash_Instance->Handle),
> +                  &gSpiNorFlashProtocolGuid,
> +                  &(flash_Instance->FlashProtocol),
> +                  NULL
> +                  );
> +  ASSERT_EFI_ERROR(Status);
> +
> +  //Register for the virtual address change event
> +  Status = gBS->CreateEventEx (
> +                  EVT_NOTIFY_SIGNAL,
> +                  TPL_NOTIFY,
> +                  PlatformNorFlashVirtualNotifyEvent,
> +                  NULL,
> +                  &gEfiEventVirtualAddressChangeGuid,
> +                  &mSpiNorFlashVirtualAddrChangeEvent
> +                  );
> +  ASSERT_EFI_ERROR (Status);
> +
> +  return Status;
> +}
> +
> -- 
> 2.25.1
>