From: "Sami Mujawar" <sami.mujawar@arm.com>
To: <devel@edk2.groups.io>
Cc: Sami Mujawar <sami.mujawar@arm.com>, <ardb+tianocore@kernel.org>,
<thomas.abraham@arm.com>, <leif@nuviainc.com>,
<Matteo.Carlini@arm.com>, <Ben.Adderson@arm.com>, <nd@arm.com>
Subject: [PATCH edk2-platforms v1 04/12] Platform/ARM/VExpressPkg: Configure SMMUv3 for FVP RevC
Date: Fri, 12 Feb 2021 10:23:33 +0000 [thread overview]
Message-ID: <20210212102341.24056-5-sami.mujawar@arm.com> (raw)
In-Reply-To: <20210212102341.24056-1-sami.mujawar@arm.com>
Base Platform RevC is a configuration of the Base Platform
that includes a SMMUv3. TF-A configures the SMMUv3 to 'Abort
all incoming transactions in order to implement a default
deny policy on reset'. This prevents the firmware from using
the AHCI-SATA disk that is available as a PCIe device.
According to Server Base System Architecture (SBSA) 6.1,
Section A Level 3 - firmware, Sub-section A.1 Memory map,
'All Non-secure on-chip masters in a base server system
that are expected to be used by the platform firmware must
be capable of addressing all of the Non-secure address
space. If the master goes through a SMMU then the master
must be capable of addressing all of the Non-secure address
space even when the SMMU is off.'
Therefore, configure the SMMUv3 to set Non-secure streams
to bypass the SMMU. On firmware hand-off the OS is expected
to reconfigure the SMMU.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Platform/ARM/VExpressPkg/Drivers/ArmVExpressDxe/ArmFvpDxe.c | 110 +++++++++++++++++++-
Platform/ARM/VExpressPkg/Drivers/ArmVExpressDxe/ArmFvpDxe.inf | 4 +-
2 files changed, 112 insertions(+), 2 deletions(-)
diff --git a/Platform/ARM/VExpressPkg/Drivers/ArmVExpressDxe/ArmFvpDxe.c b/Platform/ARM/VExpressPkg/Drivers/ArmVExpressDxe/ArmFvpDxe.c
index 189069484b57533ce43bcdccb30c85c882fc7ffb..1f1dfd3de5b9aedc1515d55a15963df75a295326 100644
--- a/Platform/ARM/VExpressPkg/Drivers/ArmVExpressDxe/ArmFvpDxe.c
+++ b/Platform/ARM/VExpressPkg/Drivers/ArmVExpressDxe/ArmFvpDxe.c
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2013-2015, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2013-2021, Arm Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -11,6 +11,8 @@
#include <Library/ArmShellCmdLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/TimerLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/VirtioMmioDeviceLib.h>
@@ -18,6 +20,13 @@
#define ARM_FVP_BASE_VIRTIO_BLOCK_BASE 0x1c130000
+// SMMUv3 Global Bypass Attribute (GBPA) register offset.
+#define SMMU_GBPA 0x0044
+
+// SMMU_GBPA register fields.
+#define SMMU_GBPA_UPDATE BIT31
+#define SMMU_GBPA_ABORT BIT20
+
#pragma pack(1)
typedef struct {
VENDOR_DEVICE_PATH Vendor;
@@ -49,6 +58,92 @@ VIRTIO_BLK_DEVICE_PATH mVirtioBlockDevicePath =
};
/**
+ Poll the SMMU register and test the value based on the mask.
+
+ @param [in] SmmuReg Base address of the SMMU register.
+ @param [in] Mask Mask of register bits to monitor.
+ @param [in] Value Expected value.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_TIMEOUT Timeout.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+SmmuV3Poll (
+ IN UINT64 SmmuReg,
+ IN UINT32 Mask,
+ IN UINT32 Value
+ )
+{
+ UINT32 RegVal;
+ UINTN Count;
+
+ // Set 1ms timeout value.
+ Count = 10;
+ do {
+ RegVal = MmioRead32 (SmmuReg);
+ if ((RegVal & Mask) == Value) {
+ return EFI_SUCCESS;
+ }
+ MicroSecondDelay (100);
+ } while ((--Count) > 0);
+
+ DEBUG ((DEBUG_ERROR, "Timeout polling SMMUv3 register @%p\n", SmmuReg));
+ DEBUG ((
+ DEBUG_ERROR,
+ "Read value 0x%x, expected 0x%x\n",
+ RegVal,
+ ((Value == 0) ? (RegVal & ~Mask) : (RegVal | Mask))
+ ));
+ return EFI_TIMEOUT;
+}
+
+/**
+ Initialise the SMMUv3 to set Non-secure streams to bypass the SMMU.
+
+ @param [in] SmmuReg Base address of the SMMUv3.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_TIMEOUT Timeout.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+SmmuV3Init (
+ IN UINT64 SmmuBase
+ )
+{
+ EFI_STATUS Status;
+ UINT32 RegVal;
+
+ // Attribute update has completed when SMMU_(S)_GBPA.Update bit is 0.
+ Status = SmmuV3Poll (SmmuBase + SMMU_GBPA, SMMU_GBPA_UPDATE, 0);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // SMMU_(S)_CR0 resets to zero with all streams bypassing the SMMU,
+ // so just abort all incoming transactions.
+ RegVal = MmioRead32 (SmmuBase + SMMU_GBPA);
+
+ // TF-A configures the SMMUv3 to abort all incoming transactions.
+ // Clear the SMMU_GBPA.ABORT to allow Non-secure streams to bypass
+ // the SMMU.
+ RegVal &= ~SMMU_GBPA_ABORT;
+ RegVal |= SMMU_GBPA_UPDATE;
+
+ MmioWrite32 (SmmuBase + SMMU_GBPA, RegVal);
+
+ Status = SmmuV3Poll (SmmuBase + SMMU_GBPA, SMMU_GBPA_UPDATE, 0);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
* Generic UEFI Entrypoint for 'ArmFvpDxe' driver
* See UEFI specification for the details of the parameters
*/
@@ -60,6 +155,7 @@ ArmFvpInitialise (
)
{
EFI_STATUS Status;
+ UINT32 SysId;
Status = gBS->InstallProtocolInterface (&ImageHandle,
&gEfiDevicePathProtocolGuid, EFI_NATIVE_INTERFACE,
@@ -80,5 +176,17 @@ ArmFvpInitialise (
DEBUG ((EFI_D_ERROR, "ArmFvpDxe: Failed to install ShellDynCmdRunAxf\n"));
}
+ // If FVP RevC - Configure SMMUv3 to set NS transactions in bypass mode.
+ SysId = MmioRead32 (ARM_VE_SYS_ID_REG);
+ if ((SysId & ARM_FVP_SYS_ID_REV_MASK) == ARM_FVP_BASE_REVC_REV) {
+ Status = SmmuV3Init (FVP_REVC_SMMUV3_BASE);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ArmFvpDxe: Failed to initialise SMMUv3 in bypass mode.\n"
+ ));
+ }
+ }
+
return Status;
}
diff --git a/Platform/ARM/VExpressPkg/Drivers/ArmVExpressDxe/ArmFvpDxe.inf b/Platform/ARM/VExpressPkg/Drivers/ArmVExpressDxe/ArmFvpDxe.inf
index a4021c2d9e241845736eea428a479a4abddd6413..c5f41795310141ae9d7c175c26d5694590a0a08a 100644
--- a/Platform/ARM/VExpressPkg/Drivers/ArmVExpressDxe/ArmFvpDxe.inf
+++ b/Platform/ARM/VExpressPkg/Drivers/ArmVExpressDxe/ArmFvpDxe.inf
@@ -1,6 +1,6 @@
#/** @file
#
-# Copyright (c) 2013-2015, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2013-2021, Arm Ltd. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -28,6 +28,8 @@ [Packages]
[LibraryClasses]
ArmShellCmdRunAxfLib
BaseMemoryLib
+ IoLib
+ TimerLib
UefiDriverEntryPoint
UefiBootServicesTableLib
VirtioMmioDeviceLib
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
next prev parent reply other threads:[~2021-02-12 10:24 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-12 10:23 [PATCH edk2-platforms v1 00/12] Platform/ARM: Add support for FVP RevC Model Sami Mujawar
2021-02-12 10:23 ` [PATCH edk2-platforms v1 01/12] Platform/ARM/VExpressPkg: FVP RevC SysID.Rev defintion Sami Mujawar
2021-02-12 10:23 ` [PATCH edk2-platforms v1 02/12] Platform/ARM/VExpressPkg: Add PCIe Host Bridge lib for FVP Sami Mujawar
2021-02-12 10:23 ` [PATCH edk2-platforms v1 03/12] Platform/ARM/VExpressPkg: Memory map for FVP RevC model Sami Mujawar
2021-02-12 10:23 ` Sami Mujawar [this message]
2021-02-12 10:23 ` [PATCH edk2-platforms v1 05/12] Platform/ARM/VExpressPkg: Helper macro to map reference token Sami Mujawar
2021-02-12 10:23 ` [PATCH edk2-platforms v1 06/12] Platform/ARM/VExpressPkg: ACPI support for FVP RevC model Sami Mujawar
2021-02-12 10:23 ` [PATCH edk2-platforms v1 07/12] Platform/ARM/VExpressPkg: Add " Sami Mujawar
2021-02-12 10:23 ` [PATCH edk2-platforms v1 08/12] Platform/ARM/VExpressPkg: Update ACPI Revision to 6.3 Sami Mujawar
2021-02-12 10:23 ` [PATCH edk2-platforms v1 09/12] Platform/ARM/VExpressPkg: Add SMC91x device description Sami Mujawar
2021-02-12 10:23 ` [PATCH edk2-platforms v1 10/12] Platform/ARM/VExpressPkg: Add Virtio Block Device description Sami Mujawar
2021-02-12 10:23 ` [PATCH edk2-platforms v1 11/12] Platform/ARM/VExpressPkg: Make Dynamic Tables Framework default Sami Mujawar
2021-02-12 10:23 ` [PATCH edk2-platforms v1 12/12] Platform/ARM/VExpressPkg: Remove redundant traditional ACPI support Sami Mujawar
2021-02-13 10:26 ` [PATCH edk2-platforms v1 00/12] Platform/ARM: Add support for FVP RevC Model Ard Biesheuvel
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