From: "Vivek Kumar Gautam" <vivek.gautam@arm.com>
To: devel@edk2.groups.io
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>,
Leif Lindholm <leif@nuviainc.com>,
Sami Mujawar <sami.mujawar@arm.com>
Subject: [edk2-platforms][PATCH V1 0/2] Enable SMMUv3 for Arm SGI/RD platforms
Date: Mon, 15 Feb 2021 16:02:27 +0530 [thread overview]
Message-ID: <20210215103229.12310-1-vivek.gautam@arm.com> (raw)
Arm's SMMUv3 present in various SGI/RD platforms provides address
translation support for devices such as the ones present over PCIe.
SMMUv3 also supports Address Translation Service (ATS) and Page
Request Interface (PRI) to work with PCIe devices.
ATS allows PCIe devices to cache translation in their private
caches called as Address Translation Cache (ATC).
The ITS block present in the system accepts the downstream traffic
from SMMUv3 and provides the right interrupt translation for LPIs.
Thus, the overall topology looks like below -
--------------- ------------ ------------
| PCIe device |---->| SMMUv3 |---->| ITS |
| (RequesterID) | | (StreamID) | | (DeviceID) |
--------------- ------------ ------------
Vivek Gautam (2):
Platform/Sgi: Add smmu node in the iort acpi table
Platform/Sgi: Enable ATS mode over PCI root complex
Platform/ARM/SgiPkg/AcpiTables/Iort.aslc | 60 ++++++++++++++++++--
1 file changed, 55 insertions(+), 5 deletions(-)
--
2.17.1
next reply other threads:[~2021-02-15 10:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-15 10:32 Vivek Kumar Gautam [this message]
2021-02-15 10:32 ` [edk2-platforms][PATCH V1 1/2] Platform/Sgi: Add smmu node in the iort acpi table Vivek Kumar Gautam
2021-03-01 14:38 ` [edk2-devel] " Sami Mujawar
2021-03-05 13:05 ` Vivek Kumar Gautam
2021-02-15 10:32 ` [edk2-platforms][PATCH V1 2/2] Platform/Sgi: Enable ATS mode over PCI root complex Vivek Kumar Gautam
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