From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out30-131.freemail.mail.aliyun.com (out30-131.freemail.mail.aliyun.com [115.124.30.131]) by mx.groups.io with SMTP id smtpd.web12.6891.1614223949684775392 for ; Wed, 24 Feb 2021 19:32:30 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: linux.alibaba.com, ip: 115.124.30.131, mailfrom: huangming@linux.alibaba.com) X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R121e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=e01e04426;MF=huangming@linux.alibaba.com;NM=1;PH=DS;RN=5;SR=0;TI=SMTPD_---0UPVMN6Z_1614223933; Received: from 842effaa37a8.tbsite.net(mailfrom:huangming@linux.alibaba.com fp:SMTPD_---0UPVMN6Z_1614223933) by smtp.aliyun-inc.com(127.0.0.1); Thu, 25 Feb 2021 11:32:26 +0800 From: "Ming Huang" To: devel@edk2.groups.io, ardb+tianocore@kernel.org, leif@nuviainc.com Cc: guoheyi@linux.alibaba.com, Ming Huang Subject: [PATCH edk2 v2 2/2] ArmPkg/ArmGicLib: Fix GICR_IPRIORITYR address wrong issue Date: Thu, 25 Feb 2021 11:32:12 +0800 Message-Id: <20210225033212.2180-3-huangming@linux.alibaba.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210225033212.2180-1-huangming@linux.alibaba.com> References: <20210225033212.2180-1-huangming@linux.alibaba.com> The register address of GICR_IPRIORITYR is in SGI_base frame. Add IPRIORITY_ADDRESS macro for getting GICR_IPRIORITYR address. Otherwise GIC RAS error(Uncorrected software error) may report in ArmGicDxe. Signed-off-by: Ming Huang Reviewed-by: Leif Lindholm --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c index 5d04ed3dac..6b01c88206 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -30,6 +30,9 @@ #define ICENABLER_ADDRESS(base,offset) ((base) + \ ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + 4 * (offset)) +#define IPRIORITY_ADDRESS(base,offset) ((base) + \ + ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDIPR + 4 * (offset)) + /** * * Return whether the Source interrupt index refers to a shared interrupt (SPI) @@ -236,7 +239,7 @@ ArmGicSetInterruptPriority ( } MmioAndThenOr32 ( - GicCpuRedistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset), + IPRIORITY_ADDRESS (GicCpuRedistributorBase, RegOffset), ~(0xff << RegShift), Priority << RegShift ); -- 2.17.1