From: "Sheng Wei" <w.sheng@intel.com>
To: devel@edk2.groups.io
Cc: Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <gaoliming@byosoft.com.cn>,
Zhiguang Liu <zhiguang.liu@intel.com>,
Jiewen Yao <jiewen.yao@intel.com>
Subject: [PATCH v6 1/3] MdePkg/Include: Add CET instructions to Nasm.inc
Date: Fri, 26 Feb 2021 16:03:14 +0800 [thread overview]
Message-ID: <20210226080316.13724-2-w.sheng@intel.com> (raw)
In-Reply-To: <20210226080316.13724-1-w.sheng@intel.com>
This is to add instruction SAVEPREVSSP, CLRSSBSY and RSTORSSP_RAX in Nasm.
The open CI is using NASM 2.14.02.
CET instructions are supported since NASM 2.15.01.
DB-encoded CET instructions need to be removed after open CI update to
NASM 2.15.01.
The BZ ticket is https://bugzilla.tianocore.org/show_bug.cgi?id=3227 .
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3192
Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
---
MdePkg/Include/Ia32/Nasm.inc | 12 ++++++++++++
MdePkg/Include/X64/Nasm.inc | 12 ++++++++++++
2 files changed, 24 insertions(+)
diff --git a/MdePkg/Include/Ia32/Nasm.inc b/MdePkg/Include/Ia32/Nasm.inc
index 31ce861f1e..fa42f9d3e9 100644
--- a/MdePkg/Include/Ia32/Nasm.inc
+++ b/MdePkg/Include/Ia32/Nasm.inc
@@ -9,6 +9,18 @@
;
;------------------------------------------------------------------------------
+%macro SAVEPREVSSP 0
+ DB 0xF3, 0x0F, 0x01, 0xEA
+%endmacro
+
+%macro CLRSSBSY_EAX 0
+ DB 0x67, 0xF3, 0x0F, 0xAE, 0x30
+%endmacro
+
+%macro RSTORSSP_EAX 0
+ DB 0x67, 0xF3, 0x0F, 0x01, 0x28
+%endmacro
+
%macro SETSSBSY 0
DB 0xF3, 0x0F, 0x01, 0xE8
%endmacro
diff --git a/MdePkg/Include/X64/Nasm.inc b/MdePkg/Include/X64/Nasm.inc
index 42412735ea..e57a803c81 100644
--- a/MdePkg/Include/X64/Nasm.inc
+++ b/MdePkg/Include/X64/Nasm.inc
@@ -9,6 +9,18 @@
;
;------------------------------------------------------------------------------
+%macro SAVEPREVSSP 0
+ DB 0xF3, 0x0F, 0x01, 0xEA
+%endmacro
+
+%macro CLRSSBSY_RAX 0
+ DB 0xF3, 0x0F, 0xAE, 0x30
+%endmacro
+
+%macro RSTORSSP_RAX 0
+ DB 0xF3, 0x0F, 0x01, 0x28
+%endmacro
+
%macro SETSSBSY 0
DB 0xF3, 0x0F, 0x01, 0xE8
%endmacro
--
2.16.2.windows.1
next prev parent reply other threads:[~2021-02-26 8:04 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-26 8:03 [PATCH v6 0/3] Fix CET shadow stack token busy bit clear issue Sheng Wei
2021-02-26 8:03 ` Sheng Wei [this message]
2021-02-26 8:03 ` [PATCH v6 2/3] UefiCpuPkg/CpuExceptionHandlerLib: Clear CET shadow stack token busy bit Sheng Wei
2021-03-01 6:54 ` Ni, Ray
2021-02-26 8:03 ` [PATCH v6 3/3] UefiCpuPkg/PiSmmCpuDxeSmm: Fix SMM stack offset is not correct Sheng Wei
2021-02-26 12:21 ` Yao, Jiewen
2021-03-01 5:01 ` Ni, Ray
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