From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f179.google.com (mail-pl1-f179.google.com [209.85.214.179]) by mx.groups.io with SMTP id smtpd.web08.3521.1614753898356724492 for ; Tue, 02 Mar 2021 22:44:58 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=vViPm6ti; spf=pass (domain: linaro.org, ip: 209.85.214.179, mailfrom: masahisa.kojima@linaro.org) Received: by mail-pl1-f179.google.com with SMTP id d8so3070353plg.10 for ; Tue, 02 Mar 2021 22:44:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HW26oAKBdBsfa8e0i124ftR0fPW83nvY9qZPqsXR0n0=; b=vViPm6tifAUe1FYQpzSOYMLRCV5Nxn1sos+lYWf47IwYpiVRyPgZ2XWr2xt95LVfXe 2j2vMU4rsXZPFEvj9/jiljIbchchR3ndtuniFcHMW9y33II2bm1S/osTdQNs+bPKg/vd S0wTVdZT0G9et2ju3l22Foq+SaSDjYnBFcy77fQkGJfwJTOLhy0XmjSKhEwI6gPFzYLS ylJshXbkOCw7yBCo405BMmHC0OZgNFHRPiDii6JUMleiJI5bXHh9+blgX+GZz/P9w2tg zRf6TI2N2h6O026Abw7xR7fEi9OSUg2sbrJHA6/VINoSeWqLsjBWF0lBszeRYsL/Mr6t o+Tg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HW26oAKBdBsfa8e0i124ftR0fPW83nvY9qZPqsXR0n0=; b=CDtBrWVsFLp9TEuuqc1cJVqO8DrYLLMN8hM4fmZFAYsBsO7RmduTHOpA43K6rF2CeI C12frX7eyVNRN3vCtfRW03kPrcywTXoIwclhgI22JvPSRTE8GtUIHOM6Poop/my5Eddo Scmqc9aqweXeamaK7qT+9coAWHwHBLU/hZkIgDTk9qi4LboHpx6Yltm7fqmHP4X22MZo RSu7/yLUH2uU801n/zLNw9n4VJxt/56h3GWs3B+6FB7o0covFfqS2KjtCdcleSX6iURj x4RiJJ+fVkpBPfQbePHuHlT7QlOJPCy30G+P2Q7qPtVgHX+jS5kZoE1P7mxj9xm3Nb7H 0Q+Q== X-Gm-Message-State: AOAM5328lqmrjkJRttgSTryfkWbLkvhA5cvsrI7M+EngKV6vsDguF27Z MhP3Wm5TzZB8miE+ShrJjjy/O/P7Lt2ROA== X-Google-Smtp-Source: ABdhPJytXK2YSxQrrpCIwG5MyHoA+8DWni+COG91Qpd2m5M963gnl6uBMDTtTaLPKUCJr98dGTq6tQ== X-Received: by 2002:a17:90a:950b:: with SMTP id t11mr2746205pjo.176.1614753897782; Tue, 02 Mar 2021 22:44:57 -0800 (PST) Return-Path: Received: from localhost.localdomain ([2400:2411:502:a100:82fa:5bff:fe4b:26b1]) by smtp.gmail.com with ESMTPSA id ms21sm5809240pjb.5.2021.03.02.22.44.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 22:44:57 -0800 (PST) From: "Masahisa Kojima" To: devel@edk2.groups.io Cc: Masahisa Kojima , Ard Biesheuvel , Leif Lindholm , Graeme Gregory , Radoslaw Biernacki , Shashi Mallela Subject: [PATCH edk2-platforms v3 1/4] SbsaQemu: Build infrastructure for StandaloneMm image Date: Wed, 3 Mar 2021 15:47:44 +0900 Message-Id: <20210303064747.27312-2-masahisa.kojima@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210303064747.27312-1-masahisa.kojima@linaro.org> References: <20210303064747.27312-1-masahisa.kojima@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add the build infrastructure for compilation of StandaloneMm image. SbsaQemu.fdf is modified to extend the FLASH0 region enough big to contain StandaloneMM image(BL32). Signed-off-by: Masahisa Kojima --- Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.dsc | 132 ++++++++++++++++++++ Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 6 +- Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.fdf | 93 ++++++++++++++ 3 files changed, 228 insertions(+), 3 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.dsc b/Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.dsc new file mode 100644 index 000000000000..87f5ee351eaa --- /dev/null +++ b/Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.dsc @@ -0,0 +1,132 @@ +# +# Copyright (c) 2020, Linaro Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines] + PLATFORM_NAME = SbsaQemuStandaloneMm + PLATFORM_GUID = A64CC0F5-7ACD-4975-BBE7-7EF6739C8668 + PLATFORM_VERSION = 1.0 + DSC_SPECIFICATION = 0x00010011 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = DEBUG|RELEASE|NOOPT + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.fdf + DEFINE DEBUG_MESSAGE = TRUE + + # LzmaF86 + DEFINE COMPRESSION_TOOL_GUID = D42AE6BD-1352-4bfb-909A-CA72A6EAE889 + +################################################################################ +# +# Library Class section - list of all Library Classes needed by this Platform. +# +################################################################################ +[LibraryClasses] + # + # Basic + # + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf + DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf + ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf + FvLib|StandaloneMmPkg/Library/FvLib/FvLib.inf + HobLib|StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf + MemLib|StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf + MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmCoreMemoryAllocationLib/StandaloneMmCoreMemoryAllocationLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf + + # + # Entry point + # + StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf + + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf + StandaloneMmMmuLib|ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf + ArmSvcLib|ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf + CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf + PeCoffExtraActionLib|StandaloneMmPkg/Library/StandaloneMmPeCoffExtraActionLib/StandaloneMmPeCoffExtraActionLib.inf + + # ARM PL011 UART Driver + PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf + PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf + SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf + + StandaloneMmCoreEntryPoint|StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf + + # + # It is not possible to prevent the ARM compiler for generic intrinsic functions. + # This library provides the instrinsic functions generate by a given compiler. + # And NULL mean link this library into all ARM images. + # + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf + +[LibraryClasses.common.MM_STANDALONE] + HobLib|StandaloneMmPkg/Library/StandaloneMmHobLib/StandaloneMmHobLib.inf + MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.inf + MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAllocationLib/StandaloneMmMemoryAllocationLib.inf + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################ +[PcdsFixedAtBuild] + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800000CF + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xff + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x0f + + ## PL011 - Serial Terminal + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x60040000 + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 + + gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x2 + +################################################################################################### +# +# Components Section - list of the modules and components that will be processed by compilation +# tools and the EDK II tools to generate PE32/PE32+/Coff image files. +# +# Note: The EDK II DSC file is not used to specify how compiled binary images get placed +# into firmware volume images. This section is just a list of modules to compile from +# source into UEFI-compliant binaries. +# It is the FDF file that contains information on combining binary files into firmware +# volume images, whose concept is beyond UEFI and is described in PI specification. +# Binary modules do not need to be listed in this section, as they should be +# specified in the FDF file. For example: Shell binary (Shell_Full.efi), FAT binary (Fat.efi), +# Logo (Logo.bmp), and etc. +# There may also be modules listed in this section that are not required in the FDF file, +# When a module listed here is excluded from FDF file, then UEFI-compliant binary will be +# generated for it, but the binary will not be put into any firmware volume. +# +################################################################################################### +[Components.common] + # + # MM Core + # + StandaloneMmPkg/Core/StandaloneMmCore.inf + StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf + +################################################################################################### +# +# BuildOptions Section - Define the module specific tool chain flags that should be used as +# the default flags for a module. These flags are appended to any +# standard flags that are defined by the build process. They can be +# applied for any modules or only those modules with the specific +# module style (EDK or EDKII) specified in [Components] section. +# +################################################################################################### +[BuildOptions.AARCH64] + GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -march=armv8-a+nofp diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf index c35e3ed44054..b61ae1891233 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf @@ -21,10 +21,10 @@ [FD.SBSA_FLASH0] BaseAddress = 0x00000000 -Size = 0x00200000 +Size = 0x00400000 ErasePolarity = 1 BlockSize = 0x00001000 -NumBlocks = 0x200 +NumBlocks = 0x400 ################################################################################ # @@ -47,7 +47,7 @@ [FD.SBSA_FLASH0] FILE = Platform/Qemu/Sbsa/bl1.bin # and FIP (BL2 + BL31) -0x00008000|0x00020000 +0x00008000|0x00300000 FILE = Platform/Qemu/Sbsa/fip.bin ################################################################################ diff --git a/Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.fdf b/Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.fdf new file mode 100644 index 000000000000..a1acefcfb0a7 --- /dev/null +++ b/Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.fdf @@ -0,0 +1,93 @@ +# +# Copyright (c) 2020, Linaro Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + +[FD.STANDALONE_MM] +BaseAddress = 0x20001000|gArmTokenSpaceGuid.PcdFdBaseAddress +Size = 0x00e00000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (14MiB). +ErasePolarity = 1 + +BlockSize = 0x00001000 +NumBlocks = 0x0e00 + +0x00000000|0x00280000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + +[FV.FVMAIN_COMPACT] +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF StandaloneMmPkg/Core/StandaloneMmCore.inf + INF StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf + +################################################################################ +# +# Rules are use with the [FV] section's module INF type to define +# how an FFS file is created for a given INF file. The following Rule are the default +# rules for the different module type. User can add the customized rules to define the +# content of the FFS file. +# +################################################################################ + + +############################################################################ +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # +############################################################################ +# +#[Rule.Common.DXE_DRIVER] +# FILE DRIVER = $(NAMED_GUID) { +# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex +# COMPRESS PI_STD { +# GUIDED { +# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi +# UI STRING="$(MODULE_NAME)" Optional +# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) +# } +# } +# } +# +############################################################################ + +[Rule.Common.MM_CORE_STANDALONE] + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED { + PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi + } + +[Rule.Common.MM_STANDALONE] + FILE MM_STANDALONE = $(NAMED_GUID) { + SMM_DEPEX SMM_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } -- 2.17.1