From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.11574.1614950070833990708 for ; Fri, 05 Mar 2021 05:14:30 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: vivek.gautam@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7FDAB31B; Fri, 5 Mar 2021 05:14:25 -0800 (PST) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D32FF3F73B; Fri, 5 Mar 2021 05:14:23 -0800 (PST) From: "Vivek Kumar Gautam" To: devel@edk2.groups.io Cc: ardb+tianocore@kernel.org, leif@nuviainc.com, Sami.Mujawar@arm.com, Vivek.Gautam@arm.com Subject: [edk2-platforms][PATCH V2 0/2] Enable SMMUv3 for Arm SGI/RD platforms Date: Fri, 5 Mar 2021 18:44:17 +0530 Message-Id: <20210305131419.24069-1-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Arm's SMMUv3 present in various SGI/RD platforms provides address translation support for devices such as the ones present over PCIe. SMMUv3 also supports Address Translation Service (ATS) and Page Request Interface (PRI) to work with PCIe devices. ATS allows PCIe devices to request translation from a translation agent such as SMMU, and then cache these translation in their private cache called as Address Translation Cache (ATC). Devices that support PRI can also enable the feature when ATS is enabled as ATS is a prerequisite for PRI. The I/O topology on SGI/RD platforms includes I/O devices (or PCIe devices) connected to a SMMU-v3, and an GIC ITS block that facilitates interrupt translations for message signaled interrupts. A typical view of this topology is as below - --------------- ------------ ------------ | PCIe device |---->| SMMUv3 |---->| ITS | | (RequesterID) | | (StreamID) | | (DeviceID) | --------------- ------------ ------------ This patch series adds the SMMU-v3 node in iort table, and sets up the connection between these iort nodes to forward the traffic in the right manner. Changes since v1: - Addressed review comments given by Sami: - Replaced __builtin_offsetof() with OFFSET_OF() as suggested by Sami. - Updated the commit message for patches. Vivek Gautam (2): Platform/Sgi: Add smmu-v3 node in the iort acpi table Platform/Sgi: Enable ATS mode over PCI root complex Platform/ARM/SgiPkg/AcpiTables/Iort.aslc | 60 ++++++++++++++++++-- 1 file changed, 55 insertions(+), 5 deletions(-) --=20 2.17.1