From: "Shashi Mallela" <shashi.mallela@linaro.org>
To: leif@nuviainc.com, ardb+tianocore@kernel.org, graeme@nuviainc.com
Cc: devel@edk2.groups.io
Subject: [PATCH v1 0/2] Add GIC ITS entry to MADT
Date: Thu, 11 Mar 2021 19:59:14 -0500 [thread overview]
Message-ID: <20210312005916.43919-1-shashi.mallela@linaro.org> (raw)
This patchset implements ACPI MADT functionality extension to include
the GICv3 ITS functionality. This enables devices to use message
signalled LPI interrupts in addition to SPIs,PPIs supported on ARM
SBSA reference qemu platforms.
Shashi Mallela (2):
Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define GICv3 ITS base address
Silicon/Qemu: Update MADT with GICv3 ITS info
Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 3 +++
Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 +++
Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 2 ++
Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 2 ++
Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h | 10 ++++++++++
Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 10 +++++++++-
6 files changed, 29 insertions(+), 1 deletion(-)
--
2.27.0
next reply other threads:[~2021-03-12 0:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-12 0:59 Shashi Mallela [this message]
2021-03-12 0:59 ` [PATCH v1 1/2] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define GICv3 ITS base address Shashi Mallela
2021-03-12 0:59 ` [PATCH v1 2/2] Silicon/Qemu: Update MADT with GICv3 ITS info Shashi Mallela
2021-05-11 15:47 ` [edk2-devel] [PATCH v1 0/2] Add GIC ITS entry to MADT Shashi Mallela
-- strict thread matches above, loose matches on Subject: below --
2021-03-11 20:19 Shashi Mallela
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