From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from zg8tmty1ljiyny4xntqumjca.icoremail.net (zg8tmty1ljiyny4xntqumjca.icoremail.net [165.227.154.27]) by mx.groups.io with SMTP id smtpd.web11.6652.1615546924573950238 for ; Fri, 12 Mar 2021 03:02:05 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: phytium.com.cn, ip: 165.227.154.27, mailfrom: jialing@phytium.com.cn) Received: from localhost.localdomain (unknown [223.104.131.160]) by c1app4 (Coremail) with SMTP id BAINCgC3mwEVSktgMY01BQ--.34795S6; Fri, 12 Mar 2021 19:02:00 +0800 (CST) From: Ling Jia To: devel@edk2.groups.io Cc: Leif Lindholm , Peng Xie , Yiqi Shu , Ling Jia Subject: [PATCH v3 16/46] Silicon/Phytium: Added SMBIOS support to FT2000/4 Date: Fri, 12 Mar 2021 19:01:24 +0800 Message-Id: <20210312110141.75749-5-jialing@phytium.com.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210312110141.75749-1-jialing@phytium.com.cn> References: <20210312110141.75749-1-jialing@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: BAINCgC3mwEVSktgMY01BQ--.34795S6 X-Coremail-Antispam: 1UD129KBjvAXoWfXr1ftw45Ar17ZFykAw4Dtwb_yoW5JF15Go W7Wa1fJayFgrW8Zw47CrZ7Gr48ZF4I9w43tr9FyFyfZF4qv3y3KryUWa45ZrZIk3yjg398 C348J3s5JrW0vFW8n29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYM7AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r126s0DM28Irc Ia0xkI8VCY1x0267AKxVW5JVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l 84ACjcxK6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26F4j6r 4UJwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26rxl 6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6x IIjxv20xvE14v26r106r15McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_ Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxkIecxEwVAFwVW8Kw CF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j 6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64 vIr41lIxAIcVC0I7IYx2IY67AKxVWUCVW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_ Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0x vEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUm38nUUUUU= X-Originating-IP: [223.104.131.160] X-CM-SenderInfo: xmldzxdqj61x51wl3zoofrzhdfq/ Content-Transfer-Encoding: quoted-printable This driver installs SMBIOS information for FT2000/4. Signed-off-by: Ling Jia Reviewed-by: Leif Lindholm --- Platform/Phytium/DurianPkg/DurianPkg.dsc = | 6 + Platform/Phytium/DurianPkg/DurianPkg.fdf = | 6 + Silicon/Phytium/FT2000-4Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.in= f | 47 + Silicon/Phytium/FT2000-4Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c = | 943 ++++++++++++++++++++ 4 files changed, 1002 insertions(+) diff --git a/Platform/Phytium/DurianPkg/DurianPkg.dsc b/Platform/Phytium/Du= rianPkg/DurianPkg.dsc index 6f38acb6361c..28e52e15e393 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.dsc +++ b/Platform/Phytium/DurianPkg/DurianPkg.dsc @@ -286,6 +286,12 @@ [Components.common] Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/AcpiTables.inf=0D Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe= .inf=0D =0D + #=0D + # SMBIOS=0D + #=0D + MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf=0D + Silicon/Phytium/FT2000-4Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.= inf=0D +=0D #=0D # Bds=0D #=0D diff --git a/Platform/Phytium/DurianPkg/DurianPkg.fdf b/Platform/Phytium/Du= rianPkg/DurianPkg.fdf index f435f7cb51c2..3106a43fb744 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.fdf +++ b/Platform/Phytium/DurianPkg/DurianPkg.fdf @@ -178,6 +178,12 @@ [FV.FvMain] #=0D INF ShellPkg/Application/Shell/Shell.inf=0D =0D + #=0D + # SMBIOS=0D + #=0D + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf=0D + INF Silicon/Phytium/FT2000-4Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatform= Dxe.inf=0D +=0D #=0D # Bds=0D #=0D diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SmbiosPlatformDxe/SmbiosPl= atformDxe.inf b/Silicon/Phytium/FT2000-4Pkg/Drivers/SmbiosPlatformDxe/Smbio= sPlatformDxe.inf new file mode 100644 index 000000000000..69a021e04823 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformD= xe.inf @@ -0,0 +1,47 @@ +#/** @file=0D +# This driver installs SMBIOS information for Phytium.=0D +#=0D +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#**/=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x0001001b=0D + BASE_NAME =3D SmbiosPlatformDxe=0D + FILE_GUID =3D d64f09f8-40dc-11eb-9be6-f7a038f956ba= =0D + MODULE_TYPE =3D DXE_DRIVER=0D + VERSION_STRING =3D 1.0=0D + ENTRY_POINT =3D SmbiosTablePublishEntry=0D +=0D +#=0D +# The following information is for reference only and not required by the = build tools.=0D +#=0D +# VALID_ARCHITECTURES =3D AARCH64=0D +#=0D +[Sources]=0D + SmbiosPlatformDxe.c=0D +=0D +[Packages]=0D + ArmPkg/ArmPkg.dec=0D + MdeModulePkg/MdeModulePkg.dec=0D + MdePkg/MdePkg.dec=0D + Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec=0D +=0D +[LibraryClasses]=0D + DebugLib=0D + IoLib=0D + UefiBootServicesTableLib=0D + UefiDriverEntryPoint=0D +=0D +[Guids]=0D + gEfiGlobalVariableGuid=0D +=0D +[Protocols]=0D + gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED=0D +=0D +[Guids]=0D +=0D +[Depex]=0D + gEfiSmbiosProtocolGuid=0D diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SmbiosPlatformDxe/SmbiosPl= atformDxe.c b/Silicon/Phytium/FT2000-4Pkg/Drivers/SmbiosPlatformDxe/SmbiosP= latformDxe.c new file mode 100644 index 000000000000..4a1f77dfb2a6 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformD= xe.c @@ -0,0 +1,943 @@ +/** @file=0D + This driver installs SMBIOS information for Phytium Durian platforms.=0D +=0D + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
= =0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +=0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +// SMBIOS tables often reference each other using=0D +// fixed constants, define a list of these constants=0D +// for our hardcoded tables=0D +=0D +#define TYPE0_STRINGS \=0D + "PHYTIUM LTD\0" /* Vendor */ \=0D + "V1.0\0" /* BiosVersion */ \=0D + __DATE__"\0" /* BiosReleaseDate */=0D +=0D +#define TYPE1_STRINGS \=0D + "PHYTIUM LTD\0" /* Manufacturer */ \=0D + "Phytium Durian Development Platform\0" /* Product Name */ \=0D + "None\0" /* Version */ \=0D + "Not Set\0" /* SerialNumber */ \=0D + "Not set\0" /* SKUNumber */ \=0D + "FT-2000/4\0" /* Family */ \=0D +=0D +#define TYPE2_STRINGS \=0D + "PHYTIUM LTD\0" /* Manufacturer */ \=0D + "Phytium Durian Development Platform\0" /* Product Name */ \=0D + "None\0" /* Version */ \=0D + "Not Set\0" /* Serial */ \=0D + "Not Set\0" /* BaseBoardAssetTag */ \=0D + "Not Set\0" /* BaseBoardChassisLocation */=0D +=0D +#define TYPE3_STRINGS \=0D + "PHYTIUM LTD\0" /* Manufacturer */ \=0D + "None\0" /* Version */ \=0D + "Not Set\0" /* Serial */ \=0D + "Not Set\0" /* AssetTag */=0D +=0D +#define TYPE4_STRINGS \= =0D + "FT-2000/4\0" /* socket type */ \= =0D + "PHYTIUM LTD\0" /* manufactuer */ \= =0D + "FT-2000/4\0" /* processor version */ \= =0D + "Not Set\0" /* SerialNumber */ \= =0D + "Not Set\0" /* processor 2 description */ \= =0D + "Not Set\0" /* AssetTag */=0D +=0D +=0D +#define TYPE7_STRINGS \=0D + "L1 Instruction\0" /* L1I */ \=0D + "L1 Data\0" /* L1D */ \=0D + "L2\0" /* L2 */=0D +=0D +#define TYPE7_L1DATA_STRINGS \=0D + "L1 Data Cache\0" /* L1 data */=0D +=0D +=0D +#define TYPE7_L1INS_STRINGS \=0D + "L1 Instruction Cache\0" /* L1 ins */=0D +=0D +#define TYPE7_L2_STRINGS \=0D + "L2 Cache\0" /* L2 */=0D +=0D +#define TYPE7_L3_STRINGS \=0D + "L3 Cache\0" /* L3 */=0D +=0D +=0D +#define TYPE9_STRINGS \=0D + "PCIE_SLOT0\0" /* Slot0 */ \=0D + "PCIE_SLOT1\0" /* Slot1 */ \=0D + "PCIE_SLOT2\0" /* Slot2 */ \=0D + "PCIE_SLOT3\0" /* Slot3 */=0D +=0D +#define TYPE9_STRINGS_PCIE0X16 \=0D + "PCIE0_X16\0"=0D +=0D +#define TYPE9_STRINGS_PCIE0X1 \=0D + "PCIE0_X1\0"=0D +=0D +#define TYPE9_STRINGS_PCIE1X16 \=0D + "PCIE1_X16\0"=0D +=0D +#define TYPE9_STRINGS_PCIE1X1 \=0D + "PCIE1_X1\0"=0D +=0D +#define TYPE13_STRINGS \=0D + "en|US|iso8859-1\0" \=0D + "zh|CN|unicode\0"=0D +=0D +=0D +#define TYPE16_STRINGS \=0D + "\0" /* nothing */=0D +=0D +#define TYPE17_STRINGS_CHANNEL0 \=0D + "SOCKET 0 CHANNEL 0 DIMM 0\0" /* location */ \=0D + "Bank0\0" /* bank description */ \=0D + "Not Set\0" \=0D + "Not Set\0" \=0D + "Not Set\0" \=0D + "Not Set\0"=0D +=0D +#define TYPE17_STRINGS_CHANNEL1 \=0D + "SOCKET 0 CHANNEL 1 DIMM 0\0" /* location */ \=0D + "Bank0\0" \=0D + "Not Set\0" \=0D + "Not Set\0" \=0D + "Not Set\0" \=0D + "Not Set\0"=0D +=0D +=0D +#define TYPE19_STRINGS \=0D + "\0" /* nothing */=0D +=0D +#define TYPE32_STRINGS \=0D + "\0" /* nothing */=0D +=0D +#define TYPE39_STRINGS \=0D + "Not specified\0" /* not specified*/ \=0D + "Not specified\0" /* not specified*/ \=0D + "Not specified\0" /* not specified*/ \=0D + "Not specified\0" /* not specified*/ \=0D + "Not specified\0" /* not specified*/ \=0D + "Not specified\0" /* not specified*/ \=0D + "Not specified\0" /* not specified*/=0D +=0D +#define TYPE38_STRINGS \=0D + "\0"=0D +=0D +//=0D +// Type definition and contents of the default SMBIOS table.=0D +// This table covers only the minimum structures required by=0D +// the SMBIOS specification (section 6.2, version 3.0)=0D +//=0D +#pragma pack(1)=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE0 Base;=0D + INT8 Strings[sizeof (TYPE0_STRINGS)];=0D +} ARM_TYPE0;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE1 Base;=0D + UINT8 Strings[sizeof (TYPE1_STRINGS)];=0D +} ARM_TYPE1;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE2 Base;=0D + UINT8 Strings[sizeof (TYPE2_STRINGS)];=0D +} ARM_TYPE2;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE3 Base;=0D + UINT8 Strings[sizeof (TYPE3_STRINGS)];=0D +} ARM_TYPE3;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE4 Base;=0D + UINT8 Strings[sizeof (TYPE4_STRINGS)];=0D +} ARM_TYPE4;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE7 Base;=0D + UINT8 Strings[sizeof (TYPE7_L1DATA_STRINGS)];=0D +} ARM_TYPE7_L1DATA;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE7 Base;=0D + UINT8 Strings[sizeof (TYPE7_L1INS_STRINGS)];=0D +} ARM_TYPE7_L1INS;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE7 Base;=0D + UINT8 Strings[sizeof (TYPE7_L2_STRINGS)];=0D +} ARM_TYPE7_L2;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE7 Base;=0D + UINT8 Strings[sizeof (TYPE7_L3_STRINGS)];=0D +} ARM_TYPE7_L3;=0D +=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE9 Base;=0D + UINT8 Strings[sizeof (TYPE9_STRINGS)];=0D +} ARM_TYPE9;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE9 Base;=0D + UINT8 Strings[sizeof (TYPE9_STRINGS_PCIE0X16)];=0D +} ARM_TYPE9_PCIE0X16;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE9 Base;=0D + UINT8 Strings[sizeof (TYPE9_STRINGS_PCIE0X1)];=0D +} ARM_TYPE9_PCIE0X1;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE9 Base;=0D + UINT8 Strings[sizeof (TYPE9_STRINGS_PCIE1X16)];=0D +} ARM_TYPE9_PCIE1X16;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE9 Base;=0D + UINT8 Strings[sizeof (TYPE9_STRINGS_PCIE1X1)];=0D +} ARM_TYPE9_PCIE1X1;=0D +=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE13 Base;=0D + UINT8 Strings[sizeof (TYPE13_STRINGS)];=0D +} ARM_TYPE13;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE16 Base;=0D + UINT8 Strings[sizeof (TYPE16_STRINGS)];=0D +} ARM_TYPE16;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE17 Base;=0D + UINT8 Strings[sizeof (TYPE17_STRINGS_CHANNEL0)];=0D +} ARM_TYPE17_CHANNEL0;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE17 Base;=0D + UINT8 Strings[sizeof (TYPE17_STRINGS_CHANNEL1)];=0D +} ARM_TYPE17_CHANNEL1;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE19 Base;=0D + UINT8 Strings[sizeof (TYPE19_STRINGS)];=0D +} ARM_TYPE19;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE32 Base;=0D + UINT8 Strings[sizeof (TYPE32_STRINGS)];=0D +} ARM_TYPE32;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE38 Base;=0D + UINT8 Strings[sizeof (TYPE38_STRINGS)];=0D +} ARM_TYPE38;=0D +=0D +typedef struct {=0D + SMBIOS_TABLE_TYPE39 Base;=0D + UINT8 Strings[sizeof (TYPE39_STRINGS)];=0D +} ARM_TYPE39;=0D +=0D +enum SMBIOS_REFRENCE_HANDLES {=0D + SMBIOS_HANDLE_L1I =3D 0x1000,=0D + SMBIOS_HANDLE_L1D,=0D + SMBIOS_HANDLE_L2,=0D + SMBIOS_HANDLE_L3,=0D + SMBIOS_HANDLE_MOTHERBOARD,=0D + SMBIOS_HANDLE_CHASSIS,=0D + SMBIOS_HANDLE_CLUSTER,=0D + SMBIOS_HANDLE_MEMORY,=0D + SMBIOS_HANDLE_DIMM_0,=0D + SMBIOS_HANDLE_DIMM_1=0D +};=0D +=0D +#define SERIAL_LEN 10 //this must be less than the buffer len allocated i= n the type1 structure=0D +=0D +#pragma pack()=0D +=0D +//BIOS Information (Type 0)=0D +ARM_TYPE0 BiosInfo_Type0 =3D {=0D + {=0D + { // SMBIOS_STRUCTURE Hdr=0D + EFI_SMBIOS_TYPE_BIOS_INFORMATION, // UINT8 Type=0D + sizeof (SMBIOS_TABLE_TYPE0), // UINT8 Length=0D + SMBIOS_HANDLE_PI_RESERVED=0D + },=0D + 1, //Vendor=0D + 2, //BiosVersion=0D + 0x8800, //BiosSegment=0D + 3, //BiosReleaseDate=0D + 0xFF, //BiosSize=0D + { //BiosCharacteristics=0D + 0, // Reserved = :2=0D + 0, // Unknown = :1=0D + 0, // BiosCharacteristicsN= otSupported :1=0D + 0, // IsaIsSupported = :1=0D + 0, // McaIsSupported = :1=0D + 0, // EisaIsSupported = :1=0D + 1, // PciIsSupported = :1=0D + 0, // PcmciaIsSupported = :1=0D + 0, // PlugAndPlayIsSupport= ed :1=0D + 0, // ApmIsSupported = :1=0D + 1, // BiosIsUpgradable = :1=0D + 0, // BiosShadowingAllowed= :1=0D + 0, // VlVesaIsSupported = :1=0D + 0, // EscdSupportIsAvailab= le :1=0D + 1, // BootFromCdIsSupporte= d :1=0D + 1, // SelectableBootIsSupp= orted :1=0D + 0, // RomBiosIsSocketed = :1=0D + 0, // BootFromPcmciaIsSupp= orted :1=0D + 0, // EDDSpecificationIsSu= pported :1=0D + 0, // JapaneseNecFloppyIsS= upported :1=0D + 0, // JapaneseToshibaFlopp= yIsSupported :1=0D + 0, // Floppy525_360IsSuppo= rted :1=0D + 0, // Floppy525_12IsSuppor= ted :1=0D + 0, // Floppy35_720IsSuppor= ted :1=0D + 0, // Floppy35_288IsSuppor= ted :1=0D + 0, // PrintScreenIsSupport= ed :1=0D + 0, // Keyboard8042IsSuppor= ted :1=0D + 0, // SerialIsSupported = :1=0D + 0, // PrinterIsSupported = :1=0D + 0, // CgaMonoIsSupported = :1=0D + 0, // NecPc98 = :1=0D + 0 // ReservedForVendor = :3=0D + },=0D + {=0D + 0x03, //BIOSCharacteristicsEx= tensionBytes[0]=0D + 0x0D //BIOSCharacteristicsEx= tensionBytes[1]=0D + },=0D + 0xFF, //SystemBiosMajorReleas= e;=0D + 0xFF, //SystemBiosMinorReleas= e;=0D + 0xFF, //EmbeddedControllerFir= mwareMajorRelease;=0D + 0xFF, //EmbeddedControllerFir= mwareMinorRelease;=0D + },=0D + TYPE0_STRINGS=0D +};=0D +=0D +//System Information (Type 1).=0D +ARM_TYPE1 SystemInfo_Type1 =3D {=0D + {=0D + { // Hdr=0D + EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, // Type,=0D + sizeof (SMBIOS_TABLE_TYPE1), // UINT8 Length=0D + SMBIOS_HANDLE_PI_RESERVED // Handle=0D + },=0D + 1, // Manufacturer=0D + 2, // ProductName=0D + 3, // Version=0D + 4, // SerialNumber=0D + { // Uuid=0D + 0x12345678, 0x1234, 0x5678, {0x90, 0xab, 0xcd, 0xde, 0xef, 0xaa,= 0xbb, 0xcc}=0D + },=0D + SystemWakeupTypePowerSwitch, // SystemWakeupType= =0D + 5, // SKUNumber,=0D + 6 // Family=0D + },=0D + TYPE1_STRINGS=0D +};=0D +=0D +//Base Board (or Module) Information (Type 2)=0D +ARM_TYPE2 BaseboardInfo_Type2 =3D {=0D + {=0D + { // Hdr=0D + EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, // Type,=0D + sizeof (SMBIOS_TABLE_TYPE2), // UINT8 Len= gth=0D + SMBIOS_HANDLE_MOTHERBOARD // Handle=0D + },=0D + 1, // BaseBoard= Manufacturer=0D + 2, // BaseBoard= ProductName=0D + 3, // BaseBoard= Version=0D + 4, // BaseBoard= SerialNumber=0D + 5, // BaseBoard= AssetTag=0D + { // FeatureFl= ag=0D + 1, // Motherboa= rd :1=0D + 0, // RequiresD= aughterCard :1=0D + 0, // Removable= :1=0D + 1, // Replaceab= le :1=0D + 0, // HotSwappa= ble :1=0D + 0 // Reserved = :3=0D + },=0D + 6, // BaseBoard= ChassisLocation=0D + 0, // ChassisHa= ndle;=0D + BaseBoardTypeMotherBoard, // BoardType= ;=0D + 0, // NumberOfC= ontainedObjectHandles;=0D + {=0D + 0=0D + } // Contained= ObjectHandles[1];=0D + },=0D + TYPE2_STRINGS=0D +};=0D +=0D +//System Enclosure or Chassis (Type 3)=0D +ARM_TYPE3 SystemEnclosure_Type3 =3D {=0D + {=0D + { // Hdr=0D + EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE , // Type,=0D + sizeof (SMBIOS_TABLE_TYPE3), // UINT8 Len= gth=0D + SMBIOS_HANDLE_CHASSIS // Handle=0D + },=0D + 1, // Manufactr= urer=0D + MiscChassisTypeMainServerChassis, // Type=0D + 2, // Version=0D + 3, // SerialNum= ber=0D + 4, // AssetTag= =0D + ChassisStateSafe, // BootupSta= te=0D + ChassisStateSafe, // PowerSupp= lyState=0D + ChassisStateSafe, // ThermalSt= ate=0D + ChassisSecurityStatusNone, // SecurityS= tate=0D + {=0D + 0, // OemDefine= d[0]=0D + 0, // OemDefine= d[1]=0D + 0, // OemDefine= d[2]=0D + 0 // OemDefine= d[3]=0D + },=0D + 2, // Height=0D + 1, // NumberofP= owerCords=0D + 0, // Contained= ElementCount=0D + 0, // Contained= ElementRecordLength=0D + { // Contained= Elements[0]=0D + {=0D + 0, // Contained= ElementType=0D + 0, // Contained= ElementMinimum=0D + 0 // Contained= ElementMaximum=0D + }=0D + }=0D + },=0D + TYPE3_STRINGS=0D +};=0D +=0D +//Processor Infomation (Type 4)=0D +ARM_TYPE4 ProcessorInfo_Type4 =3D {=0D + {=0D + { //Header=0D + EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, //Type=0D + sizeof (SMBIOS_TABLE_TYPE4), //Length=0D + SMBIOS_HANDLE_CLUSTER //Handle=0D + },=0D + 1, //Socket=0D + CentralProcessor, //ProcessorType=0D + ProcessorFamilyIndicatorFamily2, //ProcessorFamily=0D + 2, //ProcessorManufacture=0D + { //ProcessorId=0D + { //Signature=0D + 0=0D + },=0D + { //FeatureFlags=0D + 0=0D + }=0D + },=0D + 3, //ProcessorVersion=0D + { //Voltage=0D + 0, 0, 0, 1, 0, 1=0D + },=0D + 1, //ExternalClock=0D + 1, //MaxSpeed=0D + 0, //CurrentSpeed=0D + 0x41, //Status=0D + ProcessorUpgradeUnknown, //ProcessorUpgrade=0D + SMBIOS_HANDLE_L1D, //L1Ins=0D + SMBIOS_HANDLE_L2, //L1Data=0D + SMBIOS_HANDLE_L3, //L2=0D + 4, //SerialNumber=0D + 5, //AssetTag=0D + 6, //PartNumber=0D +=0D + 4, //CoreCount=0D + 0, //EnabledCoreCount=0D + 0, //ThreadCount=0D + 0x00EC, //ProcessorCharacteristics= =0D +=0D + ProcessorFamilyARMv8, //ProcessorFamily2=0D +=0D + 0, //CoreCount2=0D + 0, //EnabledCoreCount2=0D + 0 //ThreadCount2=0D + },=0D + TYPE4_STRINGS=0D +};=0D +=0D +//Cache Information (Type7) L1 DATA=0D +ARM_TYPE7_L1DATA L1Data_Type7 =3D {=0D + {=0D + { //Header=0D + EFI_SMBIOS_TYPE_CACHE_INFORMATION, //Type=0D + sizeof (SMBIOS_TABLE_TYPE7), //Length=0D + SMBIOS_HANDLE_L1D //Handle=0D + },=0D + 1, //SocketDesignation=0D + 0x0180, //CacheConfiguration=0D + 0, //MaximumCacheSize=0D + 0, //InstalledSize=0D + { //SupportedSRAMType=0D + 0, 0, 0, 0, 0, 1, 0, 0=0D + },=0D + { //CurrentSRAMType=0D + 0, 0, 0, 0, 0, 1, 0, 0=0D + },=0D + 0, //CacheSpeed=0D + CacheErrorSingleBit, //ErrorCorrectionType= =0D + CacheTypeData, //SystemCacheType=0D + CacheAssociativity8Way, //Associativity=0D + 128,=0D + 128=0D + },=0D + TYPE7_L1DATA_STRINGS=0D +};=0D +=0D +//Cache Information (Type7) L1 INS=0D +ARM_TYPE7_L1INS L1Ins_Type7 =3D {=0D + {=0D + { //Header=0D + EFI_SMBIOS_TYPE_CACHE_INFORMATION, //Type=0D + sizeof (SMBIOS_TABLE_TYPE7), //Length=0D + SMBIOS_HANDLE_L1I //Handle=0D + },=0D + 1, //SocketDesignation=0D + 0x0180, //CacheConfiguration=0D + 0, //MaximumCacheSize=0D + 0, //InstalledSize=0D + { //SupportedSRAMType=0D + 0, 0, 0, 0, 0, 1, 0, 0=0D + },=0D + { //CurrentSRAMType=0D + 0, 0, 0, 0, 0, 1, 0, 0=0D + },=0D + 0, //CacheSpeed=0D + CacheErrorParity, //ErrorCorrectionType= =0D + CacheTypeInstruction, //SystemCacheType=0D + CacheAssociativity8Way, //Associativity=0D + 128,=0D + 128=0D + },=0D + TYPE7_L1INS_STRINGS=0D +};=0D +=0D +//Cache Information (Type7) L2=0D +ARM_TYPE7_L2 L2_Type7 =3D {=0D + {=0D + { //Header=0D + EFI_SMBIOS_TYPE_CACHE_INFORMATION, //Type=0D + sizeof (SMBIOS_TABLE_TYPE7), //Length=0D + SMBIOS_HANDLE_L2 //Handle=0D + },=0D + 1, //SocketDesignation=0D + 0x0281, //CacheConfiguration=0D + 0, //MaximumCacheSize=0D + 0, //InstalledSize=0D + { //SupportedSRAMType=0D + 0, 0, 0, 0, 0, 1, 0, 0=0D + },=0D + { //CurrentSRAMType=0D + 0, 0, 0, 0, 0, 1, 0, 0=0D + },=0D + 0, //CacheSpeed=0D + CacheErrorSingleBit, //ErrorCorrectionType= =0D + CacheTypeUnified, //SystemCacheType=0D + CacheAssociativity8Way, //Associativity=0D + 4096,=0D + 4096=0D + },=0D + TYPE7_L2_STRINGS=0D +};=0D +=0D +//Cache Information (Type7) L3=0D +ARM_TYPE7_L3 L3_Type7 =3D {=0D + {=0D + { //Header=0D + EFI_SMBIOS_TYPE_CACHE_INFORMATION, //Type=0D + sizeof (SMBIOS_TABLE_TYPE7), //Length=0D + SMBIOS_HANDLE_L3 //Handle=0D + },=0D + 1, //SocketDesignation=0D + 0x0281, //CacheConfiguration=0D + 0, //MaximumCacheSize=0D + 0, //InstalledSize=0D + { //SupportedSRAMType=0D + 0, 0, 0, 0, 0, 1, 0, 0=0D + },=0D + { //CurrentSRAMType=0D + 0, 0, 0, 0, 0, 1, 0, 0=0D + },=0D + 0, //CacheSpeed=0D + CacheErrorSingleBit, //ErrorCorrectionType= =0D + CacheTypeUnified, //SystemCacheType=0D + CacheAssociativity8Way, //Associativity=0D + 4096,=0D + 4096=0D + },=0D + TYPE7_L3_STRINGS=0D +};=0D +=0D +//PCIE0_X16 (Type 9)=0D +ARM_TYPE9_PCIE0X16 Pcie0X16_Type9 =3D {=0D + {=0D + { // SMBIOS_STRUCTURE Hdr=0D + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type=0D + sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length=0D + SMBIOS_HANDLE_PI_RESERVED=0D + },=0D + 1,=0D + SlotTypePciX,=0D + SlotDataBusWidth16X,=0D + SlotUsageInUse,=0D + SlotLengthLong,=0D + 0,=0D + {0, 0, 1, 1, 0, 0, 0, 0}, //unknown=0D + {1, 0, 0, 0, 0}, //PME and SMBUS=0D + 0,=0D + 0,=0D + 0,=0D + },=0D + TYPE9_STRINGS_PCIE0X16=0D +};=0D +=0D +//PCIE0_X1 (Type 9)=0D +ARM_TYPE9_PCIE0X1 Pcie0X1_Type9 =3D {=0D + {=0D + { // SMBIOS_STRUCTURE Hdr=0D + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type=0D + sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length=0D + SMBIOS_HANDLE_PI_RESERVED=0D + },=0D + 1,=0D + SlotTypePciX,=0D + SlotDataBusWidth1X,=0D + SlotUsageAvailable,=0D + SlotLengthShort,=0D + 1,=0D + {0, 0, 1, 1, 0, 0, 0, 0}, //unknown=0D + {1, 0, 0, 0, 0}, //PME and SMBUS=0D + 0xFF,=0D + 0xFF,=0D + 0xFF,=0D + },=0D + TYPE9_STRINGS_PCIE0X1=0D +};=0D +=0D +//PCIE1_X16 (Type 9)=0D +ARM_TYPE9_PCIE1X16 Pcie1X16_Type9 =3D {=0D + {=0D + { // SMBIOS_STRUCTURE Hdr=0D + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type=0D + sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length=0D + SMBIOS_HANDLE_PI_RESERVED=0D + },=0D + 1,=0D + SlotTypePciX,=0D + SlotDataBusWidth16X,=0D + SlotUsageAvailable,=0D + SlotLengthLong,=0D + 2,=0D + {0, 0, 1, 1, 0, 0, 0, 0}, //unknown=0D + {1, 0, 0, 0, 0}, //PME and SMBUS=0D + 0xFF,=0D + 0xFF,=0D + 0xFF,=0D + },=0D + TYPE9_STRINGS_PCIE1X16=0D +};=0D +=0D +//PCIE1_X1 (Type 9)=0D +ARM_TYPE9_PCIE1X1 Pcie1X1_Type9 =3D {=0D + {=0D + { // SMBIOS_STRUCTURE Hdr=0D + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type=0D + sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length=0D + SMBIOS_HANDLE_PI_RESERVED=0D + },=0D + 1,=0D + SlotTypePciX,=0D + SlotDataBusWidth1X,=0D + SlotUsageAvailable,=0D + SlotLengthShort,=0D + 3,=0D + {0, 0, 1, 1, 0, 0, 0, 0}, //unknown=0D + {1, 0, 0, 0, 0}, //PME and SMBUS=0D + 0xFF,=0D + 0xFF,=0D + 0xFF,=0D + },=0D + TYPE9_STRINGS_PCIE1X1=0D +};=0D +=0D +//Bios Language Information (Type13)=0D +ARM_TYPE13 BiosLangInfo_Type13 =3D {=0D + {=0D + { // SMBIOS_STRUCTURE Hdr=0D + EFI_SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION, // UINT8 Type=0D + sizeof (SMBIOS_TABLE_TYPE13), // UINT8 Length=0D + SMBIOS_HANDLE_PI_RESERVED=0D + },=0D + 2,=0D + 0,=0D + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},=0D + 2=0D + },=0D + TYPE13_STRINGS=0D +};=0D +=0D +//Physical Memory Array (Type 16)=0D +ARM_TYPE16 MemArray_Type16 =3D {=0D + {=0D + { // SMBIOS_STRUCTURE Hdr=0D + EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, // UINT8 Type=0D + sizeof (SMBIOS_TABLE_TYPE16), // UINT8 Length=0D + SMBIOS_HANDLE_MEMORY=0D + },=0D + MemoryArrayLocationSystemBoard,=0D + MemoryArrayUseSystemMemory,=0D + MemoryErrorCorrectionNone,=0D + 0x1000000, //16G=0D + 0xFFFE,=0D + 2=0D + },=0D + TYPE16_STRINGS=0D +};=0D +=0D +//Memory Device (Type17)=0D +ARM_TYPE17_CHANNEL0 MemDev_Type17_0 =3D {=0D + {=0D + { // SMBIOS_STRUCTURE Hdr=0D + EFI_SMBIOS_TYPE_MEMORY_DEVICE, // UINT8 Type=0D + sizeof (SMBIOS_TABLE_TYPE17), // UINT8 Length=0D + SMBIOS_HANDLE_DIMM_0=0D + },=0D + SMBIOS_HANDLE_MEMORY, //array to which this module belongs=0D + 0xFFFE, //no errors=0D + 64, //single DIMM, no ECC is 64bits (for ecc this wo= uld be 72)=0D + 64, //data width of this device (64-bits)=0D + 0x4000, //16GB=0D + 0x09, //FormFactor=0D + 0, //not part of a set=0D + 1, //right side of board=0D + 2, //bank 0=0D + MemoryTypeDdr4, //LP DDR4=0D + {0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, //unbuffered=0D + 2400, //2400Mhz DDR=0D + 3, //Manufacturer=0D + 4, //serial=0D + 5, //asset tag=0D + 6, //part number=0D + 0, //attrbute=0D + 0x2000, // 8G=0D + 2400, //2400MHz=0D + 1500, //Max V=0D + 1500, //Max V=0D + 1500, //Configure V=0D + },=0D + TYPE17_STRINGS_CHANNEL0=0D +};=0D +=0D +//Memory Device (Type17)=0D +ARM_TYPE17_CHANNEL1 MemDev_Type17_1 =3D {=0D + {=0D + { // SMBIOS_STRUCTURE Hdr=0D + EFI_SMBIOS_TYPE_MEMORY_DEVICE, // UINT8 Type=0D + sizeof (SMBIOS_TABLE_TYPE17), // UINT8 Length=0D + SMBIOS_HANDLE_DIMM_1=0D + },=0D + SMBIOS_HANDLE_MEMORY, //array to which this module belongs=0D + 0xFFFE, //no errors=0D + 64, //single DIMM, no ECC is 64bits (for ecc this wo= uld be 72)=0D + 64, //data width of this device (64-bits)=0D + 0x2000, //8GB=0D + 0x09, //FormFactor=0D + 0, //not part of a set=0D + 1, //right side of board=0D + 2, //bank 0=0D + MemoryTypeDdr4, //LP DDR4=0D + {0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, //unbuffered=0D + 2400, //2400Mhz DDR=0D + 3, //varies between diffrent production runs=0D + 4, //serial=0D + 5, //asset tag=0D + 6, //part number=0D + 0, //attrbute=0D + 0x4000, // 16G=0D + 2400, //2400MHz=0D + 1500, //Max V=0D + 1500, //Max V=0D + 1500, //Configure V=0D + },=0D + TYPE17_STRINGS_CHANNEL1=0D +};=0D +=0D +//Memory Array Mapped Address (Type 19)=0D +ARM_TYPE19 MemArrayMapAddr_Type19 =3D {=0D + {=0D + { // SMBIOS_STRUCTURE Hdr=0D + EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, // UINT8 Type=0D + sizeof (SMBIOS_TABLE_TYPE19), // UINT8 Length=0D + SMBIOS_HANDLE_PI_RESERVED=0D + },=0D + 0,=0D + 0x1000000, //16G=0D + SMBIOS_HANDLE_MEMORY, //handle=0D + 2,=0D + 0, //starting addr of first 2GB=0D + 0, //ending addr of first 2GB=0D + },=0D + TYPE19_STRINGS=0D +};=0D +=0D +//System Boot Information (Type 32)=0D +ARM_TYPE32 SystemBoot_Type32 =3D {=0D + {=0D + {=0D + EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, // Type,=0D + sizeof (SMBIOS_TABLE_TYPE32), // UINT8 Length=0D + SMBIOS_HANDLE_PI_RESERVED=0D + },=0D + { // Reserved[6]=0D + 0,=0D + 0,=0D + 0,=0D + 0,=0D + 0,=0D + 0=0D + },=0D + BootInformationStatusNoError // BootInformationSta= tus=0D + },=0D + TYPE32_STRINGS=0D +};=0D +=0D +VOID *DefaultCommonTables[]=3D=0D +{=0D + &BiosInfo_Type0,=0D + &SystemInfo_Type1,=0D + &BaseboardInfo_Type2,=0D + &SystemEnclosure_Type3,=0D + &ProcessorInfo_Type4,=0D + &L1Data_Type7,=0D + &L1Ins_Type7,=0D + &L2_Type7,=0D + &L3_Type7,=0D + &Pcie0X16_Type9,=0D + &Pcie0X1_Type9,=0D + &Pcie1X16_Type9,=0D + &Pcie1X1_Type9,=0D + &MemArray_Type16,=0D + &MemDev_Type17_0,=0D + &MemDev_Type17_1,=0D + &MemArrayMapAddr_Type19,=0D + &BiosLangInfo_Type13,=0D + &SystemBoot_Type32,=0D + NULL=0D +};=0D +=0D +=0D +/**=0D + Installed a whole table worth of structructures.=0D +=0D + @param[in] Smbios The Pointer of Smbios Protocol.=0D +=0D + @retval EFI_SUCCESS Table data successfully installed.=0D + @retval Other Table data was not installed.=0D +=0D +**/=0D +EFI_STATUS=0D +InstallStructures (=0D + IN EFI_SMBIOS_PROTOCOL *Smbios,=0D + IN VOID *DefaultTables[]=0D + )=0D +{=0D + EFI_STATUS Status;=0D + EFI_SMBIOS_HANDLE SmbiosHandle;=0D + UINT32 TableEntry;=0D +=0D + Status =3D EFI_SUCCESS;=0D +=0D + for ( TableEntry =3D0; DefaultTables[TableEntry] !=3D NULL; TableEntry++= )=0D + {=0D + SmbiosHandle =3D ((EFI_SMBIOS_TABLE_HEADER *)DefaultTables[TableEntry]= )->Handle;=0D + Status =3D Smbios->Add (=0D + Smbios,=0D + NULL,=0D + &SmbiosHandle,=0D + (EFI_SMBIOS_TABLE_HEADER *) DefaultTables[TableEntry]=0D + );=0D + if (EFI_ERROR (Status))=0D + break;=0D + }=0D +=0D + return Status;=0D +}=0D +=0D +=0D +/**=0D + Installed All SMBIOS information.=0D +=0D + @param[in] Smbios The Pointer of Smbios Protocol.=0D +=0D + @retval EFI_SUCCESS SMBIOS information successfully installed.=0D + @retval Other SMBIOS information was not installed.=0D +=0D +**/=0D +STATIC=0D +EFI_STATUS=0D +InstallAllStructures (=0D + IN EFI_SMBIOS_PROTOCOL *Smbios=0D + )=0D +{=0D + EFI_STATUS Status;=0D +=0D + Status =3D EFI_SUCCESS;=0D +=0D + Status =3D InstallStructures (Smbios, DefaultCommonTables);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D + return Status;=0D +}=0D +=0D +=0D +/**=0D + Find the smbios protocol and installed SMBIOS information=0D + for ARM platforms.=0D +=0D + @param[in] ImageHandle Module's image handle.=0D + @param[in] SystemTable Pointer of EFI_SYSTEM_TABLE.=0D +=0D + @retval EFI_SUCCESS Smbios data successfully installed.=0D + @retval Other Smbios data was not installed.=0D +=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +SmbiosTablePublishEntry (=0D + IN EFI_HANDLE ImageHandle,=0D + IN EFI_SYSTEM_TABLE *SystemTable=0D + )=0D +{=0D + EFI_STATUS Status;=0D + EFI_SMBIOS_PROTOCOL *Smbios;=0D +=0D + //=0D + // Find the SMBIOS protocol=0D + //=0D + Status =3D gBS->LocateProtocol (=0D + &gEfiSmbiosProtocolGuid,=0D + NULL,=0D + (VOID **)&Smbios=0D + );=0D + if (EFI_ERROR (Status)) {=0D + return Status;=0D + }=0D +=0D + Status =3D InstallAllStructures (Smbios);=0D +=0D + return Status;=0D +}=0D --=20 2.25.1