From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06.intel.com []) by mx.groups.io with SMTP id smtpd.web10.4830.1615979210659892135 for ; Wed, 17 Mar 2021 04:06:51 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: ray.ni@intel.com) IronPort-SDR: wih1w/1StN/CcmPe2VtArrvrsoYnLK5sc7fi7bPPohom5vIQcbX/po5KtzIu6rpECXAd5uSbDD /4OrT/LLNpXw== X-IronPort-AV: E=McAfee;i="6000,8403,9925"; a="250798772" X-IronPort-AV: E=Sophos;i="5.81,256,1610438400"; d="scan'208";a="250798772" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Mar 2021 04:06:50 -0700 IronPort-SDR: /GKPw7GmkpKCKTnNpGt0MfC1xqM/Wo8OUxgFLvH1pSUkcJ8lUWmfS1YbxplwuFvMfHnhfXNH2X yoh2GgGInVNA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,256,1610438400"; d="scan'208";a="379244608" Received: from ray-dev.ccr.corp.intel.com ([10.239.158.87]) by fmsmga007.fm.intel.com with ESMTP; 17 Mar 2021 04:06:49 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Laszlo Ersek , Rahul Kumar Subject: [PATCH v2 1/2] UefiCpuPkg/CpuDxe: Rename variables to follow EDKII coding standard Date: Wed, 17 Mar 2021 19:06:39 +0800 Message-Id: <20210317110640.489-2-ray.ni@intel.com> X-Mailer: git-send-email 2.27.0.windows.1 In-Reply-To: <20210317110640.489-1-ray.ni@intel.com> References: <20210317110640.489-1-ray.ni@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable The change doesn't impact any functionality. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Laszlo Ersek Cc: Rahul Kumar --- UefiCpuPkg/CpuDxe/CpuGdt.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/UefiCpuPkg/CpuDxe/CpuGdt.c b/UefiCpuPkg/CpuDxe/CpuGdt.c index a1ab543f2d..8847bc4819 100644 --- a/UefiCpuPkg/CpuDxe/CpuGdt.c +++ b/UefiCpuPkg/CpuDxe/CpuGdt.c @@ -2,7 +2,7 @@ C based implementation of IA32 interrupt handling only=0D requiring a minimal assembly interrupt entry point.=0D =0D - Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
=0D + Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D @@ -13,7 +13,7 @@ //=0D // Global descriptor table (GDT) Template=0D //=0D -STATIC GDT_ENTRIES GdtTemplate =3D {=0D +STATIC GDT_ENTRIES mGdtTemplate =3D {=0D //=0D // NULL_SEL=0D //=0D @@ -124,27 +124,27 @@ InitGlobalDescriptorTable ( VOID=0D )=0D {=0D - GDT_ENTRIES *gdt;=0D - IA32_DESCRIPTOR gdtPtr;=0D + GDT_ENTRIES *Gdt;=0D + IA32_DESCRIPTOR Gdtr;=0D =0D //=0D // Allocate Runtime Data for the GDT=0D //=0D - gdt =3D AllocateRuntimePool (sizeof (GdtTemplate) + 8);=0D - ASSERT (gdt !=3D NULL);=0D - gdt =3D ALIGN_POINTER (gdt, 8);=0D + Gdt =3D AllocateRuntimePool (sizeof (mGdtTemplate) + 8);=0D + ASSERT (Gdt !=3D NULL);=0D + Gdt =3D ALIGN_POINTER (Gdt, 8);=0D =0D //=0D // Initialize all GDT entries=0D //=0D - CopyMem (gdt, &GdtTemplate, sizeof (GdtTemplate));=0D + CopyMem (Gdt, &mGdtTemplate, sizeof (mGdtTemplate));=0D =0D //=0D // Write GDT register=0D //=0D - gdtPtr.Base =3D (UINT32)(UINTN)(VOID*) gdt;=0D - gdtPtr.Limit =3D (UINT16) (sizeof (GdtTemplate) - 1);=0D - AsmWriteGdtr (&gdtPtr);=0D + Gdtr.Base =3D (UINT32) (UINTN) Gdt;=0D + Gdtr.Limit =3D (UINT16) (sizeof (mGdtTemplate) - 1);=0D + AsmWriteGdtr (&Gdtr);=0D =0D //=0D // Update selector (segment) registers base on new GDT=0D @@ -152,4 +152,3 @@ InitGlobalDescriptorTable ( SetCodeSelector ((UINT16)CPU_CODE_SEL);=0D SetDataSelectors ((UINT16)CPU_DATA_SEL);=0D }=0D -=0D --=20 2.27.0.windows.1