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charset=UTF-8 Content-Transfer-Encoding: quoted-printable CpuPause() might allow the CPU to go into a lower power state state while we spin. On X86, CpuPause() executes a PAUSE instruction which the Intel and AMD specs describe as follows: Intel: "PAUSE: An additional function of the PAUSE instruction is to reduce the power consumed by a processor while executing a spin loop. A processor can execute a spin-wait loop extremely quickly, causing the processor to consume a lot of power while it waits for the resource it is spinning on to become available. Inserting a pause instruction in a spin-wait loop greatly reduces the processor=E2=80=99s power consumptio= n." AMD: "PAUSE: Improves the performance of spin loops, by providing a hint to the processor that the current code is in a spin loop. The processor may use this to optimize power consumption while in the spin loop. Architecturally, this instruction behaves like a NOP instruction." On RISC-V and ARM64, CpuPause() executes a NOP, which is no worse than the tight loop we have. Cc: Liming Gao Signed-off-by: Ankur Arora Reviewed-by: Michael D Kinney Reviewed-by: Laszlo Ersek --- MdePkg/Library/BaseLib/CpuDeadLoop.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/MdePkg/Library/BaseLib/CpuDeadLoop.c b/MdePkg/Library/BaseLi= b/CpuDeadLoop.c index 9e110cacbc96..3cd304351a65 100644 --- a/MdePkg/Library/BaseLib/CpuDeadLoop.c +++ b/MdePkg/Library/BaseLib/CpuDeadLoop.c @@ -28,5 +28,7 @@ CpuDeadLoop ( { volatile UINTN Index; =20 - for (Index =3D 0; Index =3D=3D 0;); + for (Index =3D 0; Index =3D=3D 0;) { + CpuPause(); + } } --=20 2.9.3