From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com []) by mx.groups.io with SMTP id smtpd.web09.9593.1616400620369990095 for ; Mon, 22 Mar 2021 01:10:44 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: dandan.bi@intel.com) IronPort-SDR: y7d6eVsiljGc0uHs0Wxl7sIA9Eux06hfVxWnd/LKHgL4j4H4dT4eZmnqbECvGPxpfSbb+VK0rg YlPLheoC7s1A== X-IronPort-AV: E=McAfee;i="6000,8403,9930"; a="210288698" X-IronPort-AV: E=Sophos;i="5.81,268,1610438400"; d="scan'208";a="210288698" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2021 01:10:43 -0700 IronPort-SDR: Fqg7/my1iKNIo3VqjBlGEIgRmB5XIoYbFk7yMoLo751L85XpmOTe1KmyozfW3WJMSDMd3YZlz+ oftLjA1ZBGHw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,268,1610438400"; d="scan'208";a="375616777" Received: from shwdeopenpsi114.ccr.corp.intel.com ([10.239.154.141]) by orsmga006.jf.intel.com with ESMTP; 22 Mar 2021 01:10:42 -0700 From: "Dandan Bi" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Zhiguang Liu Subject: [patch V2 28/29] MdePkg/IoLib: Filter/trace port IO/MMIO access Date: Mon, 22 Mar 2021 16:09:40 +0800 Message-Id: <20210322080941.6780-29-dandan.bi@intel.com> X-Mailer: git-send-email 2.18.0.windows.1 In-Reply-To: <20210322080941.6780-1-dandan.bi@intel.com> References: <20210322080941.6780-1-dandan.bi@intel.com> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3246 Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Dandan Bi --- .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 3 +- .../BaseIoLibIntrinsicArmVirt.inf | 3 +- .../BaseIoLibIntrinsicInternal.h | 3 +- .../BaseIoLibIntrinsicSev.inf | 3 +- MdePkg/Library/BaseIoLibIntrinsic/IoLib.c | 95 ++++++++++++++----- .../Library/BaseIoLibIntrinsic/IoLibArmVirt.c | 82 ++++++++++++++-- MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c | 58 +++++++++-- MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c | 81 ++++++++++++---- MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c | 74 +++++++++++++-- 9 files changed, 329 insertions(+), 73 deletions(-) diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf index 690b95d440..97eeada065 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf @@ -5,11 +5,11 @@ # for IA-32 and x64. On IPF, I/O port requests are translated into MMIO requests. # MMIO requests are forwarded directly to memory. For EBC, I/O port requests # ASSERT(). For ARM, AARCH64 and RISCV64, this I/O library only provides non I/O # read and write. # -# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -64,6 +64,7 @@ [Packages] MdePkg/MdePkg.dec [LibraryClasses] DebugLib BaseLib + RegisterFilterLib diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf index ad68f841fb..cea6857926 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf @@ -1,9 +1,9 @@ ## @file # Instance of I/O Library using KVM/ARM safe assembler routines # -# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.
+# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# Copyright (c) 2018, Linaro, Ltd. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -42,5 +42,6 @@ [Packages] MdePkg/MdePkg.dec [LibraryClasses] DebugLib BaseLib + RegisterFilterLib diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h index 1aae45fa8a..79b2eb3e7b 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicInternal.h @@ -1,11 +1,11 @@ /** @file Common header file shared by all source files. This file includes package header files, dependent library classes. - Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.
+ Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ #ifndef __BASEIOLIB_INTRINSIC_INTERNAL_H_ #define __BASEIOLIB_INTRINSIC_INTERNAL_H_ @@ -15,7 +15,8 @@ #include #include #include #include +#include #endif diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf index 86a07e60f8..34f9d1d106 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf @@ -2,11 +2,11 @@ # Instance of I/O Library using compiler intrinsics. # # I/O Library that uses compiler intrinsics to perform IN and OUT instructions # for IA-32 and x64. # -# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -47,6 +47,7 @@ [Packages] MdePkg/MdePkg.dec [LibraryClasses] DebugLib BaseLib + RegisterFilterLib diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c index a6bbc92546..d0d7044f09 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c @@ -1,9 +1,9 @@ /** @file Common I/O Library routines. - Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include "BaseIoLibIntrinsicInternal.h" @@ -80,14 +80,19 @@ EFIAPI MmioRead8 ( IN UINTN Address ) { UINT8 Value; + BOOLEAN Flag; - MemoryFence (); - Value = *(volatile UINT8*)Address; - MemoryFence (); + Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value); + if (Flag) { + MemoryFence (); + Value = *(volatile UINT8*)Address; + MemoryFence (); + } + FilterAfterMmIoRead (FilterWidth8, Address, &Value); return Value; } /** @@ -110,13 +115,19 @@ EFIAPI MmioWrite8 ( IN UINTN Address, IN UINT8 Value ) { - MemoryFence (); - *(volatile UINT8*)Address = Value; - MemoryFence (); + BOOLEAN Flag; + + Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value); + if (Flag) { + MemoryFence (); + *(volatile UINT8*)Address = Value; + MemoryFence (); + } + FilterAfterMmIoWrite (FilterWidth8, Address, &Value); return Value; } /** @@ -139,16 +150,20 @@ EFIAPI MmioRead16 ( IN UINTN Address ) { UINT16 Value; + BOOLEAN Flag; ASSERT ((Address & 1) == 0); - - MemoryFence (); - Value = *(volatile UINT16*)Address; - MemoryFence (); + Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value); + if (Flag) { + MemoryFence (); + Value = *(volatile UINT16*)Address; + MemoryFence (); + } + FilterAfterMmIoRead (FilterWidth16, Address, &Value); return Value; } /** @@ -172,15 +187,21 @@ EFIAPI MmioWrite16 ( IN UINTN Address, IN UINT16 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 1) == 0); - MemoryFence (); - *(volatile UINT16*)Address = Value; - MemoryFence (); + Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value); + if (Flag) { + MemoryFence (); + *(volatile UINT16*)Address = Value; + MemoryFence (); + } + FilterAfterMmIoWrite (FilterWidth16, Address, &Value); return Value; } /** @@ -203,16 +224,21 @@ EFIAPI MmioRead32 ( IN UINTN Address ) { UINT32 Value; + BOOLEAN Flag; ASSERT ((Address & 3) == 0); - MemoryFence (); - Value = *(volatile UINT32*)Address; - MemoryFence (); + Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value); + if (Flag) { + MemoryFence (); + Value = *(volatile UINT32*)Address; + MemoryFence (); + } + FilterAfterMmIoRead (FilterWidth32, Address, &Value); return Value; } /** @@ -236,15 +262,21 @@ EFIAPI MmioWrite32 ( IN UINTN Address, IN UINT32 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 3) == 0); - MemoryFence (); - *(volatile UINT32*)Address = Value; - MemoryFence (); + Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value); + if (Flag) { + MemoryFence (); + *(volatile UINT32*)Address = Value; + MemoryFence (); + } + FilterAfterMmIoWrite (FilterWidth32, Address, &Value); return Value; } /** @@ -267,16 +299,21 @@ EFIAPI MmioRead64 ( IN UINTN Address ) { UINT64 Value; + BOOLEAN Flag; ASSERT ((Address & 7) == 0); - MemoryFence (); - Value = *(volatile UINT64*)Address; - MemoryFence (); + Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value); + if (Flag) { + MemoryFence (); + Value = *(volatile UINT64*)Address; + MemoryFence (); + } + FilterAfterMmIoRead (FilterWidth64, Address, &Value); return Value; } /** @@ -298,14 +335,20 @@ EFIAPI MmioWrite64 ( IN UINTN Address, IN UINT64 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 7) == 0); - MemoryFence (); - *(volatile UINT64*)Address = Value; - MemoryFence (); + Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value); + if (Flag) { + MemoryFence (); + *(volatile UINT64*)Address = Value; + MemoryFence (); + } + FilterAfterMmIoWrite (FilterWidth64, Address, &Value); return Value; } diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c index 9715705ee0..6140840769 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c @@ -1,9 +1,9 @@ /** @file I/O Library for ARM. - Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
Copyright (c) 2018, Linaro, Ltd. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -544,11 +544,20 @@ UINT8 EFIAPI MmioRead8 ( IN UINTN Address ) { - return MmioRead8Internal (Address); + UINT8 Value; + BOOLEAN Flag; + + Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value); + if (Flag) { + Value = MmioRead8Internal (Address); + } + FilterAfterMmIoRead (FilterWidth8, Address, &Value); + + return Value; } /** Writes an 8-bit MMIO register. @@ -567,11 +576,18 @@ EFIAPI MmioWrite8 ( IN UINTN Address, IN UINT8 Value ) { - MmioWrite8Internal (Address, Value); + BOOLEAN Flag; + + Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value); + if (Flag) { + MmioWrite8Internal (Address, Value); + } + FilterAfterMmIoWrite (FilterWidth8, Address, &Value); + return Value; } /** Reads a 16-bit MMIO register. @@ -591,13 +607,22 @@ UINT16 EFIAPI MmioRead16 ( IN UINTN Address ) { + BOOLEAN Flag; + UINT16 Value; + ASSERT ((Address & 1) == 0); - return MmioRead16Internal (Address); + Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value); + if (Flag) { + Value = MmioRead16Internal (Address); + } + FilterAfterMmIoRead (FilterWidth16, Address, &Value); + + return Value; } /** Writes a 16-bit MMIO register. @@ -616,13 +641,20 @@ EFIAPI MmioWrite16 ( IN UINTN Address, IN UINT16 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 1) == 0); - MmioWrite16Internal (Address, Value); + Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value); + if (Flag) { + MmioWrite16Internal (Address, Value); + } + FilterAfterMmIoWrite (FilterWidth16, Address, &Value); + return Value; } /** Reads a 32-bit MMIO register. @@ -642,13 +674,22 @@ UINT32 EFIAPI MmioRead32 ( IN UINTN Address ) { + BOOLEAN Flag; + UINT32 Value; + ASSERT ((Address & 3) == 0); - return MmioRead32Internal (Address); + Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value); + if (Flag) { + Value = MmioRead32Internal (Address); + } + FilterAfterMmIoRead (FilterWidth32, Address, &Value); + + return Value; } /** Writes a 32-bit MMIO register. @@ -667,13 +708,20 @@ EFIAPI MmioWrite32 ( IN UINTN Address, IN UINT32 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 3) == 0); - MmioWrite32Internal (Address, Value); + Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value); + if (Flag) { + MmioWrite32Internal (Address, Value); + } + FilterAfterMmIoWrite (FilterWidth32, Address, &Value); + return Value; } /** Reads a 64-bit MMIO register. @@ -693,13 +741,22 @@ UINT64 EFIAPI MmioRead64 ( IN UINTN Address ) { + BOOLEAN Flag; + UINT64 Value; + ASSERT ((Address & 7) == 0); - return MmioRead64Internal (Address); + Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value); + if (Flag) { + Value = MmioRead64Internal (Address); + } + FilterAfterMmIoRead (FilterWidth64, Address, &Value); + + return Value; } /** Writes a 64-bit MMIO register. @@ -718,10 +775,17 @@ EFIAPI MmioWrite64 ( IN UINTN Address, IN UINT64 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 7) == 0); - MmioWrite64Internal (Address, Value); + Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value); + if (Flag) { + MmioWrite64Internal (Address, Value); + } + FilterAfterMmIoWrite (FilterWidth64, Address, &Value); + return Value; } diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c index b3a1a20256..ecf9ed6191 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c @@ -8,11 +8,11 @@ with EFIAPI assembler. We don't advocate putting compiler specifics in libraries or drivers but there is no other way to make this work. - Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -37,12 +37,18 @@ EFIAPI IoRead8 ( IN UINTN Port ) { UINT8 Data; + BOOLEAN Flag; + + Flag = FilterBeforeIoRead (FilterWidth8, Port, &Data); + if (Flag) { + __asm__ __volatile__ ("inb %w1,%b0" : "=a" (Data) : "d" ((UINT16)Port)); + } + FilterAfterIoRead (FilterWidth8, Port, &Data); - __asm__ __volatile__ ("inb %w1,%b0" : "=a" (Data) : "d" ((UINT16)Port)); return Data; } /** Writes an 8-bit I/O port. @@ -64,11 +70,18 @@ EFIAPI IoWrite8 ( IN UINTN Port, IN UINT8 Value ) { - __asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + BOOLEAN Flag; + + Flag = FilterBeforeIoWrite (FilterWidth8, Port, &Value); + if (Flag) { + __asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + } + FilterAfterIoWrite (FilterWidth8, Port, &Value); + return Value;; } /** Reads a 16-bit I/O port. @@ -90,13 +103,20 @@ EFIAPI IoRead16 ( IN UINTN Port ) { UINT16 Data; + BOOLEAN Flag; ASSERT ((Port & 1) == 0); - __asm__ __volatile__ ("inw %w1,%w0" : "=a" (Data) : "d" ((UINT16)Port)); + + Flag = FilterBeforeIoRead (FilterWidth16, Port, &Data); + if (Flag) { + __asm__ __volatile__ ("inw %w1,%w0" : "=a" (Data) : "d" ((UINT16)Port)); + } + FilterAfterIoRead (FilterWidth16, Port, &Data); + return Data; } /** Writes a 16-bit I/O port. @@ -119,12 +139,21 @@ EFIAPI IoWrite16 ( IN UINTN Port, IN UINT16 Value ) { + + BOOLEAN Flag; + ASSERT ((Port & 1) == 0); - __asm__ __volatile__ ("outw %w0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + + Flag = FilterBeforeIoWrite (FilterWidth16, Port, &Value); + if (Flag) { + __asm__ __volatile__ ("outw %w0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + } + FilterAfterIoWrite (FilterWidth16, Port, &Value); + return Value;; } /** Reads a 32-bit I/O port. @@ -146,13 +175,20 @@ EFIAPI IoRead32 ( IN UINTN Port ) { UINT32 Data; + BOOLEAN Flag; ASSERT ((Port & 3) == 0); - __asm__ __volatile__ ("inl %w1,%0" : "=a" (Data) : "d" ((UINT16)Port)); + + Flag = FilterBeforeIoRead (FilterWidth32, Port, &Data); + if (Flag) { + __asm__ __volatile__ ("inl %w1,%0" : "=a" (Data) : "d" ((UINT16)Port)); + } + FilterAfterIoRead (FilterWidth32, Port, &Data); + return Data; } /** Writes a 32-bit I/O port. @@ -175,10 +211,18 @@ EFIAPI IoWrite32 ( IN UINTN Port, IN UINT32 Value ) { + BOOLEAN Flag; + ASSERT ((Port & 3) == 0); - __asm__ __volatile__ ("outl %0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + + Flag = FilterBeforeIoWrite (FilterWidth32, Port, &Value); + if (Flag) { + __asm__ __volatile__ ("outl %0,%w1" : : "a" (Value), "d" ((UINT16)Port)); + } + FilterAfterIoWrite (FilterWidth32, Port, &Value); + return Value; } diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c index 769dddfce2..d2bc5f527c 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c @@ -6,11 +6,11 @@ overhead. We don't advocate putting compiler specifics in libraries or drivers but there is no other way to make this work. - Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -64,14 +64,20 @@ EFIAPI IoRead8 ( IN UINTN Port ) { UINT8 Value; + BOOLEAN Flag; + + Flag = FilterBeforeIoRead (FilterWidth8, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + Value = (UINT8)_inp ((UINT16)Port); + _ReadWriteBarrier (); + } + FilterAfterIoRead (FilterWidth8, Port, &Value); - _ReadWriteBarrier (); - Value = (UINT8)_inp ((UINT16)Port); - _ReadWriteBarrier (); return Value; } /** Writes an 8-bit I/O port. @@ -93,13 +99,20 @@ EFIAPI IoWrite8 ( IN UINTN Port, IN UINT8 Value ) { - _ReadWriteBarrier (); - (UINT8)_outp ((UINT16)Port, Value); - _ReadWriteBarrier (); + BOOLEAN Flag; + + Flag = FilterBeforeIoWrite(FilterWidth8, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + (UINT8)_outp ((UINT16)Port, Value); + _ReadWriteBarrier (); + } + FilterAfterIoWrite (FilterWidth8, Port, &Value); + return Value; } /** Reads a 16-bit I/O port. @@ -121,15 +134,22 @@ EFIAPI IoRead16 ( IN UINTN Port ) { UINT16 Value; + BOOLEAN Flag; ASSERT ((Port & 1) == 0); - _ReadWriteBarrier (); - Value = _inpw ((UINT16)Port); - _ReadWriteBarrier (); + + Flag = FilterBeforeIoRead (FilterWidth16, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + Value = _inpw ((UINT16)Port); + _ReadWriteBarrier (); + } + FilterBeforeIoRead (FilterWidth16, Port, &Value); + return Value; } /** Writes a 16-bit I/O port. @@ -152,14 +172,22 @@ EFIAPI IoWrite16 ( IN UINTN Port, IN UINT16 Value ) { + BOOLEAN Flag; + ASSERT ((Port & 1) == 0); - _ReadWriteBarrier (); - _outpw ((UINT16)Port, Value); - _ReadWriteBarrier (); + + Flag = FilterBeforeIoWrite(FilterWidth16, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + _outpw ((UINT16)Port, Value); + _ReadWriteBarrier (); + } + FilterAfterIoWrite (FilterWidth16, Port, &Value); + return Value; } /** Reads a 32-bit I/O port. @@ -181,15 +209,22 @@ EFIAPI IoRead32 ( IN UINTN Port ) { UINT32 Value; + BOOLEAN Flag; ASSERT ((Port & 3) == 0); - _ReadWriteBarrier (); - Value = _inpd ((UINT16)Port); - _ReadWriteBarrier (); + + Flag = FilterBeforeIoRead(FilterWidth32, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + Value = _inpd ((UINT16)Port); + _ReadWriteBarrier (); + } + FilterAfterIoRead (FilterWidth32, Port, &Value); + return Value; } /** Writes a 32-bit I/O port. @@ -212,11 +247,19 @@ EFIAPI IoWrite32 ( IN UINTN Port, IN UINT32 Value ) { + BOOLEAN Flag; + ASSERT ((Port & 3) == 0); - _ReadWriteBarrier (); - _outpd ((UINT16)Port, Value); - _ReadWriteBarrier (); + + Flag = FilterBeforeIoWrite(FilterWidth32, Port, &Value); + if (Flag) { + _ReadWriteBarrier (); + _outpd ((UINT16)Port, Value); + _ReadWriteBarrier (); + } + FilterAfterIoWrite (FilterWidth32, Port, &Value); + return Value; } diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c index a107136a74..937d6c5a55 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c @@ -1,10 +1,10 @@ /** @file I/O library for non I/O read and write access (memory map I/O read and write only) architecture, such as ARM and RISC-V processor. - Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -406,12 +406,18 @@ EFIAPI MmioRead8 ( IN UINTN Address ) { UINT8 Value; + BOOLEAN Flag; + + Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value); + if (Flag { + Value = *(volatile UINT8*)Address; + } + FilterAfterMmIoRead (FilterWidth8, Address, &Value); - Value = *(volatile UINT8*)Address; return Value; } /** Writes an 8-bit MMIO register. @@ -431,11 +437,18 @@ EFIAPI MmioWrite8 ( IN UINTN Address, IN UINT8 Value ) { - *(volatile UINT8*)Address = Value; + BOOLEAN Flag; + + Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value); + if (Flag { + *(volatile UINT8*)Address = Value; + } + FilterAfterMmIoWrite (FilterWidth8, Address, &Value); + return Value; } /** Reads a 16-bit MMIO register. @@ -456,13 +469,20 @@ EFIAPI MmioRead16 ( IN UINTN Address ) { UINT16 Value; + BOOLEAN Flag; ASSERT ((Address & 1) == 0); - Value = *(volatile UINT16*)Address; + + Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value); + if (Flag { + Value = *(volatile UINT16*)Address; + } + FilterAfterMmIoRead (FilterWidth16, Address, &Value); + return Value; } /** Writes a 16-bit MMIO register. @@ -482,12 +502,20 @@ EFIAPI MmioWrite16 ( IN UINTN Address, IN UINT16 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 1) == 0); - *(volatile UINT16*)Address = Value; + + Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value); + if (Flag { + *(volatile UINT16*)Address = Value; + } + FilterAfterMmIoWrite (FilterWidth16, Address, &Value); + return Value; } /** Reads a 32-bit MMIO register. @@ -508,13 +536,20 @@ EFIAPI MmioRead32 ( IN UINTN Address ) { UINT32 Value; + BOOLEAN Flag; ASSERT ((Address & 3) == 0); - Value = *(volatile UINT32*)Address; + + Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value); + if (Flag { + Value = *(volatile UINT32*)Address; + } + FilterAfterMmIoRead (FilterWidth32, Address, &Value); + return Value; } /** Writes a 32-bit MMIO register. @@ -534,12 +569,20 @@ EFIAPI MmioWrite32 ( IN UINTN Address, IN UINT32 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 3) == 0); + + Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value); + if (Flag { *(volatile UINT32*)Address = Value; + } + FilterAfterMmIoWrite (FilterWidth32, Address, &Value); + return Value; } /** Reads a 64-bit MMIO register. @@ -560,13 +603,20 @@ EFIAPI MmioRead64 ( IN UINTN Address ) { UINT64 Value; + BOOLEAN Flag; ASSERT ((Address & 7) == 0); - Value = *(volatile UINT64*)Address; + + Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value); + if (Flag { + Value = *(volatile UINT64*)Address; + } + FilterAfterMmIoRead (FilterWidth64, Address, &Value); + return Value; } /** Writes a 64-bit MMIO register. @@ -586,10 +636,18 @@ EFIAPI MmioWrite64 ( IN UINTN Address, IN UINT64 Value ) { + BOOLEAN Flag; + ASSERT ((Address & 7) == 0); - *(volatile UINT64*)Address = Value; + + Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value); + if (Flag { + *(volatile UINT64*)Address = Value; + } + FilterAfterMmIoWrite (FilterWidth64, Address, &Value); + return Value; } -- 2.18.0.windows.1