From: "Ni, Ray" <ray.ni@intel.com>
To: devel@edk2.groups.io
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>,
Siyuan Fu <siyuan.fu@intel.com>
Subject: [PATCH 3/3] IntelSiliconPkg/ShadowMicrocodePei: Consume MicrocodeLib
Date: Fri, 2 Apr 2021 14:00:21 +0800 [thread overview]
Message-ID: <20210402060021.982-4-ray.ni@intel.com> (raw)
In-Reply-To: <20210402060021.982-1-ray.ni@intel.com>
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
---
.../ShadowMicrocode/ShadowMicrocodePei.c | 155 ++----------------
.../ShadowMicrocode/ShadowMicrocodePei.inf | 3 +-
2 files changed, 13 insertions(+), 145 deletions(-)
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.c b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.c
index 98a7aed697..4e4b69a0ca 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.c
@@ -1,7 +1,7 @@
/** @file
FIT based microcode shadow PEIM.
-Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -13,6 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
+#include <Library/MicrocodeLib.h>
#include <IndustryStandard/FirmwareInterfaceTable.h>
#include <Register/Intel/Microcode.h>
#include <Register/Intel/Cpuid.h>
@@ -70,118 +71,6 @@ EFI_PEI_PPI_DESCRIPTOR mPeiShadowMicrocodePpiList[] = {
}
};
-/**
- Determine if a microcode patch matchs the specific processor signature and flag.
-
- @param[in] CpuIdCount Number of elements in MicrocodeCpuId array.
- @param[in] MicrocodeCpuId A pointer to an array of EDKII_PEI_MICROCODE_CPU_ID
- structures.
- @param[in] ProcessorSignature The processor signature field value
- supported by a microcode patch.
- @param[in] ProcessorFlags The prcessor flags field value supported by
- a microcode patch.
-
- @retval TRUE The specified microcode patch will be loaded.
- @retval FALSE The specified microcode patch will not be loaded.
-**/
-BOOLEAN
-IsProcessorMatchedMicrocodePatch (
- IN UINTN CpuIdCount,
- IN EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuId,
- IN UINT32 ProcessorSignature,
- IN UINT32 ProcessorFlags
- )
-{
- UINTN Index;
-
- for (Index = 0; Index < CpuIdCount; Index++) {
- if ((ProcessorSignature == MicrocodeCpuId[Index].ProcessorSignature) &&
- (ProcessorFlags & (1 << MicrocodeCpuId[Index].PlatformId)) != 0) {
- return TRUE;
- }
- }
-
- return FALSE;
-}
-
-/**
- Check the 'ProcessorSignature' and 'ProcessorFlags' of the microcode
- patch header with the CPUID and PlatformID of the processors within
- system to decide if it will be copied into memory.
-
- @param[in] CpuIdCount Number of elements in MicrocodeCpuId array.
- @param[in] MicrocodeCpuId A pointer to an array of EDKII_PEI_MICROCODE_CPU_ID
- structures.
- @param[in] MicrocodeEntryPoint The pointer to the microcode patch header.
-
- @retval TRUE The specified microcode patch need to be loaded.
- @retval FALSE The specified microcode patch dosen't need to be loaded.
-**/
-BOOLEAN
-IsMicrocodePatchNeedLoad (
- IN UINTN CpuIdCount,
- IN EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuId,
- CPU_MICROCODE_HEADER *MicrocodeEntryPoint
- )
-{
- BOOLEAN NeedLoad;
- UINTN DataSize;
- UINTN TotalSize;
- CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;
- UINT32 ExtendedTableCount;
- CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;
- UINTN Index;
-
- if (FeaturePcdGet (PcdShadowAllMicrocode)) {
- return TRUE;
- }
-
- //
- // Check the 'ProcessorSignature' and 'ProcessorFlags' in microcode patch header.
- //
- NeedLoad = IsProcessorMatchedMicrocodePatch (
- CpuIdCount,
- MicrocodeCpuId,
- MicrocodeEntryPoint->ProcessorSignature.Uint32,
- MicrocodeEntryPoint->ProcessorFlags
- );
-
- //
- // If the Extended Signature Table exists, check if the processor is in the
- // support list
- //
- DataSize = MicrocodeEntryPoint->DataSize;
- TotalSize = (DataSize == 0) ? 2048 : MicrocodeEntryPoint->TotalSize;
- if ((!NeedLoad) && (DataSize != 0) &&
- (TotalSize - DataSize > sizeof (CPU_MICROCODE_HEADER) +
- sizeof (CPU_MICROCODE_EXTENDED_TABLE_HEADER))) {
- ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint)
- + DataSize + sizeof (CPU_MICROCODE_HEADER));
- ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;
- ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);
-
- for (Index = 0; Index < ExtendedTableCount; Index ++) {
- //
- // Check the 'ProcessorSignature' and 'ProcessorFlag' of the Extended
- // Signature Table entry with the CPUID and PlatformID of the processors
- // within system to decide if it will be copied into memory
- //
- NeedLoad = IsProcessorMatchedMicrocodePatch (
- CpuIdCount,
- MicrocodeCpuId,
- ExtendedTable->ProcessorSignature.Uint32,
- ExtendedTable->ProcessorFlag
- );
- if (NeedLoad) {
- break;
- }
- ExtendedTable ++;
- }
- }
-
- return NeedLoad;
-}
-
/**
Actual worker function that shadows the required microcode patches into memory.
@@ -439,6 +328,11 @@ ShadowMicrocode (
return EFI_OUT_OF_RESOURCES;
}
+ if (FeaturePcdGet (PcdShadowAllMicrocode)) {
+ MicrocodeCpuId = NULL;
+ CpuIdCount = 0;
+ }
+
//
// Fill up microcode patch info buffer according to FIT table.
//
@@ -447,37 +341,10 @@ ShadowMicrocode (
for (Index = 0; Index < EntryNum; Index++) {
if (FitEntry[Index].Type == FIT_TYPE_01_MICROCODE) {
MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) FitEntry[Index].Address;
-
- if (*(UINT32 *) MicrocodeEntryPoint == 0xFFFFFFFF) {
- //
- // An empty slot for reserved microcode update, skip to check next entry.
- //
- continue;
- }
-
- if (MicrocodeEntryPoint->HeaderVersion != 0x1) {
- //
- // Not a valid microcode header, skip to check next entry.
- //
- continue;
- }
-
- DataSize = MicrocodeEntryPoint->DataSize;
- TotalSize = (DataSize == 0) ? 2048 : MicrocodeEntryPoint->TotalSize;
- if ( (UINTN)MicrocodeEntryPoint > (MAX_ADDRESS - TotalSize) ||
- (DataSize & 0x3) != 0 ||
- (TotalSize & (SIZE_1KB - 1)) != 0 ||
- TotalSize < DataSize
- ) {
- //
- // Not a valid microcode header, skip to check next entry.
- //
- continue;
- }
-
- if (IsMicrocodePatchNeedLoad (CpuIdCount, MicrocodeCpuId, MicrocodeEntryPoint)) {
- PatchInfoBuffer[PatchCount].Address = (UINTN) MicrocodeEntryPoint;
- PatchInfoBuffer[PatchCount].Size = TotalSize;
+ TotalSize = GetMicrocodeLength (MicrocodeEntryPoint);
+ if (IsValidMicrocode (MicrocodeEntryPoint, TotalSize, MicrocodeCpuId, CpuIdCount, FALSE)) {
+ PatchInfoBuffer[PatchCount].Address = (UINTN) MicrocodeEntryPoint;
+ PatchInfoBuffer[PatchCount].Size = TotalSize;
TotalLoadSize += TotalSize;
PatchCount++;
}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.inf b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.inf
index 581780add8..5ee225297d 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.inf
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.inf
@@ -1,7 +1,7 @@
### @file
# FIT based microcode shadow PEIM.
#
-# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -25,6 +25,7 @@
BaseMemoryLib
HobLib
PeiServicesLib
+ MicrocodeLib
[Packages]
MdePkg/MdePkg.dec
--
2.27.0.windows.1
next prev parent reply other threads:[~2021-04-02 6:00 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-02 6:00 [PATCH 0/3] Update edk2-platform repo to consume MicrocodeLib Ni, Ray
2021-04-02 6:00 ` [PATCH 1/3] MinPlatformPkg/CoreCommonLib.dsc: Consume MicrocodeLib Ni, Ray
2021-04-08 13:59 ` [edk2-devel] " Chiu, Chasel
2021-04-02 6:00 ` [PATCH 2/3] Vlv2TbltDevicePkg/PlatformPkg[IA32|X64].dsc: " Ni, Ray
2021-04-09 0:39 ` [edk2-devel] " Sun, Zailiang
2021-04-02 6:00 ` Ni, Ray [this message]
2021-04-08 6:43 ` [PATCH 3/3] IntelSiliconPkg/ShadowMicrocodePei: " Siyuan, Fu
2021-04-08 16:08 ` Chaganty, Rangasai V
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210402060021.982-4-ray.ni@intel.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox